target/linux/bcm53xx/patches-4.14/182-pinctrl-bcm-add-Northstar-driver.patch

   1 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   2 Date: Wed, 26 Sep 2018 21:31:03 +0200
   3 Subject: [PATCH] pinctrl: bcm: add Northstar driver
   4 MIME-Version: 1.0
   5 Content-Type: text/plain; charset=UTF-8
   6 Content-Transfer-Encoding: 8bit
   7
   8 This driver provides support for Northstar mux controller. It differs
   9 from Northstar Plus one so a new binding and driver were needed.
  10
  11 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  12 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  13 ---
  14  drivers/pinctrl/bcm/Kconfig      |  13 ++
  15  drivers/pinctrl/bcm/Makefile     |   1 +
  16  drivers/pinctrl/bcm/pinctrl-ns.c | 372 +++++++++++++++++++++++++++++++++++++++
  17  3 files changed, 386 insertions(+)
  18  create mode 100644 drivers/pinctrl/bcm/pinctrl-ns.c
  19
  20 --- a/drivers/pinctrl/bcm/Kconfig
  21 +++ b/drivers/pinctrl/bcm/Kconfig
  22 @@ -72,6 +72,19 @@ config PINCTRL_CYGNUS_MUX
  23           configuration, with the exception that certain individual pins
  24           can be overridden to GPIO function
  25
  26 +config PINCTRL_NS
  27 +       bool "Broadcom Northstar pins driver"
  28 +       depends on OF && (ARCH_BCM_5301X || COMPILE_TEST)
  29 +       select PINMUX
  30 +       select GENERIC_PINCONF
  31 +       default ARCH_BCM_5301X
  32 +       help
  33 +         Say yes here to enable the Broadcom NS SoC pins driver.
  34 +
  35 +         The Broadcom Northstar pins driver supports muxing multi-purpose pins
  36 +         that can be used for various functions (e.g. SPI, I2C, UART) as well
  37 +         as GPIOs.
  38 +
  39  config PINCTRL_NSP_GPIO
  40         bool "Broadcom NSP GPIO (with PINCONF) driver"
  41         depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
  42 --- a/drivers/pinctrl/bcm/Makefile
  43 +++ b/drivers/pinctrl/bcm/Makefile
  44 @@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BCM281XX)          += pinct
  45  obj-$(CONFIG_PINCTRL_BCM2835)          += pinctrl-bcm2835.o
  46  obj-$(CONFIG_PINCTRL_IPROC_GPIO)       += pinctrl-iproc-gpio.o
  47  obj-$(CONFIG_PINCTRL_CYGNUS_MUX)       += pinctrl-cygnus-mux.o
  48 +obj-$(CONFIG_PINCTRL_NS)               += pinctrl-ns.o
  49  obj-$(CONFIG_PINCTRL_NSP_GPIO)         += pinctrl-nsp-gpio.o
  50  obj-$(CONFIG_PINCTRL_NS2_MUX)          += pinctrl-ns2-mux.o
  51  obj-$(CONFIG_PINCTRL_NSP_MUX)          += pinctrl-nsp-mux.o
  52 --- /dev/null
  53 +++ b/drivers/pinctrl/bcm/pinctrl-ns.c
  54 @@ -0,0 +1,372 @@
  55 +// SPDX-License-Identifier: GPL-2.0
  56 +/*
  57 + * Copyright (C) 2018 Rafał Miłecki <rafal@milecki.pl>
  58 + */
  59 +
  60 +#include <linux/err.h>
  61 +#include <linux/io.h>
  62 +#include <linux/module.h>
  63 +#include <linux/of.h>
  64 +#include <linux/of_device.h>
  65 +#include <linux/pinctrl/pinconf-generic.h>
  66 +#include <linux/pinctrl/pinctrl.h>
  67 +#include <linux/pinctrl/pinmux.h>
  68 +#include <linux/platform_device.h>
  69 +#include <linux/slab.h>
  70 +
  71 +#define FLAG_BCM4708           BIT(1)
  72 +#define FLAG_BCM4709           BIT(2)
  73 +#define FLAG_BCM53012          BIT(3)
  74 +
  75 +struct ns_pinctrl {
  76 +       struct device *dev;
  77 +       unsigned int chipset_flag;
  78 +       struct pinctrl_dev *pctldev;
  79 +       void __iomem *base;
  80 +
  81 +       struct pinctrl_desc pctldesc;
  82 +       struct ns_pinctrl_group *groups;
  83 +       unsigned int num_groups;
  84 +       struct ns_pinctrl_function *functions;
  85 +       unsigned int num_functions;
  86 +};
  87 +
  88 +/*
  89 + * Pins
  90 + */
  91 +
  92 +static const struct pinctrl_pin_desc ns_pinctrl_pins[] = {
  93 +       { 0, "spi_clk", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
  94 +       { 1, "spi_ss", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
  95 +       { 2, "spi_mosi", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
  96 +       { 3, "spi_miso", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
  97 +       { 4, "i2c_scl", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
  98 +       { 5, "i2c_sda", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
  99 +       { 6, "mdc", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
 100 +       { 7, "mdio", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
 101 +       { 8, "pwm0", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 102 +       { 9, "pwm1", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 103 +       { 10, "pwm2", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 104 +       { 11, "pwm3", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 105 +       { 12, "uart1_rx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 106 +       { 13, "uart1_tx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 107 +       { 14, "uart1_cts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 108 +       { 15, "uart1_rts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
 109 +       { 16, "uart2_rx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
 110 +       { 17, "uart2_tx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
 111 +/* TODO { ??, "xtal_out", (void *)(FLAG_BCM4709) }, */
 112 +       { 22, "sdio_pwr", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
 113 +       { 23, "sdio_en_1p8v", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
 114 +};
 115 +
 116 +/*
 117 + * Groups
 118 + */
 119 +
 120 +struct ns_pinctrl_group {
 121 +       const char *name;
 122 +       const unsigned int *pins;
 123 +       const unsigned int num_pins;
 124 +       unsigned int chipsets;
 125 +};
 126 +
 127 +static const unsigned int spi_pins[] = { 0, 1, 2, 3 };
 128 +static const unsigned int i2c_pins[] = { 4, 5 };
 129 +static const unsigned int mdio_pins[] = { 6, 7 };
 130 +static const unsigned int pwm0_pins[] = { 8 };
 131 +static const unsigned int pwm1_pins[] = { 9 };
 132 +static const unsigned int pwm2_pins[] = { 10 };
 133 +static const unsigned int pwm3_pins[] = { 11 };
 134 +static const unsigned int uart1_pins[] = { 12, 13, 14, 15 };
 135 +static const unsigned int uart2_pins[] = { 16, 17 };
 136 +static const unsigned int sdio_pwr_pins[] = { 22 };
 137 +static const unsigned int sdio_1p8v_pins[] = { 23 };
 138 +
 139 +#define NS_GROUP(_name, _pins, _chipsets)              \
 140 +{                                                      \
 141 +       .name = _name,                                  \
 142 +       .pins = _pins,                                  \
 143 +       .num_pins = ARRAY_SIZE(_pins),                  \
 144 +       .chipsets = _chipsets,                          \
 145 +}
 146 +
 147 +static const struct ns_pinctrl_group ns_pinctrl_groups[] = {
 148 +       NS_GROUP("spi_grp", spi_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 149 +       NS_GROUP("i2c_grp", i2c_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 150 +       NS_GROUP("mdio_grp", mdio_pins, FLAG_BCM4709 | FLAG_BCM53012),
 151 +       NS_GROUP("pwm0_grp", pwm0_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 152 +       NS_GROUP("pwm1_grp", pwm1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 153 +       NS_GROUP("pwm2_grp", pwm2_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 154 +       NS_GROUP("pwm3_grp", pwm3_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 155 +       NS_GROUP("uart1_grp", uart1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 156 +       NS_GROUP("uart2_grp", uart2_pins, FLAG_BCM4709 | FLAG_BCM53012),
 157 +       NS_GROUP("sdio_pwr_grp", sdio_pwr_pins, FLAG_BCM4709 | FLAG_BCM53012),
 158 +       NS_GROUP("sdio_1p8v_grp", sdio_1p8v_pins, FLAG_BCM4709 | FLAG_BCM53012),
 159 +};
 160 +
 161 +/*
 162 + * Functions
 163 + */
 164 +
 165 +struct ns_pinctrl_function {
 166 +       const char *name;
 167 +       const char * const *groups;
 168 +       const unsigned int num_groups;
 169 +       unsigned int chipsets;
 170 +};
 171 +
 172 +static const char * const spi_groups[] = { "spi_grp" };
 173 +static const char * const i2c_groups[] = { "i2c_grp" };
 174 +static const char * const mdio_groups[] = { "mdio_grp" };
 175 +static const char * const pwm_groups[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp",
 176 +                                          "pwm3_grp" };
 177 +static const char * const uart1_groups[] = { "uart1_grp" };
 178 +static const char * const uart2_groups[] = { "uart2_grp" };
 179 +static const char * const sdio_groups[] = { "sdio_pwr_grp", "sdio_1p8v_grp" };
 180 +
 181 +#define NS_FUNCTION(_name, _groups, _chipsets)         \
 182 +{                                                      \
 183 +       .name = _name,                                  \
 184 +       .groups = _groups,                              \
 185 +       .num_groups = ARRAY_SIZE(_groups),              \
 186 +       .chipsets = _chipsets,                          \
 187 +}
 188 +
 189 +static const struct ns_pinctrl_function ns_pinctrl_functions[] = {
 190 +       NS_FUNCTION("spi", spi_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 191 +       NS_FUNCTION("i2c", i2c_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 192 +       NS_FUNCTION("mdio", mdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
 193 +       NS_FUNCTION("pwm", pwm_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 194 +       NS_FUNCTION("uart1", uart1_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
 195 +       NS_FUNCTION("uart2", uart2_groups, FLAG_BCM4709 | FLAG_BCM53012),
 196 +       NS_FUNCTION("sdio", sdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
 197 +};
 198 +
 199 +/*
 200 + * Groups code
 201 + */
 202 +
 203 +static int ns_pinctrl_get_groups_count(struct pinctrl_dev *pctrl_dev)
 204 +{
 205 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 206 +
 207 +       return ns_pinctrl->num_groups;
 208 +}
 209 +
 210 +static const char *ns_pinctrl_get_group_name(struct pinctrl_dev *pctrl_dev,
 211 +                                            unsigned int selector)
 212 +{
 213 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 214 +
 215 +       return ns_pinctrl->groups[selector].name;
 216 +}
 217 +
 218 +static int ns_pinctrl_get_group_pins(struct pinctrl_dev *pctrl_dev,
 219 +                                    unsigned int selector,
 220 +                                    const unsigned int **pins,
 221 +                                    unsigned int *num_pins)
 222 +{
 223 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 224 +
 225 +       *pins = ns_pinctrl->groups[selector].pins;
 226 +       *num_pins = ns_pinctrl->groups[selector].num_pins;
 227 +
 228 +       return 0;
 229 +}
 230 +
 231 +static const struct pinctrl_ops ns_pinctrl_ops = {
 232 +       .get_groups_count = ns_pinctrl_get_groups_count,
 233 +       .get_group_name = ns_pinctrl_get_group_name,
 234 +       .get_group_pins = ns_pinctrl_get_group_pins,
 235 +       .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
 236 +       .dt_free_map = pinconf_generic_dt_free_map,
 237 +};
 238 +
 239 +/*
 240 + * Functions code
 241 + */
 242 +
 243 +static int ns_pinctrl_get_functions_count(struct pinctrl_dev *pctrl_dev)
 244 +{
 245 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 246 +
 247 +       return ns_pinctrl->num_functions;
 248 +}
 249 +
 250 +static const char *ns_pinctrl_get_function_name(struct pinctrl_dev *pctrl_dev,
 251 +                                               unsigned int selector)
 252 +{
 253 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 254 +
 255 +       return ns_pinctrl->functions[selector].name;
 256 +}
 257 +
 258 +static int ns_pinctrl_get_function_groups(struct pinctrl_dev *pctrl_dev,
 259 +                                         unsigned int selector,
 260 +                                         const char * const **groups,
 261 +                                         unsigned * const num_groups)
 262 +{
 263 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 264 +
 265 +       *groups = ns_pinctrl->functions[selector].groups;
 266 +       *num_groups = ns_pinctrl->functions[selector].num_groups;
 267 +
 268 +       return 0;
 269 +}
 270 +
 271 +static int ns_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev,
 272 +                             unsigned int func_select,
 273 +                             unsigned int grp_select)
 274 +{
 275 +       struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
 276 +       u32 unset = 0;
 277 +       u32 tmp;
 278 +       int i;
 279 +
 280 +       for (i = 0; i < ns_pinctrl->groups[grp_select].num_pins; i++) {
 281 +               int pin_number = ns_pinctrl->groups[grp_select].pins[i];
 282 +
 283 +               unset |= BIT(pin_number);
 284 +       }
 285 +
 286 +       tmp = readl(ns_pinctrl->base);
 287 +       tmp &= ~unset;
 288 +       writel(tmp, ns_pinctrl->base);
 289 +
 290 +       return 0;
 291 +}
 292 +
 293 +static const struct pinmux_ops ns_pinctrl_pmxops = {
 294 +       .get_functions_count = ns_pinctrl_get_functions_count,
 295 +       .get_function_name = ns_pinctrl_get_function_name,
 296 +       .get_function_groups = ns_pinctrl_get_function_groups,
 297 +       .set_mux = ns_pinctrl_set_mux,
 298 +};
 299 +
 300 +/*
 301 + * Controller code
 302 + */
 303 +
 304 +static struct pinctrl_desc ns_pinctrl_desc = {
 305 +       .name = "pinctrl-ns",
 306 +       .pctlops = &ns_pinctrl_ops,
 307 +       .pmxops = &ns_pinctrl_pmxops,
 308 +};
 309 +
 310 +static const struct of_device_id ns_pinctrl_of_match_table[] = {
 311 +       { .compatible = "brcm,bcm4708-pinmux", .data = (void *)FLAG_BCM4708, },
 312 +       { .compatible = "brcm,bcm4709-pinmux", .data = (void *)FLAG_BCM4709, },
 313 +       { .compatible = "brcm,bcm53012-pinmux", .data = (void *)FLAG_BCM53012, },
 314 +       { }
 315 +};
 316 +
 317 +static int ns_pinctrl_probe(struct platform_device *pdev)
 318 +{
 319 +       struct device *dev = &pdev->dev;
 320 +       const struct of_device_id *of_id;
 321 +       struct ns_pinctrl *ns_pinctrl;
 322 +       struct pinctrl_desc *pctldesc;
 323 +       struct pinctrl_pin_desc *pin;
 324 +       struct ns_pinctrl_group *group;
 325 +       struct ns_pinctrl_function *function;
 326 +       struct resource *res;
 327 +       int i;
 328 +
 329 +       ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL);
 330 +       if (!ns_pinctrl)
 331 +               return -ENOMEM;
 332 +       pctldesc = &ns_pinctrl->pctldesc;
 333 +       platform_set_drvdata(pdev, ns_pinctrl);
 334 +
 335 +       /* Set basic properties */
 336 +
 337 +       ns_pinctrl->dev = dev;
 338 +
 339 +       of_id = of_match_device(ns_pinctrl_of_match_table, dev);
 340 +       if (!of_id)
 341 +               return -EINVAL;
 342 +       ns_pinctrl->chipset_flag = (unsigned int)of_id->data;
 343 +
 344 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 345 +                                          "cru_gpio_control");
 346 +       ns_pinctrl->base = devm_ioremap_resource(dev, res);
 347 +       if (IS_ERR(ns_pinctrl->base)) {
 348 +               dev_err(dev, "Failed to map pinctrl regs\n");
 349 +               return PTR_ERR(ns_pinctrl->base);
 350 +       }
 351 +
 352 +       memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc));
 353 +
 354 +       /* Set pinctrl properties */
 355 +
 356 +       pctldesc->pins = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_pins),
 357 +                                     sizeof(struct pinctrl_pin_desc),
 358 +                                     GFP_KERNEL);
 359 +       if (!pctldesc->pins)
 360 +               return -ENOMEM;
 361 +       for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0];
 362 +            i < ARRAY_SIZE(ns_pinctrl_pins); i++) {
 363 +               const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i];
 364 +               unsigned int chipsets = (unsigned int)src->drv_data;
 365 +
 366 +               if (chipsets & ns_pinctrl->chipset_flag) {
 367 +                       memcpy(pin++, src, sizeof(*src));
 368 +                       pctldesc->npins++;
 369 +               }
 370 +       }
 371 +
 372 +       ns_pinctrl->groups = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_groups),
 373 +                                         sizeof(struct ns_pinctrl_group),
 374 +                                         GFP_KERNEL);
 375 +       if (!ns_pinctrl->groups)
 376 +               return -ENOMEM;
 377 +       for (i = 0, group = &ns_pinctrl->groups[0];
 378 +            i < ARRAY_SIZE(ns_pinctrl_groups); i++) {
 379 +               const struct ns_pinctrl_group *src = &ns_pinctrl_groups[i];
 380 +
 381 +               if (src->chipsets & ns_pinctrl->chipset_flag) {
 382 +                       memcpy(group++, src, sizeof(*src));
 383 +                       ns_pinctrl->num_groups++;
 384 +               }
 385 +       }
 386 +
 387 +       ns_pinctrl->functions = devm_kcalloc(dev,
 388 +                                            ARRAY_SIZE(ns_pinctrl_functions),
 389 +                                            sizeof(struct ns_pinctrl_function),
 390 +                                            GFP_KERNEL);
 391 +       if (!ns_pinctrl->functions)
 392 +               return -ENOMEM;
 393 +       for (i = 0, function = &ns_pinctrl->functions[0];
 394 +            i < ARRAY_SIZE(ns_pinctrl_functions); i++) {
 395 +               const struct ns_pinctrl_function *src = &ns_pinctrl_functions[i];
 396 +
 397 +               if (src->chipsets & ns_pinctrl->chipset_flag) {
 398 +                       memcpy(function++, src, sizeof(*src));
 399 +                       ns_pinctrl->num_functions++;
 400 +               }
 401 +       }
 402 +
 403 +       /* Register */
 404 +
 405 +       ns_pinctrl->pctldev = devm_pinctrl_register(dev, pctldesc, ns_pinctrl);
 406 +       if (IS_ERR(ns_pinctrl->pctldev)) {
 407 +               dev_err(dev, "Failed to register pinctrl\n");
 408 +               return PTR_ERR(ns_pinctrl->pctldev);
 409 +       }
 410 +
 411 +       return 0;
 412 +}
 413 +
 414 +static struct platform_driver ns_pinctrl_driver = {
 415 +       .probe = ns_pinctrl_probe,
 416 +       .driver = {
 417 +               .name = "ns-pinmux",
 418 +               .of_match_table = ns_pinctrl_of_match_table,
 419 +       },
 420 +};
 421 +
 422 +module_platform_driver(ns_pinctrl_driver);
 423 +
 424 +MODULE_AUTHOR("Rafał Miłecki");
 425 +MODULE_LICENSE("GPL v2");
 426 +MODULE_DEVICE_TABLE(of, ns_pinctrl_of_match_table);