target/linux/generic-2.6/files/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/mvSysPex.h

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  64
  65 #ifndef __INCSysPEXH
  66 #define __INCSysPEXH
  67
  68 #include "mvCommon.h"
  69 #include "ctrlEnv/sys/mvCpuIf.h"
  70 #include "ctrlEnv/mvCtrlEnvLib.h"
  71 #include "ctrlEnv/mvCtrlEnvAddrDec.h"
  72
  73 /* 4KB granularity */
  74 #define MINIMUM_WINDOW_SIZE     0x1000
  75 #define MINIMUM_BAR_SIZE        0x1000
  76 #define MINIMUM_BAR_SIZE_MASK   0xFFFFF000
  77 #define BAR_SIZE_OFFS                   12
  78 #define BAR_SIZE_MASK                   (0xFFFFF << BAR_SIZE_OFFS)
  79
  80
  81
  82 #define MV_PEX_WIN_DEFAULT              6
  83 #define MV_PEX_WIN_EXP_ROM              7
  84 #define PEX_MAX_TARGET_WIN              8
  85
  86
  87 #define PEX_MAX_BARS                    3
  88 #define PEX_INTER_REGS_BAR              0
  89 #define PEX_DRAM_BAR                    1
  90 #define PEX_DEVICE_BAR                  2
  91
  92 /*************************************/
  93 /* PCI Express BAR Control Registers */
  94 /*************************************/
  95 #define PEX_BAR_CTRL_REG(pexIf,bar)             (0x41804 + (bar-1)*4- (pexIf)*0x10000)
  96 #define PEX_EXP_ROM_BAR_CTRL_REG(pexIf) (0x4180C - (pexIf)*0x10000)
  97
  98
  99 /* PCI Express BAR Control Register */
 100 /* PEX_BAR_CTRL_REG (PXBCR) */
 101
 102 #define PXBCR_BAR_EN                            BIT0
 103 #define PXBCR_BAR_SIZE_OFFS                     16
 104 #define PXBCR_BAR_SIZE_MASK                     (0xffff << PXBCR_BAR_SIZE_OFFS)
 105 #define PXBCR_BAR_SIZE_ALIGNMENT        0x10000
 106
 107
 108
 109 /* PCI Express Expansion ROM BAR Control Register */
 110 /* PEX_EXP_ROM_BAR_CTRL_REG (PXERBCR) */
 111
 112 #define PXERBCR_EXPROM_EN                       BIT0
 113 #define PXERBCR_EXPROMSZ_OFFS           19
 114 #define PXERBCR_EXPROMSZ_MASK           (0xf << PXERBCR_EXPROMSZ_OFFS)
 115 #define PXERBCR_EXPROMSZ_512KB          (0x0 << PXERBCR_EXPROMSZ_OFFS)
 116 #define PXERBCR_EXPROMSZ_1024KB         (0x1 << PXERBCR_EXPROMSZ_OFFS)
 117 #define PXERBCR_EXPROMSZ_2048KB         (0x3 << PXERBCR_EXPROMSZ_OFFS)
 118 #define PXERBCR_EXPROMSZ_4096KB         (0x7 << PXERBCR_EXPROMSZ_OFFS)
 119
 120 /************************************************/
 121 /* PCI Express Address Window Control Registers */
 122 /************************************************/
 123 #define PEX_WIN0_3_CTRL_REG(pexIf,winNum)       \
 124                                 (0x41820 + (winNum) * 0x10 - (pexIf) * 0x10000)
 125 #define PEX_WIN0_3_BASE_REG(pexIf,winNum)       \
 126                                 (0x41824 + (winNum) * 0x10 - (pexIf) * 0x10000)
 127 #define PEX_WIN0_3_REMAP_REG(pexIf,winNum)      \
 128                                 (0x4182C + (winNum) * 0x10 - (pexIf) * 0x10000)
 129 #define PEX_WIN4_5_CTRL_REG(pexIf,winNum)       \
 130                             (0x41860 + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
 131 #define PEX_WIN4_5_BASE_REG(pexIf,winNum)       \
 132                             (0x41864 + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
 133 #define PEX_WIN4_5_REMAP_REG(pexIf,winNum)      \
 134                             (0x4186C + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
 135 #define PEX_WIN4_5_REMAP_HIGH_REG(pexIf,winNum) \
 136                             (0x41870 + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
 137
 138 #define PEX_WIN_DEFAULT_CTRL_REG(pexIf)         (0x418B0 - (pexIf) * 0x10000)
 139 #define PEX_WIN_EXP_ROM_CTRL_REG(pexIf)         (0x418C0 - (pexIf) * 0x10000)
 140 #define PEX_WIN_EXP_ROM_REMAP_REG(pexIf)        (0x418C4 - (pexIf) * 0x10000)
 141
 142 /* PCI Express Window Control Register */
 143 /* PEX_WIN_CTRL_REG (PXWCR) */
 144
 145 #define PXWCR_WIN_EN                                    BIT0 /* Window Enable.*/
 146
 147 #define PXWCR_WIN_BAR_MAP_OFFS                  1    /* Mapping to BAR.*/
 148 #define PXWCR_WIN_BAR_MAP_MASK                  BIT1
 149 #define PXWCR_WIN_BAR_MAP_BAR1                  (0 << PXWCR_WIN_BAR_MAP_OFFS)
 150 #define PXWCR_WIN_BAR_MAP_BAR2                  (1 << PXWCR_WIN_BAR_MAP_OFFS)
 151
 152 #define PXWCR_TARGET_OFFS                               4  /*Unit ID */
 153 #define PXWCR_TARGET_MASK                               (0xf << PXWCR_TARGET_OFFS)
 154
 155 #define PXWCR_ATTRIB_OFFS                               8  /* target attributes */
 156 #define PXWCR_ATTRIB_MASK                               (0xff << PXWCR_ATTRIB_OFFS)
 157
 158 #define PXWCR_SIZE_OFFS                                 16 /* size */
 159 #define PXWCR_SIZE_MASK                                 (0xffff << PXWCR_SIZE_OFFS)
 160 #define PXWCR_SIZE_ALIGNMENT                    0x10000
 161
 162 /* PCI Express Window Base Register */
 163 /* PEX_WIN_BASE_REG (PXWBR)*/
 164
 165 #define PXWBR_BASE_OFFS                                 16 /* address[31:16] */
 166 #define PXWBR_BASE_MASK                                 (0xffff << PXWBR_BASE_OFFS)
 167 #define PXWBR_BASE_ALIGNMENT                    0x10000
 168
 169 /* PCI Express Window Remap Register */
 170 /* PEX_WIN_REMAP_REG (PXWRR)*/
 171
 172 #define PXWRR_REMAP_EN                                  BIT0
 173 #define PXWRR_REMAP_OFFS                                16
 174 #define PXWRR_REMAP_MASK                                (0xffff << PXWRR_REMAP_OFFS)
 175 #define PXWRR_REMAP_ALIGNMENT                   0x10000
 176
 177 /* PCI Express Window Remap (High) Register */
 178 /* PEX_WIN_REMAP_HIGH_REG (PXWRHR)*/
 179
 180 #define PXWRHR_REMAP_HIGH_OFFS                  0
 181 #define PXWRHR_REMAP_HIGH_MASK                  (0xffffffff << PXWRHR_REMAP_HIGH_OFFS)
 182
 183 /* PCI Express Default Window Control Register */
 184 /* PEX_WIN_DEFAULT_CTRL_REG (PXWDCR) */
 185
 186 #define PXWDCR_TARGET_OFFS                              4  /*Unit ID */
 187 #define PXWDCR_TARGET_MASK                              (0xf << PXWDCR_TARGET_OFFS)
 188 #define PXWDCR_ATTRIB_OFFS                              8  /* target attributes */
 189 #define PXWDCR_ATTRIB_MASK                              (0xff << PXWDCR_ATTRIB_OFFS)
 190
 191 /* PCI Express Expansion ROM Window Control Register */
 192 /* PEX_WIN_EXP_ROM_CTRL_REG (PXWERCR)*/
 193
 194 #define PXWERCR_TARGET_OFFS                             4  /*Unit ID */
 195 #define PXWERCR_TARGET_MASK                             (0xf << PXWERCR_TARGET_OFFS)
 196 #define PXWERCR_ATTRIB_OFFS                             8  /* target attributes */
 197 #define PXWERCR_ATTRIB_MASK                             (0xff << PXWERCR_ATTRIB_OFFS)
 198
 199 /* PCI Express Expansion ROM Window Remap Register */
 200 /* PEX_WIN_EXP_ROM_REMAP_REG (PXWERRR)*/
 201
 202 #define PXWERRR_REMAP_EN                                BIT0
 203 #define PXWERRR_REMAP_OFFS                              16
 204 #define PXWERRR_REMAP_MASK                              (0xffff << PXWERRR_REMAP_OFFS)
 205 #define PXWERRR_REMAP_ALIGNMENT                 0x10000
 206
 207
 208
 209 /*PEX_MEMORY_BAR_BASE_ADDR(barNum) (PXMBBA)*/
 210 /* PCI Express BAR0 Internal Register*/
 211 /*PEX BAR0_INTER_REG (PXBIR)*/
 212
 213 #define PXBIR_IOSPACE                   BIT0    /* Memory Space Indicator */
 214
 215 #define PXBIR_TYPE_OFFS                 1          /* BAR Type/Init Val. */
 216 #define PXBIR_TYPE_MASK                 (0x3 << PXBIR_TYPE_OFFS)
 217 #define PXBIR_TYPE_32BIT_ADDR   (0x0 << PXBIR_TYPE_OFFS)
 218 #define PXBIR_TYPE_64BIT_ADDR   (0x2 << PXBIR_TYPE_OFFS)
 219
 220 #define PXBIR_PREFETCH_EN               BIT3    /* Prefetch Enable */
 221
 222 #define PXBIR_BASE_OFFS         20              /* Base address. Address bits [31:20] */
 223 #define PXBIR_BASE_MASK         (0xfff << PXBIR_BASE_OFFS)
 224 #define PXBIR_BASE_ALIGNMET     (1 << PXBIR_BASE_OFFS)
 225
 226
 227 /* PCI Express BAR0 Internal (High) Register*/
 228 /*PEX BAR0_INTER_REG_HIGH (PXBIRH)*/
 229
 230 #define PXBIRH_BASE_OFFS                        0               /* Base address. Bits [63:32] */
 231 #define PXBIRH_BASE_MASK                        (0xffffffff << PBBHR_BASE_OFFS)
 232
 233
 234 #define PEX_BAR_DEFAULT_ATTRIB          0xc /* Memory - Prefetch - 64 bit address */
 235 #define PEX_BAR0_DEFAULT_ATTRIB     PEX_BAR_DEFAULT_ATTRIB
 236 #define PEX_BAR1_DEFAULT_ATTRIB         PEX_BAR_DEFAULT_ATTRIB
 237 #define PEX_BAR2_DEFAULT_ATTRIB         PEX_BAR_DEFAULT_ATTRIB
 238
 239
 240 /* PCI Express BAR1 Register */
 241 /*  PCI Express BAR2 Register*/
 242 /*PEX BAR1_REG (PXBR)*/
 243 /*PEX BAR2_REG (PXBR)*/
 244
 245 #define PXBR_IOSPACE                    BIT0    /* Memory Space Indicator */
 246
 247 #define PXBR_TYPE_OFFS                  1          /* BAR Type/Init Val. */
 248 #define PXBR_TYPE_MASK                  (0x3 << PXBR_TYPE_OFFS)
 249 #define PXBR_TYPE_32BIT_ADDR    (0x0 << PXBR_TYPE_OFFS)
 250 #define PXBR_TYPE_64BIT_ADDR    (0x2 << PXBR_TYPE_OFFS)
 251
 252 #define PXBR_PREFETCH_EN                BIT3    /* Prefetch Enable */
 253
 254 #define PXBR_BASE_OFFS          16              /* Base address. Address bits [31:16] */
 255 #define PXBR_BASE_MASK          (0xffff << PXBR_BASE_OFFS)
 256 #define PXBR_BASE_ALIGNMET      (1 << PXBR_BASE_OFFS)
 257
 258
 259 /* PCI Express BAR1 (High) Register*/
 260 /* PCI Express BAR2 (High) Register*/
 261 /*PEX BAR1_REG_HIGH (PXBRH)*/
 262 /*PEX BAR2_REG_HIGH (PXBRH)*/
 263
 264 #define PXBRH_BASE_OFFS                 0               /* Base address. Address bits [63:32] */
 265 #define PXBRH_BASE_MASK                 (0xffffffff << PXBRH_BASE_OFFS)
 266
 267 /* PCI Express Expansion ROM BAR Register*/
 268 /*PEX_EXPANSION_ROM_BASE_ADDR_REG (PXERBAR)*/
 269
 270 #define PXERBAR_EXPROMEN                BIT0    /* Expansion ROM Enable */
 271
 272 #define PXERBAR_BASE_512K_OFFS          19              /* Expansion ROM Base Address */
 273 #define PXERBAR_BASE_512K_MASK          (0x1fff << PXERBAR_BASE_512K_OFFS)
 274
 275 #define PXERBAR_BASE_1MB_OFFS           20              /* Expansion ROM Base Address */
 276 #define PXERBAR_BASE_1MB_MASK           (0xfff << PXERBAR_BASE_1MB_OFFS)
 277
 278 #define PXERBAR_BASE_2MB_OFFS           21              /* Expansion ROM Base Address */
 279 #define PXERBAR_BASE_2MB_MASK           (0x7ff << PXERBAR_BASE_2MB_OFFS)
 280
 281 #define PXERBAR_BASE_4MB_OFFS           22              /* Expansion ROM Base Address */
 282 #define PXERBAR_BASE_4MB_MASK           (0x3ff << PXERBAR_BASE_4MB_OFFS)
 283
 284 /* PEX Bar attributes */
 285 typedef struct _mvPexBar
 286 {
 287         MV_ADDR_WIN   addrWin;    /* An address window*/
 288         MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
 289
 290 }MV_PEX_BAR;
 291
 292 /* PEX Remap Window attributes */
 293 typedef struct _mvPexRemapWin
 294 {
 295         MV_ADDR_WIN   addrWin;    /* An address window*/
 296         MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
 297
 298 }MV_PEX_REMAP_WIN;
 299
 300 /* PEX Remap Window attributes */
 301 typedef struct _mvPexDecWin
 302 {
 303         MV_TARGET         target;
 304         MV_ADDR_WIN   addrWin;    /* An address window*/
 305         MV_U32            targetBar;
 306         MV_U8                   attrib;                 /* chip select attributes */
 307         MV_TARGET_ID    targetId;               /* Target Id of this MV_TARGET */
 308         MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
 309
 310 }MV_PEX_DEC_WIN;
 311
 312 /* Global Functions prototypes */
 313 /* mvPexHalInit - Initialize PEX interfaces*/
 314 MV_STATUS mvPexInit(MV_U32 pexIf, MV_PEX_TYPE pexType);
 315
 316
 317 /* mvPexTargetWinSet - Set PEX to peripheral target address window BAR*/
 318 MV_STATUS mvPexTargetWinSet(MV_U32 pexIf, MV_U32 winNum,
 319                             MV_PEX_DEC_WIN *pAddrDecWin);
 320
 321 /* mvPexTargetWinGet - Get PEX to peripheral target address window*/
 322 MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum,
 323                             MV_PEX_DEC_WIN *pAddrDecWin);
 324
 325 /* mvPexTargetWinEnable - Enable/disable a PEX BAR window*/
 326 MV_STATUS mvPexTargetWinEnable(MV_U32 pexIf,MV_U32 winNum, MV_BOOL enable);
 327
 328 /* mvPexTargetWinRemap - Set PEX to target address window remap.*/
 329 MV_STATUS mvPexTargetWinRemap(MV_U32 pexIf, MV_U32 winNum,
 330                            MV_PEX_REMAP_WIN *pAddrWin);
 331
 332 /* mvPexTargetWinRemapEnable -enable\disable a PEX Window remap.*/
 333 MV_STATUS mvPexTargetWinRemapEnable(MV_U32 pexIf, MV_U32 winNum,
 334                            MV_BOOL enable);
 335
 336 /* mvPexBarSet - Set PEX bar address and size */
 337 MV_STATUS mvPexBarSet(MV_U32 pexIf, MV_U32 barNum, MV_PEX_BAR *addrWin);
 338
 339 /* mvPexBarGet - Get PEX bar address and size */
 340 MV_STATUS mvPexBarGet(MV_U32 pexIf, MV_U32 barNum, MV_PEX_BAR *addrWin);
 341
 342 /* mvPexBarEnable - enable\disable a PEX bar*/
 343 MV_STATUS mvPexBarEnable(MV_U32 pexIf, MV_U32 barNum, MV_BOOL enable);
 344
 345 /* mvPexAddrDecShow - Display address decode windows attributes */
 346 MV_VOID mvPexAddrDecShow(MV_VOID);
 347
 348 #endif