1 From 6039eb63fabdd6871fc70940aa98102665c78eed Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Fri, 20 Mar 2015 23:45:29 -0700
4 Subject: [PATCH 42/69] clk: qcom: Add KPSS ACC/GCC driver
6 The ACC and GCC regions present in KPSSv1 contain registers to
7 control clocks and power to each Krait CPU and L2. For CPUfreq
8 purposes probe these devices and expose a mux clock that chooses
11 Cc: <devicetree@vger.kernel.org>
12 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
14 .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt | 7 ++
15 .../devicetree/bindings/arm/msm/qcom,kpss-gcc.txt | 28 +++++++
16 drivers/clk/qcom/Kconfig | 8 ++
17 drivers/clk/qcom/Makefile | 1 +
18 drivers/clk/qcom/kpss-xcc.c | 95 ++++++++++++++++++++++
19 5 files changed, 139 insertions(+)
20 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
21 create mode 100644 drivers/clk/qcom/kpss-xcc.c
23 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
24 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
25 @@ -21,10 +21,17 @@ PROPERTIES
26 the register region. An optional second element specifies
27 the base address and size of the alias register region.
29 +- clock-output-names:
31 + Value type: <string>
32 + Definition: Name of the output clock. Typically acpuX_aux where X is a
33 + CPU number starting at 0.
37 clock-controller@2088000 {
38 compatible = "qcom,kpss-acc-v2";
39 reg = <0x02088000 0x1000>,
41 + clock-output-names = "acpu0_aux";
44 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
46 +Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
52 + Value type: <string>
53 + Definition: should be one of:
58 + Value type: <prop-encoded-array>
59 + Definition: base address and size of the register region
61 +- clock-output-names:
63 + Value type: <string>
64 + Definition: Name of the output clock. Typically acpu_l2_aux indicating
65 + an L2 cache auxiliary clock.
69 + l2cc: clock-controller@2011000 {
70 + compatible = "qcom,kpss-gcc";
71 + reg = <0x2011000 0x1000>;
72 + clock-output-names = "acpu_l2_aux";
74 --- a/drivers/clk/qcom/Kconfig
75 +++ b/drivers/clk/qcom/Kconfig
76 @@ -188,6 +188,14 @@ config QCOM_HFPLL
77 Say Y if you want to support CPU frequency scaling on devices
78 such as MSM8974, APQ8084, etc.
81 + tristate "KPSS Clock Controller"
82 + depends on COMMON_CLK_QCOM
84 + Support for the Krait ACC and GCC clock controllers. Say Y
85 + if you want to support CPU frequency scaling on devices such
86 + as MSM8960, APQ8064, etc.
90 select KRAIT_L2_ACCESSORS
91 --- a/drivers/clk/qcom/Makefile
92 +++ b/drivers/clk/qcom/Makefile
93 @@ -33,4 +33,5 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8
94 obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
95 obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
96 obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
97 +obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
98 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
100 +++ b/drivers/clk/qcom/kpss-xcc.c
102 +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
104 + * This program is free software; you can redistribute it and/or modify
105 + * it under the terms of the GNU General Public License version 2 and
106 + * only version 2 as published by the Free Software Foundation.
108 + * This program is distributed in the hope that it will be useful,
109 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
110 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
111 + * GNU General Public License for more details.
114 +#include <linux/kernel.h>
115 +#include <linux/init.h>
116 +#include <linux/module.h>
117 +#include <linux/platform_device.h>
118 +#include <linux/err.h>
119 +#include <linux/io.h>
120 +#include <linux/of.h>
121 +#include <linux/of_device.h>
122 +#include <linux/clk.h>
123 +#include <linux/clk-provider.h>
125 +static const char *aux_parents[] = {
130 +static unsigned int aux_parent_map[] = {
135 +static const struct of_device_id kpss_xcc_match_table[] = {
136 + { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
137 + { .compatible = "qcom,kpss-gcc" },
140 +MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
142 +static int kpss_xcc_driver_probe(struct platform_device *pdev)
144 + const struct of_device_id *id;
146 + struct resource *res;
147 + void __iomem *base;
150 + id = of_match_device(kpss_xcc_match_table, &pdev->dev);
154 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
155 + base = devm_ioremap_resource(&pdev->dev, res);
157 + return PTR_ERR(base);
160 + if (of_property_read_string_index(pdev->dev.of_node,
161 + "clock-output-names", 0, &name))
165 + name = "acpu_l2_aux";
169 + clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
170 + ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
171 + 0, aux_parent_map, NULL);
173 + platform_set_drvdata(pdev, clk);
175 + return PTR_ERR_OR_ZERO(clk);
178 +static int kpss_xcc_driver_remove(struct platform_device *pdev)
180 + clk_unregister_mux(platform_get_drvdata(pdev));
184 +static struct platform_driver kpss_xcc_driver = {
185 + .probe = kpss_xcc_driver_probe,
186 + .remove = kpss_xcc_driver_remove,
188 + .name = "kpss-xcc",
189 + .of_match_table = kpss_xcc_match_table,
192 +module_platform_driver(kpss_xcc_driver);
194 +MODULE_DESCRIPTION("Krait Processor Sub System (KPSS) Clock Driver");
195 +MODULE_LICENSE("GPL v2");
196 +MODULE_ALIAS("platform:kpss-xcc");