target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW89X0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   7
   8         chosen {
   9                 bootargs = "console=ttyLTQ0,115200";
  10         };
  11
  12         aliases {
  13                 /* the power led can't be controlled, use the wps led instead */
  14                 led-boot = &wps;
  15                 led-failsafe = &wps;
  16
  17                 led-dsl = &dsl;
  18                 led-internet = &internet;
  19                 led-wifi = &wifi;
  20                 led-usb = &usb0;
  21                 led-usb2 = &usb2;
  22         };
  23
  24         memory@0 {
  25                 reg = <0x0 0x4000000>;
  26         };
  27
  28         fpi@10000000 {
  29                 gpio: pinmux@E100B10 {
  30                         pinctrl-names = "default";
  31                         pinctrl-0 = <&state_default>;
  32
  33                         state_default: pinmux {
  34                                 mdio {
  35                                         lantiq,groups = "mdio";
  36                                         lantiq,function = "mdio";
  37                                 };
  38                                 gphy-leds {
  39                                         lantiq,groups = "gphy0 led1", "gphy1 led1";
  40                                         lantiq,function = "gphy";
  41                                         lantiq,pull = <2>;
  42                                         lantiq,open-drain = <0>;
  43                                         lantiq,output = <1>;
  44                                 };
  45                                 phy-rst {
  46                                         lantiq,pins = "io42";
  47                                         lantiq,pull = <0>;
  48                                         lantiq,open-drain = <0>;
  49                                         lantiq,output = <1>;
  50                                 };
  51                                 pcie-rst {
  52                                         lantiq,pins = "io38";
  53                                         lantiq,pull = <0>;
  54                                         lantiq,output = <1>;
  55                                 };
  56                         };
  57                         pins_spi_default: pins_spi_default {
  58                                 spi_in {
  59                                         lantiq,groups = "spi_di";
  60                                         lantiq,function = "spi";
  61                                 };
  62                                 spi_out {
  63                                         lantiq,groups = "spi_do", "spi_clk",
  64                                                 "spi_cs4";
  65                                         lantiq,function = "spi";
  66                                         lantiq,output = <1>;
  67                                 };
  68                         };
  69                 };
  70
  71                 ifxhcd@E101000 {
  72                         status = "okay";
  73                         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
  74                         lantiq,portmask = <0x3>;
  75                 };
  76
  77                 ifxhcd@E106000 {
  78                         status = "okay";
  79                         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
  80                 };
  81         };
  82
  83         gphy-xrx200 {
  84                 compatible = "lantiq,phy-xrx200";
  85                 firmware = "lantiq/xrx200_phy11g_a22.bin";
  86                 phys = [ 00 01 ];
  87         };
  88
  89         gpio-keys-polled {
  90                 compatible = "gpio-keys-polled";
  91                 #address-cells = <1>;
  92                 #size-cells = <0>;
  93                 poll-interval = <100>;
  94                 reset {
  95                         label = "reset";
  96                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  97                         linux,code = <KEY_RESTART>;
  98                 };
  99
 100                 wifi {
 101                         label = "wifi";
 102                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
 103                         linux,code = <KEY_RFKILL>;
 104                         linux,input-type = <EV_SW>;
 105                 };
 106
 107                 wps {
 108                         label = "wps";
 109                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
 110                         linux,code = <KEY_WPS_BUTTON>;
 111                 };
 112         };
 113
 114         gpio-leds {
 115                 compatible = "gpio-leds";
 116                 /*
 117                         power is not controllable via gpio
 118                 */
 119                 dsl: dsl {
 120                         label = "tdw89x0:green:dsl";
 121                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
 122                 };
 123                 internet: internet {
 124                         label = "tdw89x0:green:internet";
 125                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
 126                 };
 127                 usb0: usb0 {
 128                         label = "tdw89x0:green:usb";
 129                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
 130                 };
 131                 usb2: usb2 {
 132                         label = "tdw89x0:green:usb2";
 133                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
 134                 };
 135                 wps: wps {
 136                         label = "tdw89x0:green:wps";
 137                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
 138                 };
 139         };
 140
 141         wifi-leds {
 142                 compatible = "gpio-leds";
 143
 144                 wifi: wifi {
 145                         label = "tdw89x0:green:wifi";
 146                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
 147                 };
 148         };
 149 };
 150
 151 &spi {
 152         pinctrl-names = "default";
 153         pinctrl-0 = <&pins_spi_default>;
 154
 155         status = "ok";
 156
 157         m25p80@4 {
 158                 #address-cells = <1>;
 159                 #size-cells = <1>;
 160                 compatible = "jedec,spi-nor";
 161                 reg = <4 0>;
 162                 spi-max-frequency = <33250000>;
 163                 m25p,fast-read;
 164
 165                 partitions {
 166                         compatible = "fixed-partitions";
 167                         #address-cells = <1>;
 168                         #size-cells = <1>;
 169
 170                         partition@0 {
 171                                 reg = <0x0 0x20000>;
 172                                 label = "u-boot";
 173                                 read-only;
 174                         };
 175
 176                         partition@20000 {
 177                                 reg = <0x20000 0x7a0000>;
 178                                 label = "firmware";
 179                         };
 180
 181                         partition@7c0000 {
 182                                 reg = <0x7c0000 0x10000>;
 183                                 label = "config";
 184                                 read-only;
 185                         };
 186
 187                         ath9k_cal: partition@7d0000 {
 188                                 reg = <0x7d0000 0x30000>;
 189                                 label = "boardconfig";
 190                                 read-only;
 191                         };
 192                 };
 193         };
 194 };
 195
 196 &eth0 {
 197         lan: interface@0 {
 198                 compatible = "lantiq,xrx200-pdi";
 199                 #address-cells = <1>;
 200                 #size-cells = <0>;
 201                 reg = <0>;
 202                 mtd-mac-address = <&ath9k_cal 0xf100>;
 203                 lantiq,switch;
 204
 205                 ethernet@0 {
 206                         compatible = "lantiq,xrx200-pdi-port";
 207                         reg = <0>;
 208                         phy-mode = "rgmii";
 209                         phy-handle = <&phy0>;
 210                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 211                 };
 212                 ethernet@5 {
 213                         compatible = "lantiq,xrx200-pdi-port";
 214                         reg = <5>;
 215                         phy-mode = "rgmii";
 216                         phy-handle = <&phy5>;
 217                 };
 218                 ethernet@2 {
 219                         compatible = "lantiq,xrx200-pdi-port";
 220                         reg = <2>;
 221                         phy-mode = "gmii";
 222                         phy-handle = <&phy11>;
 223                 };
 224                 ethernet@3 {
 225                         compatible = "lantiq,xrx200-pdi-port";
 226                         reg = <4>;
 227                         phy-mode = "gmii";
 228                         phy-handle = <&phy13>;
 229                 };
 230         };
 231
 232         mdio@0 {
 233                 #address-cells = <1>;
 234                 #size-cells = <0>;
 235                 compatible = "lantiq,xrx200-mdio";
 236                 phy0: ethernet-phy@0 {
 237                         reg = <0x0>;
 238                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 239                 };
 240                 phy5: ethernet-phy@5 {
 241                         reg = <0x5>;
 242                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 243                 };
 244                 phy11: ethernet-phy@11 {
 245                         reg = <0x11>;
 246                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 247                 };
 248                 phy13: ethernet-phy@13 {
 249                         reg = <0x13>;
 250                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 251                 };
 252         };
 253 };
 254
 255 &pcie0 {
 256         pcie@0 {
 257                 reg = <0 0 0 0 0>;
 258                 #interrupt-cells = <1>;
 259                 #size-cells = <2>;
 260                 #address-cells = <3>;
 261                 device_type = "pci";
 262
 263                 ath9k: wifi@168c,002e {
 264                         compatible = "pci168c,002e";
 265                         reg = <0 0 0 0 0>;
 266                         #gpio-cells = <2>;
 267                         gpio-controller;
 268                         qca,no-eeprom;
 269                         qca,disable-5ghz;
 270                         mtd-mac-address = <&ath9k_cal 0xf100>;
 271                         mtd-mac-address-increment = <2>;
 272                 };
 273         };
 274 };