layerscape: add 64b/32b target for ls1012ardb device
[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-4.4 / 8073-ls1012a-added-clock-configuration.patch
1 From 9112596c3c7b7b8b1eded3323765fa711dc58e74 Mon Sep 17 00:00:00 2001
2 From: Tang Yuantian <Yuantian.Tang@nxp.com>
3 Date: Thu, 25 Aug 2016 10:38:28 +0800
4 Subject: [PATCH 073/113] ls1012a: added clock configuration
5
6 commit c9c11181191938b77bfd61e5094a63955cf711fd
7 [context adjustment]
8 [don't apply fsl-ls1012a.dtsi]
9
10 Currently ls1012a used the clock configuration of ls1043a's.
11 But there is a little different between them. This patch added
12 ls1012a its own clock configuration.
13
14 Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
15 Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
16 ---
17 drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
18 1 file changed, 19 insertions(+)
19
20 --- a/drivers/clk/clk-qoriq.c
21 +++ b/drivers/clk/clk-qoriq.c
22 @@ -195,6 +195,14 @@ static const struct clockgen_muxinfo t10
23 }
24 };
25
26 +static const struct clockgen_muxinfo ls1012a_cmux = {
27 + {
28 + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
29 + {},
30 + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
31 + }
32 +};
33 +
34 static const struct clockgen_muxinfo t1040_cmux = {
35 {
36 [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
37 @@ -475,6 +483,16 @@ static const struct clockgen_chipinfo ch
38 .pll_mask = 0x03,
39 },
40 {
41 + .compat = "fsl,ls1012a-clockgen",
42 + .cmux_groups = {
43 + &ls1012a_cmux
44 + },
45 + .cmux_to_group = {
46 + 0, -1
47 + },
48 + .pll_mask = 0x03,
49 + },
50 + {
51 .compat = "fsl,ls1043a-clockgen",
52 .init_periph = t2080_init_periph,
53 .cmux_groups = {
54 @@ -1268,6 +1286,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qo
55 CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
56 CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
57 CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
58 +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
59
60 /* Legacy nodes */
61 CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);