target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch

   1 From 5cd461cd17c3e27e5501e499d5d865b60ee58257 Mon Sep 17 00:00:00 2001
   2 From: Gong Qianyu <Qianyu.Gong@nxp.com>
   3 Date: Mon, 26 Sep 2016 12:29:24 +0800
   4 Subject: [PATCH 130/141] ls1046a/sata: Add LS1046A sata support
   5
   6 Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
   7 Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
   8 Integated-by: Yutang Jiang <yutang.jiang@nxp.com>
   9 ---
  10  drivers/ata/ahci_qoriq.c |   13 +++++++++++++
  11  1 file changed, 13 insertions(+)
  12
  13 --- a/drivers/ata/ahci_qoriq.c
  14 +++ b/drivers/ata/ahci_qoriq.c
  15 @@ -40,11 +40,16 @@
  16  #define AHCI_PORT_PHY_5_CFG    0x192c96a4
  17  #define AHCI_PORT_TRANS_CFG    0x08000025
  18
  19 +/* for ls1046a */
  20 +#define LS1046A_PORT_PHY2      0x28184d1f
  21 +#define LS1046A_PORT_PHY3      0x0e081509
  22 +
  23  #define SATA_ECC_DISABLE       0x00020000
  24
  25  enum ahci_qoriq_type {
  26         AHCI_LS1021A,
  27         AHCI_LS1043A,
  28 +       AHCI_LS1046A,
  29         AHCI_LS2080A,
  30  };
  31
  32 @@ -57,6 +62,7 @@ struct ahci_qoriq_priv {
  33  static const struct of_device_id ahci_qoriq_of_match[] = {
  34         { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
  35         { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
  36 +       { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},
  37         { .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A},
  38         {},
  39  };
  40 @@ -158,6 +164,13 @@ static int ahci_qoriq_phy_init(struct ah
  41                 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
  42                 break;
  43
  44 +       case AHCI_LS1046A:
  45 +               writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
  46 +               writel(LS1046A_PORT_PHY2, reg_base + PORT_PHY2);
  47 +               writel(LS1046A_PORT_PHY3, reg_base + PORT_PHY3);
  48 +               writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
  49 +               break;
  50 +
  51         case AHCI_LS1043A:
  52         case AHCI_LS2080A:
  53                 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);