361f43c6b4fea292df3b88a72427e89dbb494ab4
[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-4.9 / 302-dts-support-layercape.patch
1 From 1806d342beb334c8cb0a438315ad5529262b2791 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Wed, 17 Jan 2018 14:52:50 +0800
4 Subject: [PATCH 04/30] dts: support layercape
5
6 This is an integrated patch for layerscape dts support.
7
8 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
9 Signed-off-by: Alison Wang <b18965@freescale.com>
10 Signed-off-by: Li Yang <leoyang.li@nxp.com>
11 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
12 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
13 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
14 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
15 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
16 Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
17 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
18 Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
19 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
20 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
21 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
22 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
23 Signed-off-by: Meng Yi <meng.yi@nxp.com>
24 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
25 Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
26 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
27 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
28 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
29 ---
30 arch/arm/boot/dts/alpine.dtsi | 2 +-
31 arch/arm/boot/dts/axm55xx.dtsi | 2 +-
32 arch/arm/boot/dts/ecx-2000.dts | 2 +-
33 arch/arm/boot/dts/imx6ul.dtsi | 4 +-
34 arch/arm/boot/dts/keystone.dtsi | 4 +-
35 arch/arm/boot/dts/ls1021a-qds.dts | 21 +
36 arch/arm/boot/dts/ls1021a-twr.dts | 25 +
37 arch/arm/boot/dts/ls1021a.dtsi | 197 +++--
38 arch/arm/boot/dts/mt6580.dtsi | 2 +-
39 arch/arm/boot/dts/mt6589.dtsi | 2 +-
40 arch/arm/boot/dts/mt8127.dtsi | 2 +-
41 arch/arm/boot/dts/mt8135.dtsi | 2 +-
42 arch/arm/boot/dts/rk3288.dtsi | 2 +-
43 arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
44 arch/arm/boot/dts/sun7i-a20.dtsi | 4 +-
45 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
46 arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
47 arch/arm64/boot/dts/freescale/Makefile | 17 +
48 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 123 +++
49 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++
50 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 202 +++++
51 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 138 ++++
52 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 602 ++++++++++++++
53 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 +
54 .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++
55 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++-
56 .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts | 69 ++
57 .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++
58 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 113 ++-
59 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 308 ++++++-
60 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 48 ++
61 .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 110 +++
62 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 363 ++++++++
63 .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 83 ++
64 .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 +++
65 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 218 +++++
66 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 800 ++++++++++++++++++
67 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++
68 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++
69 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 825 ++++++++++++++++++
70 arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++---
71 arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++--
72 arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +-
73 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 763 +++--------------
74 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts | 161 ++++
75 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 162 ++++
76 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 140 ++++
77 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++
78 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
79 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
80 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 919 +++++++++++++++++++++
81 .../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++
82 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 73 ++
83 .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 +
84 .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 43 +
85 .../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi | 42 +
86 .../boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi | 42 +
87 .../boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi | 42 +
88 .../boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi | 42 +
89 .../boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi | 42 +
90 .../boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi | 42 +
91 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 ++
92 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi | 130 +++
93 .../boot/dts/freescale/qoriq-qman1-portals.dtsi | 104 +++
94 arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 +
95 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +-
96 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +-
97 67 files changed, 8231 insertions(+), 1022 deletions(-)
98 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
99 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
100 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
101 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
102 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
103 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
104 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
105 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
106 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
107 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
108 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
109 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
110 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
111 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
112 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
113 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
114 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
115 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
116 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
117 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
118 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
119 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
120 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
121 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
122 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
123 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
124 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
125 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
126 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
127 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
128 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
129 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
130 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
131 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
132 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
133 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
134 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
135 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
136 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
137
138 --- a/arch/arm/boot/dts/alpine.dtsi
139 +++ b/arch/arm/boot/dts/alpine.dtsi
140 @@ -93,7 +93,7 @@
141 interrupt-controller;
142 reg = <0x0 0xfb001000 0x0 0x1000>,
143 <0x0 0xfb002000 0x0 0x2000>,
144 - <0x0 0xfb004000 0x0 0x1000>,
145 + <0x0 0xfb004000 0x0 0x2000>,
146 <0x0 0xfb006000 0x0 0x2000>;
147 interrupts =
148 <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
149 --- a/arch/arm/boot/dts/axm55xx.dtsi
150 +++ b/arch/arm/boot/dts/axm55xx.dtsi
151 @@ -62,7 +62,7 @@
152 #address-cells = <0>;
153 interrupt-controller;
154 reg = <0x20 0x01001000 0 0x1000>,
155 - <0x20 0x01002000 0 0x1000>,
156 + <0x20 0x01002000 0 0x2000>,
157 <0x20 0x01004000 0 0x2000>,
158 <0x20 0x01006000 0 0x2000>;
159 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
160 --- a/arch/arm/boot/dts/ecx-2000.dts
161 +++ b/arch/arm/boot/dts/ecx-2000.dts
162 @@ -99,7 +99,7 @@
163 interrupt-controller;
164 interrupts = <1 9 0xf04>;
165 reg = <0xfff11000 0x1000>,
166 - <0xfff12000 0x1000>,
167 + <0xfff12000 0x2000>,
168 <0xfff14000 0x2000>,
169 <0xfff16000 0x2000>;
170 };
171 --- a/arch/arm/boot/dts/imx6ul.dtsi
172 +++ b/arch/arm/boot/dts/imx6ul.dtsi
173 @@ -89,11 +89,11 @@
174 };
175
176 intc: interrupt-controller@00a01000 {
177 - compatible = "arm,cortex-a7-gic";
178 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
179 #interrupt-cells = <3>;
180 interrupt-controller;
181 reg = <0x00a01000 0x1000>,
182 - <0x00a02000 0x1000>,
183 + <0x00a02000 0x2000>,
184 <0x00a04000 0x2000>,
185 <0x00a06000 0x2000>;
186 };
187 --- a/arch/arm/boot/dts/keystone.dtsi
188 +++ b/arch/arm/boot/dts/keystone.dtsi
189 @@ -30,12 +30,12 @@
190 };
191
192 gic: interrupt-controller {
193 - compatible = "arm,cortex-a15-gic";
194 + compatible = "arm,gic-400", "arm,cortex-a15-gic";
195 #interrupt-cells = <3>;
196 interrupt-controller;
197 reg = <0x0 0x02561000 0x0 0x1000>,
198 <0x0 0x02562000 0x0 0x2000>,
199 - <0x0 0x02564000 0x0 0x1000>,
200 + <0x0 0x02564000 0x0 0x2000>,
201 <0x0 0x02566000 0x0 0x2000>;
202 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
203 IRQ_TYPE_LEVEL_HIGH)>;
204 --- a/arch/arm/boot/dts/ls1021a-qds.dts
205 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
206 @@ -124,6 +124,19 @@
207 };
208 };
209
210 +&qspi {
211 + num-cs = <2>;
212 + status = "okay";
213 +
214 + qflash0: s25fl128s@0 {
215 + compatible = "spansion,m25p80";
216 + #address-cells = <1>;
217 + #size-cells = <1>;
218 + spi-max-frequency = <20000000>;
219 + reg = <0>;
220 + };
221 +};
222 +
223 &enet0 {
224 tbi-handle = <&tbi0>;
225 phy-handle = <&sgmii_phy1c>;
226 @@ -331,3 +344,11 @@
227 &uart1 {
228 status = "okay";
229 };
230 +
231 +&can0 {
232 + status = "okay";
233 +};
234 +
235 +&can1 {
236 + status = "okay";
237 +};
238 --- a/arch/arm/boot/dts/ls1021a-twr.dts
239 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
240 @@ -142,6 +142,19 @@
241 };
242 };
243
244 +&qspi {
245 + num-cs = <2>;
246 + status = "okay";
247 +
248 + qflash0: n25q128a13@0 {
249 + compatible = "n25q128a13", "jedec,spi-nor";
250 + #address-cells = <1>;
251 + #size-cells = <1>;
252 + spi-max-frequency = <20000000>;
253 + reg = <0>;
254 + };
255 +};
256 +
257 &enet0 {
258 tbi-handle = <&tbi1>;
259 phy-handle = <&sgmii_phy2>;
260 @@ -228,6 +241,10 @@
261 };
262 };
263
264 +&esdhc {
265 + status = "okay";
266 +};
267 +
268 &sai1 {
269 status = "okay";
270 };
271 @@ -243,3 +260,11 @@
272 &uart1 {
273 status = "okay";
274 };
275 +
276 +&can0 {
277 + status = "okay";
278 +};
279 +
280 +&can1 {
281 + status = "okay";
282 +};
283 --- a/arch/arm/boot/dts/ls1021a.dtsi
284 +++ b/arch/arm/boot/dts/ls1021a.dtsi
285 @@ -74,17 +74,24 @@
286 compatible = "arm,cortex-a7";
287 device_type = "cpu";
288 reg = <0xf00>;
289 - clocks = <&cluster1_clk>;
290 + clocks = <&clockgen 1 0>;
291 };
292
293 cpu@f01 {
294 compatible = "arm,cortex-a7";
295 device_type = "cpu";
296 reg = <0xf01>;
297 - clocks = <&cluster1_clk>;
298 + clocks = <&clockgen 1 0>;
299 };
300 };
301
302 + sysclk: sysclk {
303 + compatible = "fixed-clock";
304 + #clock-cells = <0>;
305 + clock-frequency = <100000000>;
306 + clock-output-names = "sysclk";
307 + };
308 +
309 timer {
310 compatible = "arm,armv7-timer";
311 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
312 @@ -108,11 +115,11 @@
313 ranges;
314
315 gic: interrupt-controller@1400000 {
316 - compatible = "arm,cortex-a7-gic";
317 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
318 #interrupt-cells = <3>;
319 interrupt-controller;
320 reg = <0x0 0x1401000 0x0 0x1000>,
321 - <0x0 0x1402000 0x0 0x1000>,
322 + <0x0 0x1402000 0x0 0x2000>,
323 <0x0 0x1404000 0x0 0x2000>,
324 <0x0 0x1406000 0x0 0x2000>;
325 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
326 @@ -120,14 +127,14 @@
327 };
328
329 msi1: msi-controller@1570e00 {
330 - compatible = "fsl,1s1021a-msi";
331 + compatible = "fsl,ls1021a-msi";
332 reg = <0x0 0x1570e00 0x0 0x8>;
333 msi-controller;
334 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
335 };
336
337 msi2: msi-controller@1570e08 {
338 - compatible = "fsl,1s1021a-msi";
339 + compatible = "fsl,ls1021a-msi";
340 reg = <0x0 0x1570e08 0x0 0x8>;
341 msi-controller;
342 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
343 @@ -137,16 +144,17 @@
344 compatible = "fsl,ifc", "simple-bus";
345 reg = <0x0 0x1530000 0x0 0x10000>;
346 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
347 + big-endian;
348 };
349
350 dcfg: dcfg@1ee0000 {
351 compatible = "fsl,ls1021a-dcfg", "syscon";
352 - reg = <0x0 0x1ee0000 0x0 0x10000>;
353 + reg = <0x0 0x1ee0000 0x0 0x1000>;
354 big-endian;
355 };
356
357 esdhc: esdhc@1560000 {
358 - compatible = "fsl,esdhc";
359 + compatible = "fsl,ls1021a-esdhc","fsl,esdhc";
360 reg = <0x0 0x1560000 0x0 0x10000>;
361 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
362 clock-frequency = <0>;
363 @@ -163,7 +171,7 @@
364 <0x0 0x20220520 0x0 0x4>;
365 reg-names = "ahci", "sata-ecc";
366 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
367 - clocks = <&platform_clk 1>;
368 + clocks = <&clockgen 4 1>;
369 dma-coherent;
370 status = "disabled";
371 };
372 @@ -214,41 +222,10 @@
373 };
374
375 clockgen: clocking@1ee1000 {
376 - #address-cells = <1>;
377 - #size-cells = <1>;
378 - ranges = <0x0 0x0 0x1ee1000 0x10000>;
379 -
380 - sysclk: sysclk {
381 - compatible = "fixed-clock";
382 - #clock-cells = <0>;
383 - clock-output-names = "sysclk";
384 - };
385 -
386 - cga_pll1: pll@800 {
387 - compatible = "fsl,qoriq-core-pll-2.0";
388 - #clock-cells = <1>;
389 - reg = <0x800 0x10>;
390 - clocks = <&sysclk>;
391 - clock-output-names = "cga-pll1", "cga-pll1-div2",
392 - "cga-pll1-div4";
393 - };
394 -
395 - platform_clk: pll@c00 {
396 - compatible = "fsl,qoriq-core-pll-2.0";
397 - #clock-cells = <1>;
398 - reg = <0xc00 0x10>;
399 - clocks = <&sysclk>;
400 - clock-output-names = "platform-clk", "platform-clk-div2";
401 - };
402 -
403 - cluster1_clk: clk0c0@0 {
404 - compatible = "fsl,qoriq-core-mux-2.0";
405 - #clock-cells = <0>;
406 - reg = <0x0 0x10>;
407 - clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
408 - clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>;
409 - clock-output-names = "cluster1-clk";
410 - };
411 + compatible = "fsl,ls1021a-clockgen";
412 + reg = <0x0 0x1ee1000 0x0 0x1000>;
413 + #clock-cells = <2>;
414 + clocks = <&sysclk>;
415 };
416
417 dspi0: dspi@2100000 {
418 @@ -258,7 +235,7 @@
419 reg = <0x0 0x2100000 0x0 0x10000>;
420 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
421 clock-names = "dspi";
422 - clocks = <&platform_clk 1>;
423 + clocks = <&clockgen 4 1>;
424 spi-num-chipselects = <6>;
425 big-endian;
426 status = "disabled";
427 @@ -271,12 +248,27 @@
428 reg = <0x0 0x2110000 0x0 0x10000>;
429 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
430 clock-names = "dspi";
431 - clocks = <&platform_clk 1>;
432 + clocks = <&clockgen 4 1>;
433 spi-num-chipselects = <6>;
434 big-endian;
435 status = "disabled";
436 };
437
438 + qspi: quadspi@1550000 {
439 + compatible = "fsl,ls1021a-qspi";
440 + #address-cells = <1>;
441 + #size-cells = <0>;
442 + reg = <0x0 0x1550000 0x0 0x10000>,
443 + <0x0 0x40000000 0x0 0x4000000>;
444 + reg-names = "QuadSPI", "QuadSPI-memory";
445 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
446 + clock-names = "qspi_en", "qspi";
447 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
448 + big-endian;
449 + amba-base = <0x40000000>;
450 + status = "disabled";
451 + };
452 +
453 i2c0: i2c@2180000 {
454 compatible = "fsl,vf610-i2c";
455 #address-cells = <1>;
456 @@ -284,7 +276,7 @@
457 reg = <0x0 0x2180000 0x0 0x10000>;
458 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
459 clock-names = "i2c";
460 - clocks = <&platform_clk 1>;
461 + clocks = <&clockgen 4 1>;
462 status = "disabled";
463 };
464
465 @@ -295,7 +287,7 @@
466 reg = <0x0 0x2190000 0x0 0x10000>;
467 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
468 clock-names = "i2c";
469 - clocks = <&platform_clk 1>;
470 + clocks = <&clockgen 4 1>;
471 status = "disabled";
472 };
473
474 @@ -306,7 +298,7 @@
475 reg = <0x0 0x21a0000 0x0 0x10000>;
476 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
477 clock-names = "i2c";
478 - clocks = <&platform_clk 1>;
479 + clocks = <&clockgen 4 1>;
480 status = "disabled";
481 };
482
483 @@ -399,7 +391,7 @@
484 compatible = "fsl,ls1021a-lpuart";
485 reg = <0x0 0x2960000 0x0 0x1000>;
486 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
487 - clocks = <&platform_clk 1>;
488 + clocks = <&clockgen 4 1>;
489 clock-names = "ipg";
490 status = "disabled";
491 };
492 @@ -408,7 +400,7 @@
493 compatible = "fsl,ls1021a-lpuart";
494 reg = <0x0 0x2970000 0x0 0x1000>;
495 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
496 - clocks = <&platform_clk 1>;
497 + clocks = <&clockgen 4 1>;
498 clock-names = "ipg";
499 status = "disabled";
500 };
501 @@ -417,7 +409,7 @@
502 compatible = "fsl,ls1021a-lpuart";
503 reg = <0x0 0x2980000 0x0 0x1000>;
504 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
505 - clocks = <&platform_clk 1>;
506 + clocks = <&clockgen 4 1>;
507 clock-names = "ipg";
508 status = "disabled";
509 };
510 @@ -426,7 +418,7 @@
511 compatible = "fsl,ls1021a-lpuart";
512 reg = <0x0 0x2990000 0x0 0x1000>;
513 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
514 - clocks = <&platform_clk 1>;
515 + clocks = <&clockgen 4 1>;
516 clock-names = "ipg";
517 status = "disabled";
518 };
519 @@ -435,16 +427,26 @@
520 compatible = "fsl,ls1021a-lpuart";
521 reg = <0x0 0x29a0000 0x0 0x1000>;
522 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
523 - clocks = <&platform_clk 1>;
524 + clocks = <&clockgen 4 1>;
525 clock-names = "ipg";
526 status = "disabled";
527 };
528
529 + ftm0: ftm0@29d0000 {
530 + compatible = "fsl,ls1021a-ftm";
531 + reg = <0x0 0x29d0000 0x0 0x10000>,
532 + <0x0 0x1ee2140 0x0 0x4>;
533 + reg-names = "ftm", "FlexTimer1";
534 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
535 + big-endian;
536 + status = "okay";
537 + };
538 +
539 wdog0: watchdog@2ad0000 {
540 compatible = "fsl,imx21-wdt";
541 reg = <0x0 0x2ad0000 0x0 0x10000>;
542 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
543 - clocks = <&platform_clk 1>;
544 + clocks = <&clockgen 4 1>;
545 clock-names = "wdog-en";
546 big-endian;
547 };
548 @@ -454,8 +456,8 @@
549 compatible = "fsl,vf610-sai";
550 reg = <0x0 0x2b50000 0x0 0x10000>;
551 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
552 - clocks = <&platform_clk 1>, <&platform_clk 1>,
553 - <&platform_clk 1>, <&platform_clk 1>;
554 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
555 + <&clockgen 4 1>, <&clockgen 4 1>;
556 clock-names = "bus", "mclk1", "mclk2", "mclk3";
557 dma-names = "tx", "rx";
558 dmas = <&edma0 1 47>,
559 @@ -468,8 +470,8 @@
560 compatible = "fsl,vf610-sai";
561 reg = <0x0 0x2b60000 0x0 0x10000>;
562 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
563 - clocks = <&platform_clk 1>, <&platform_clk 1>,
564 - <&platform_clk 1>, <&platform_clk 1>;
565 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
566 + <&clockgen 4 1>, <&clockgen 4 1>;
567 clock-names = "bus", "mclk1", "mclk2", "mclk3";
568 dma-names = "tx", "rx";
569 dmas = <&edma0 1 45>,
570 @@ -489,16 +491,31 @@
571 dma-channels = <32>;
572 big-endian;
573 clock-names = "dmamux0", "dmamux1";
574 - clocks = <&platform_clk 1>,
575 - <&platform_clk 1>;
576 + clocks = <&clockgen 4 1>,
577 + <&clockgen 4 1>;
578 + };
579 +
580 + qdma: qdma@8390000 {
581 + compatible = "fsl,ls1021a-qdma";
582 + reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */
583 + <0x0 0x8399000 0x0 0x1000>, /* Status regs */
584 + <0x0 0x839a000 0x0 0x2000>; /* Block regs */
585 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
586 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
587 + interrupt-names = "qdma-error", "qdma-queue";
588 + channels = <8>;
589 + queues = <2>;
590 + status-sizes = <64>;
591 + queue-sizes = <64 64>;
592 + big-endian;
593 };
594
595 dcu: dcu@2ce0000 {
596 compatible = "fsl,ls1021a-dcu";
597 reg = <0x0 0x2ce0000 0x0 0x10000>;
598 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
599 - clocks = <&platform_clk 0>,
600 - <&platform_clk 0>;
601 + clocks = <&clockgen 4 0>,
602 + <&clockgen 4 0>;
603 clock-names = "dcu", "pix";
604 big-endian;
605 status = "disabled";
606 @@ -626,6 +643,8 @@
607 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
608 dr_mode = "host";
609 snps,quirk-frame-length-adjustment = <0x20>;
610 + configure-gfladj;
611 + dma-coherent;
612 snps,dis_rxdet_inp3_quirk;
613 };
614
615 @@ -634,7 +653,9 @@
616 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
617 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
618 reg-names = "regs", "config";
619 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
620 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
621 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
622 + interrupt-names = "pme", "aer";
623 fsl,pcie-scfg = <&scfg 0>;
624 #address-cells = <3>;
625 #size-cells = <2>;
626 @@ -643,7 +664,7 @@
627 bus-range = <0x0 0xff>;
628 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
629 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
630 - msi-parent = <&msi1>;
631 + msi-parent = <&msi1>, <&msi2>;
632 #interrupt-cells = <1>;
633 interrupt-map-mask = <0 0 0 7>;
634 interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
635 @@ -657,7 +678,9 @@
636 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
637 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
638 reg-names = "regs", "config";
639 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
640 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
641 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
642 + interrupt-names = "pme", "aer";
643 fsl,pcie-scfg = <&scfg 1>;
644 #address-cells = <3>;
645 #size-cells = <2>;
646 @@ -666,7 +689,7 @@
647 bus-range = <0x0 0xff>;
648 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
649 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
650 - msi-parent = <&msi2>;
651 + msi-parent = <&msi1>, <&msi2>;
652 #interrupt-cells = <1>;
653 interrupt-map-mask = <0 0 0 7>;
654 interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
655 @@ -674,5 +697,45 @@
656 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
657 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
658 };
659 +
660 + can0: can@2a70000 {
661 + compatible = "fsl,ls1021ar2-flexcan";
662 + reg = <0x0 0x2a70000 0x0 0x1000>;
663 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
664 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
665 + clock-names = "ipg", "per";
666 + big-endian;
667 + status = "disabled";
668 + };
669 +
670 + can1: can@2a80000 {
671 + compatible = "fsl,ls1021ar2-flexcan";
672 + reg = <0x0 0x2a80000 0x0 0x1000>;
673 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
674 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
675 + clock-names = "ipg", "per";
676 + big-endian;
677 + status = "disabled";
678 + };
679 +
680 + can2: can@2a90000 {
681 + compatible = "fsl,ls1021ar2-flexcan";
682 + reg = <0x0 0x2a90000 0x0 0x1000>;
683 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
684 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
685 + clock-names = "ipg", "per";
686 + big-endian;
687 + status = "disabled";
688 + };
689 +
690 + can3: can@2aa0000 {
691 + compatible = "fsl,ls1021ar2-flexcan";
692 + reg = <0x0 0x2aa0000 0x0 0x1000>;
693 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
694 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
695 + clock-names = "ipg", "per";
696 + big-endian;
697 + status = "disabled";
698 + };
699 };
700 };
701 --- a/arch/arm/boot/dts/mt6580.dtsi
702 +++ b/arch/arm/boot/dts/mt6580.dtsi
703 @@ -91,7 +91,7 @@
704 #interrupt-cells = <3>;
705 interrupt-parent = <&gic>;
706 reg = <0x10211000 0x1000>,
707 - <0x10212000 0x1000>,
708 + <0x10212000 0x2000>,
709 <0x10214000 0x2000>,
710 <0x10216000 0x2000>;
711 };
712 --- a/arch/arm/boot/dts/mt6589.dtsi
713 +++ b/arch/arm/boot/dts/mt6589.dtsi
714 @@ -102,7 +102,7 @@
715 #interrupt-cells = <3>;
716 interrupt-parent = <&gic>;
717 reg = <0x10211000 0x1000>,
718 - <0x10212000 0x1000>,
719 + <0x10212000 0x2000>,
720 <0x10214000 0x2000>,
721 <0x10216000 0x2000>;
722 };
723 --- a/arch/arm/boot/dts/mt8127.dtsi
724 +++ b/arch/arm/boot/dts/mt8127.dtsi
725 @@ -129,7 +129,7 @@
726 #interrupt-cells = <3>;
727 interrupt-parent = <&gic>;
728 reg = <0 0x10211000 0 0x1000>,
729 - <0 0x10212000 0 0x1000>,
730 + <0 0x10212000 0 0x2000>,
731 <0 0x10214000 0 0x2000>,
732 <0 0x10216000 0 0x2000>;
733 };
734 --- a/arch/arm/boot/dts/mt8135.dtsi
735 +++ b/arch/arm/boot/dts/mt8135.dtsi
736 @@ -221,7 +221,7 @@
737 #interrupt-cells = <3>;
738 interrupt-parent = <&gic>;
739 reg = <0 0x10211000 0 0x1000>,
740 - <0 0x10212000 0 0x1000>,
741 + <0 0x10212000 0 0x2000>,
742 <0 0x10214000 0 0x2000>,
743 <0 0x10216000 0 0x2000>;
744 };
745 --- a/arch/arm/boot/dts/rk3288.dtsi
746 +++ b/arch/arm/boot/dts/rk3288.dtsi
747 @@ -1109,7 +1109,7 @@
748 #address-cells = <0>;
749
750 reg = <0xffc01000 0x1000>,
751 - <0xffc02000 0x1000>,
752 + <0xffc02000 0x2000>,
753 <0xffc04000 0x2000>,
754 <0xffc06000 0x2000>;
755 interrupts = <GIC_PPI 9 0xf04>;
756 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
757 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
758 @@ -791,7 +791,7 @@
759 gic: interrupt-controller@01c81000 {
760 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
761 reg = <0x01c81000 0x1000>,
762 - <0x01c82000 0x1000>,
763 + <0x01c82000 0x2000>,
764 <0x01c84000 0x2000>,
765 <0x01c86000 0x2000>;
766 interrupt-controller;
767 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
768 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
769 @@ -1685,9 +1685,9 @@
770 };
771
772 gic: interrupt-controller@01c81000 {
773 - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
774 + compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
775 reg = <0x01c81000 0x1000>,
776 - <0x01c82000 0x1000>,
777 + <0x01c82000 0x2000>,
778 <0x01c84000 0x2000>,
779 <0x01c86000 0x2000>;
780 interrupt-controller;
781 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
782 +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
783 @@ -488,7 +488,7 @@
784 gic: interrupt-controller@01c81000 {
785 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
786 reg = <0x01c81000 0x1000>,
787 - <0x01c82000 0x1000>,
788 + <0x01c82000 0x2000>,
789 <0x01c84000 0x2000>,
790 <0x01c86000 0x2000>;
791 interrupt-controller;
792 --- a/arch/arm/boot/dts/sun9i-a80.dtsi
793 +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
794 @@ -613,7 +613,7 @@
795 gic: interrupt-controller@01c41000 {
796 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
797 reg = <0x01c41000 0x1000>,
798 - <0x01c42000 0x1000>,
799 + <0x01c42000 0x2000>,
800 <0x01c44000 0x2000>,
801 <0x01c46000 0x2000>;
802 interrupt-controller;
803 --- a/arch/arm64/boot/dts/freescale/Makefile
804 +++ b/arch/arm64/boot/dts/freescale/Makefile
805 @@ -1,8 +1,25 @@
806 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
807 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
808 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
809 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
810 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
811 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
812 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
813 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
814 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
815 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
816 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
817 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
818 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
819 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
820 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
821 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
822 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
823 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
824 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
825 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
826 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
827 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
828
829 always := $(dtb-y)
830 subdir-y := $(dts-dirs)
831 --- /dev/null
832 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
833 @@ -0,0 +1,123 @@
834 +/*
835 + * Device Tree file for NXP LS1012A 2G5RDB Board.
836 + *
837 + * Copyright 2017 NXP
838 + *
839 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
840 + *
841 + * This file is dual-licensed: you can use it either under the terms
842 + * of the GPLv2 or the X11 license, at your option. Note that this dual
843 + * licensing only applies to this file, and not this project as a
844 + * whole.
845 + *
846 + * a) This library is free software; you can redistribute it and/or
847 + * modify it under the terms of the GNU General Public License as
848 + * published by the Free Software Foundation; either version 2 of the
849 + * License, or (at your option) any later version.
850 + *
851 + * This library is distributed in the hope that it will be useful,
852 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
853 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
854 + * GNU General Public License for more details.
855 + *
856 + * Or, alternatively,
857 + *
858 + * b) Permission is hereby granted, free of charge, to any person
859 + * obtaining a copy of this software and associated documentation
860 + * files (the "Software"), to deal in the Software without
861 + * restriction, including without limitation the rights to use,
862 + * copy, modify, merge, publish, distribute, sublicense, and/or
863 + * sell copies of the Software, and to permit persons to whom the
864 + * Software is furnished to do so, subject to the following
865 + * conditions:
866 + *
867 + * The above copyright notice and this permission notice shall be
868 + * included in all copies or substantial portions of the Software.
869 + *
870 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
871 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
872 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
873 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
874 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
875 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
876 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
877 + * OTHER DEALINGS IN THE SOFTWARE.
878 + */
879 +/dts-v1/;
880 +
881 +#include "fsl-ls1012a.dtsi"
882 +
883 +/ {
884 + model = "LS1012A 2G5RDB Board";
885 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
886 +
887 + aliases {
888 + ethernet0 = &pfe_mac0;
889 + ethernet1 = &pfe_mac1;
890 + };
891 +};
892 +
893 +&duart0 {
894 + status = "okay";
895 +};
896 +
897 +&i2c0 {
898 + status = "okay";
899 +};
900 +
901 +&qspi {
902 + num-cs = <2>;
903 + bus-num = <0>;
904 + status = "okay";
905 +
906 + qflash0: s25fs512s@0 {
907 + compatible = "spansion,m25p80";
908 + #address-cells = <1>;
909 + #size-cells = <1>;
910 + spi-max-frequency = <20000000>;
911 + m25p,fast-read;
912 + reg = <0>;
913 + };
914 +};
915 +
916 +&sata {
917 + status = "okay";
918 +};
919 +
920 +&pfe {
921 + status = "okay";
922 + #address-cells = <1>;
923 + #size-cells = <0>;
924 +
925 + ethernet@0 {
926 + compatible = "fsl,pfe-gemac-port";
927 + #address-cells = <1>;
928 + #size-cells = <0>;
929 + reg = <0x0>; /* GEM_ID */
930 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
931 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
932 + fsl,mdio-mux-val = <0x0>;
933 + phy-mode = "sgmii-2500";
934 + fsl,pfe-phy-if-flags = <0x0>;
935 +
936 + mdio@0 {
937 + reg = <0x1>; /* enabled/disabled */
938 + };
939 + };
940 +
941 + ethernet@1 {
942 + compatible = "fsl,pfe-gemac-port";
943 + #address-cells = <1>;
944 + #size-cells = <0>;
945 + reg = <0x1>; /* GEM_ID */
946 + fsl,gemac-bus-id = < 0x0>; /* BUS_ID */
947 + fsl,gemac-phy-id = < 0x2>; /* PHY_ID */
948 + fsl,mdio-mux-val = <0x0>;
949 + phy-mode = "sgmii-2500";
950 + fsl,pfe-phy-if-flags = <0x0>;
951 +
952 + mdio@0 {
953 + reg = <0x0>; /* enabled/disabled */
954 + };
955 + };
956 +};
957 --- /dev/null
958 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
959 @@ -0,0 +1,177 @@
960 +/*
961 + * Device Tree file for Freescale LS1012A Freedom Board.
962 + *
963 + * Copyright 2016 Freescale Semiconductor, Inc.
964 + *
965 + * This file is dual-licensed: you can use it either under the terms
966 + * of the GPLv2 or the X11 license, at your option. Note that this dual
967 + * licensing only applies to this file, and not this project as a
968 + * whole.
969 + *
970 + * a) This library is free software; you can redistribute it and/or
971 + * modify it under the terms of the GNU General Public License as
972 + * published by the Free Software Foundation; either version 2 of the
973 + * License, or (at your option) any later version.
974 + *
975 + * This library is distributed in the hope that it will be useful,
976 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
977 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
978 + * GNU General Public License for more details.
979 + *
980 + * Or, alternatively,
981 + *
982 + * b) Permission is hereby granted, free of charge, to any person
983 + * obtaining a copy of this software and associated documentation
984 + * files (the "Software"), to deal in the Software without
985 + * restriction, including without limitation the rights to use,
986 + * copy, modify, merge, publish, distribute, sublicense, and/or
987 + * sell copies of the Software, and to permit persons to whom the
988 + * Software is furnished to do so, subject to the following
989 + * conditions:
990 + *
991 + * The above copyright notice and this permission notice shall be
992 + * included in all copies or substantial portions of the Software.
993 + *
994 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
995 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
996 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
997 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
998 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
999 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1000 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1001 + * OTHER DEALINGS IN THE SOFTWARE.
1002 + */
1003 +/dts-v1/;
1004 +
1005 +#include "fsl-ls1012a.dtsi"
1006 +
1007 +/ {
1008 + model = "LS1012A Freedom Board";
1009 + compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1010 +
1011 + aliases {
1012 + ethernet0 = &pfe_mac0;
1013 + ethernet1 = &pfe_mac1;
1014 + };
1015 +
1016 + sys_mclk: clock-mclk {
1017 + compatible = "fixed-clock";
1018 + #clock-cells = <0>;
1019 + clock-frequency = <25000000>;
1020 + };
1021 +
1022 + reg_1p8v: regulator-1p8v {
1023 + compatible = "regulator-fixed";
1024 + regulator-name = "1P8V";
1025 + regulator-min-microvolt = <1800000>;
1026 + regulator-max-microvolt = <1800000>;
1027 + regulator-always-on;
1028 + };
1029 +
1030 + sound {
1031 + compatible = "simple-audio-card";
1032 + simple-audio-card,format = "i2s";
1033 + simple-audio-card,widgets =
1034 + "Microphone", "Microphone Jack",
1035 + "Headphone", "Headphone Jack",
1036 + "Speaker", "Speaker Ext",
1037 + "Line", "Line In Jack";
1038 + simple-audio-card,routing =
1039 + "MIC_IN", "Microphone Jack",
1040 + "Microphone Jack", "Mic Bias",
1041 + "LINE_IN", "Line In Jack",
1042 + "Headphone Jack", "HP_OUT",
1043 + "Speaker Ext", "LINE_OUT";
1044 +
1045 + simple-audio-card,cpu {
1046 + sound-dai = <&sai2>;
1047 + frame-master;
1048 + bitclock-master;
1049 + };
1050 +
1051 + simple-audio-card,codec {
1052 + sound-dai = <&codec>;
1053 + frame-master;
1054 + bitclock-master;
1055 + system-clock-frequency = <25000000>;
1056 + };
1057 + };
1058 +};
1059 +
1060 +&duart0 {
1061 + status = "okay";
1062 +};
1063 +
1064 +&i2c0 {
1065 + status = "okay";
1066 +
1067 + codec: sgtl5000@a {
1068 + #sound-dai-cells = <0>;
1069 + compatible = "fsl,sgtl5000";
1070 + reg = <0xa>;
1071 + VDDA-supply = <&reg_1p8v>;
1072 + VDDIO-supply = <&reg_1p8v>;
1073 + clocks = <&sys_mclk>;
1074 + };
1075 +};
1076 +
1077 +&qspi {
1078 + num-cs = <1>;
1079 + bus-num = <0>;
1080 + status = "okay";
1081 +
1082 + qflash0: s25fs512s@0 {
1083 + compatible = "spansion,m25p80";
1084 + #address-cells = <1>;
1085 + #size-cells = <1>;
1086 + m25p,fast-read;
1087 + spi-max-frequency = <20000000>;
1088 + reg = <0>;
1089 + };
1090 +};
1091 +
1092 +&pfe {
1093 + status = "okay";
1094 + #address-cells = <1>;
1095 + #size-cells = <0>;
1096 +
1097 + ethernet@0 {
1098 + compatible = "fsl,pfe-gemac-port";
1099 + #address-cells = <1>;
1100 + #size-cells = <0>;
1101 + reg = <0x0>; /* GEM_ID */
1102 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1103 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1104 + fsl,mdio-mux-val = <0x0>;
1105 + phy-mode = "sgmii";
1106 + fsl,pfe-phy-if-flags = <0x0>;
1107 +
1108 + mdio@0 {
1109 + reg = <0x1>; /* enabled/disabled */
1110 + };
1111 + };
1112 +
1113 + ethernet@1 {
1114 + compatible = "fsl,pfe-gemac-port";
1115 + #address-cells = <1>;
1116 + #size-cells = <0>;
1117 + reg = <0x1>; /* GEM_ID */
1118 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
1119 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
1120 + fsl,mdio-mux-val = <0x0>;
1121 + phy-mode = "sgmii";
1122 + fsl,pfe-phy-if-flags = <0x0>;
1123 +
1124 + mdio@0 {
1125 + reg = <0x0>; /* enabled/disabled */
1126 + };
1127 + };
1128 +};
1129 +
1130 +&sai2 {
1131 + status = "okay";
1132 +};
1133 +
1134 +&sata {
1135 + status = "okay";
1136 +};
1137 --- /dev/null
1138 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1139 @@ -0,0 +1,202 @@
1140 +/*
1141 + * Device Tree file for Freescale LS1012A QDS Board.
1142 + *
1143 + * Copyright 2016 Freescale Semiconductor, Inc.
1144 + *
1145 + * This file is dual-licensed: you can use it either under the terms
1146 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1147 + * licensing only applies to this file, and not this project as a
1148 + * whole.
1149 + *
1150 + * a) This library is free software; you can redistribute it and/or
1151 + * modify it under the terms of the GNU General Public License as
1152 + * published by the Free Software Foundation; either version 2 of the
1153 + * License, or (at your option) any later version.
1154 + *
1155 + * This library is distributed in the hope that it will be useful,
1156 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1157 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1158 + * GNU General Public License for more details.
1159 + *
1160 + * Or, alternatively,
1161 + *
1162 + * b) Permission is hereby granted, free of charge, to any person
1163 + * obtaining a copy of this software and associated documentation
1164 + * files (the "Software"), to deal in the Software without
1165 + * restriction, including without limitation the rights to use,
1166 + * copy, modify, merge, publish, distribute, sublicense, and/or
1167 + * sell copies of the Software, and to permit persons to whom the
1168 + * Software is furnished to do so, subject to the following
1169 + * conditions:
1170 + *
1171 + * The above copyright notice and this permission notice shall be
1172 + * included in all copies or substantial portions of the Software.
1173 + *
1174 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1175 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1176 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1177 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1178 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1179 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1180 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1181 + * OTHER DEALINGS IN THE SOFTWARE.
1182 + */
1183 +/dts-v1/;
1184 +
1185 +#include "fsl-ls1012a.dtsi"
1186 +
1187 +/ {
1188 + model = "LS1012A QDS Board";
1189 + compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1190 +
1191 + aliases {
1192 + ethernet0 = &pfe_mac0;
1193 + ethernet1 = &pfe_mac1;
1194 + };
1195 +
1196 + sys_mclk: clock-mclk {
1197 + compatible = "fixed-clock";
1198 + #clock-cells = <0>;
1199 + clock-frequency = <24576000>;
1200 + };
1201 +
1202 + reg_3p3v: regulator-3p3v {
1203 + compatible = "regulator-fixed";
1204 + regulator-name = "3P3V";
1205 + regulator-min-microvolt = <3300000>;
1206 + regulator-max-microvolt = <3300000>;
1207 + regulator-always-on;
1208 + };
1209 +
1210 + sound {
1211 + compatible = "simple-audio-card";
1212 + simple-audio-card,format = "i2s";
1213 + simple-audio-card,widgets =
1214 + "Microphone", "Microphone Jack",
1215 + "Headphone", "Headphone Jack",
1216 + "Speaker", "Speaker Ext",
1217 + "Line", "Line In Jack";
1218 + simple-audio-card,routing =
1219 + "MIC_IN", "Microphone Jack",
1220 + "Microphone Jack", "Mic Bias",
1221 + "LINE_IN", "Line In Jack",
1222 + "Headphone Jack", "HP_OUT",
1223 + "Speaker Ext", "LINE_OUT";
1224 +
1225 + simple-audio-card,cpu {
1226 + sound-dai = <&sai2>;
1227 + frame-master;
1228 + bitclock-master;
1229 + };
1230 +
1231 + simple-audio-card,codec {
1232 + sound-dai = <&codec>;
1233 + frame-master;
1234 + bitclock-master;
1235 + system-clock-frequency = <24576000>;
1236 + };
1237 + };
1238 +};
1239 +
1240 +&pcie {
1241 + status = "okay";
1242 +};
1243 +
1244 +&duart0 {
1245 + status = "okay";
1246 +};
1247 +
1248 +&i2c0 {
1249 + status = "okay";
1250 +
1251 + pca9547@77 {
1252 + compatible = "nxp,pca9547";
1253 + reg = <0x77>;
1254 + #address-cells = <1>;
1255 + #size-cells = <0>;
1256 +
1257 + i2c@4 {
1258 + #address-cells = <1>;
1259 + #size-cells = <0>;
1260 + reg = <0x4>;
1261 +
1262 + codec: sgtl5000@a {
1263 + #sound-dai-cells = <0>;
1264 + compatible = "fsl,sgtl5000";
1265 + reg = <0xa>;
1266 + VDDA-supply = <&reg_3p3v>;
1267 + VDDIO-supply = <&reg_3p3v>;
1268 + clocks = <&sys_mclk>;
1269 + };
1270 + };
1271 + };
1272 +};
1273 +
1274 +&qspi {
1275 + num-cs = <2>;
1276 + bus-num = <0>;
1277 + status = "okay";
1278 +
1279 + qflash0: s25fs512s@0 {
1280 + compatible = "spansion,m25p80";
1281 + #address-cells = <1>;
1282 + #size-cells = <1>;
1283 + spi-max-frequency = <20000000>;
1284 + m25p,fast-read;
1285 + reg = <0>;
1286 + };
1287 +};
1288 +
1289 +&pfe {
1290 + status = "okay";
1291 + #address-cells = <1>;
1292 + #size-cells = <0>;
1293 +
1294 + ethernet@0 {
1295 + compatible = "fsl,pfe-gemac-port";
1296 + #address-cells = <1>;
1297 + #size-cells = <0>;
1298 + reg = <0x0>; /* GEM_ID */
1299 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1300 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
1301 + fsl,mdio-mux-val = <0x2>;
1302 + phy-mode = "sgmii-2500";
1303 + fsl,pfe-phy-if-flags = <0x0>;
1304 +
1305 + mdio@0 {
1306 + reg = <0x1>; /* enabled/disabled */
1307 + };
1308 + };
1309 +
1310 + ethernet@1 {
1311 + compatible = "fsl,pfe-gemac-port";
1312 + #address-cells = <1>;
1313 + #size-cells = <0>;
1314 + reg = <0x1>; /* GEM_ID */
1315 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
1316 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1317 + fsl,mdio-mux-val = <0x3>;
1318 + phy-mode = "sgmii-2500";
1319 + fsl,pfe-phy-if-flags = <0x0>;
1320 +
1321 + mdio@0 {
1322 + reg = <0x0>; /* enabled/disabled */
1323 + };
1324 + };
1325 +};
1326 +
1327 +&sai2 {
1328 + status = "okay";
1329 +};
1330 +
1331 +&sata {
1332 + status = "okay";
1333 +};
1334 +
1335 +&esdhc0 {
1336 + status = "okay";
1337 +};
1338 +
1339 +&esdhc1 {
1340 + status = "okay";
1341 +};
1342 --- /dev/null
1343 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1344 @@ -0,0 +1,138 @@
1345 +/*
1346 + * Device Tree file for Freescale LS1012A RDB Board.
1347 + *
1348 + * Copyright 2016 Freescale Semiconductor, Inc.
1349 + *
1350 + * This file is dual-licensed: you can use it either under the terms
1351 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1352 + * licensing only applies to this file, and not this project as a
1353 + * whole.
1354 + *
1355 + * a) This library is free software; you can redistribute it and/or
1356 + * modify it under the terms of the GNU General Public License as
1357 + * published by the Free Software Foundation; either version 2 of the
1358 + * License, or (at your option) any later version.
1359 + *
1360 + * This library is distributed in the hope that it will be useful,
1361 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1362 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1363 + * GNU General Public License for more details.
1364 + *
1365 + * Or, alternatively,
1366 + *
1367 + * b) Permission is hereby granted, free of charge, to any person
1368 + * obtaining a copy of this software and associated documentation
1369 + * files (the "Software"), to deal in the Software without
1370 + * restriction, including without limitation the rights to use,
1371 + * copy, modify, merge, publish, distribute, sublicense, and/or
1372 + * sell copies of the Software, and to permit persons to whom the
1373 + * Software is furnished to do so, subject to the following
1374 + * conditions:
1375 + *
1376 + * The above copyright notice and this permission notice shall be
1377 + * included in all copies or substantial portions of the Software.
1378 + *
1379 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1380 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1381 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1382 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1383 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1384 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1385 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1386 + * OTHER DEALINGS IN THE SOFTWARE.
1387 + */
1388 +/dts-v1/;
1389 +
1390 +#include "fsl-ls1012a.dtsi"
1391 +
1392 +/ {
1393 + model = "LS1012A RDB Board";
1394 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1395 +
1396 + aliases {
1397 + ethernet0 = &pfe_mac0;
1398 + ethernet1 = &pfe_mac1;
1399 + };
1400 +};
1401 +
1402 +&pcie {
1403 + status = "okay";
1404 +};
1405 +
1406 +&duart0 {
1407 + status = "okay";
1408 +};
1409 +
1410 +&i2c0 {
1411 + status = "okay";
1412 +};
1413 +
1414 +&qspi {
1415 + num-cs = <2>;
1416 + bus-num = <0>;
1417 + status = "okay";
1418 +
1419 + qflash0: s25fs512s@0 {
1420 + compatible = "spansion,m25p80";
1421 + #address-cells = <1>;
1422 + #size-cells = <1>;
1423 + spi-max-frequency = <20000000>;
1424 + m25p,fast-read;
1425 + reg = <0>;
1426 + };
1427 +};
1428 +
1429 +&sata {
1430 + status = "okay";
1431 +};
1432 +
1433 +&esdhc0 {
1434 + sd-uhs-sdr104;
1435 + sd-uhs-sdr50;
1436 + sd-uhs-sdr25;
1437 + sd-uhs-sdr12;
1438 + status = "okay";
1439 +};
1440 +
1441 +&esdhc1 {
1442 + mmc-hs200-1_8v;
1443 + status = "okay";
1444 +};
1445 +
1446 +&pfe {
1447 + status = "okay";
1448 + #address-cells = <1>;
1449 + #size-cells = <0>;
1450 +
1451 + ethernet@0 {
1452 + compatible = "fsl,pfe-gemac-port";
1453 + #address-cells = <1>;
1454 + #size-cells = <0>;
1455 + reg = <0x0>; /* GEM_ID */
1456 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1457 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1458 + fsl,mdio-mux-val = <0x0>;
1459 + phy-mode = "sgmii";
1460 + fsl,pfe-phy-if-flags = <0x0>;
1461 +
1462 + mdio@0 {
1463 + reg = <0x1>; /* enabled/disabled */
1464 + };
1465 + };
1466 +
1467 + ethernet@1 {
1468 + compatible = "fsl,pfe-gemac-port";
1469 + #address-cells = <1>;
1470 + #size-cells = <0>;
1471 + reg = <0x1>; /* GEM_ID */
1472 + fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
1473 + fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
1474 + fsl,mdio-mux-val = <0x0>;
1475 + phy-mode = "rgmii-txid";
1476 + fsl,pfe-phy-if-flags = <0x0>;
1477 +
1478 + mdio@0 {
1479 + reg = <0x0>; /* enabled/disabled */
1480 + };
1481 + };
1482 +};
1483 --- /dev/null
1484 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1485 @@ -0,0 +1,602 @@
1486 +/*
1487 + * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1488 + *
1489 + * Copyright 2016 Freescale Semiconductor, Inc.
1490 + *
1491 + * This file is dual-licensed: you can use it either under the terms
1492 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1493 + * licensing only applies to this file, and not this project as a
1494 + * whole.
1495 + *
1496 + * a) This library is free software; you can redistribute it and/or
1497 + * modify it under the terms of the GNU General Public License as
1498 + * published by the Free Software Foundation; either version 2 of the
1499 + * License, or (at your option) any later version.
1500 + *
1501 + * This library is distributed in the hope that it will be useful,
1502 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1503 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1504 + * GNU General Public License for more details.
1505 + *
1506 + * Or, alternatively,
1507 + *
1508 + * b) Permission is hereby granted, free of charge, to any person
1509 + * obtaining a copy of this software and associated documentation
1510 + * files (the "Software"), to deal in the Software without
1511 + * restriction, including without limitation the rights to use,
1512 + * copy, modify, merge, publish, distribute, sublicense, and/or
1513 + * sell copies of the Software, and to permit persons to whom the
1514 + * Software is furnished to do so, subject to the following
1515 + * conditions:
1516 + *
1517 + * The above copyright notice and this permission notice shall be
1518 + * included in all copies or substantial portions of the Software.
1519 + *
1520 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1521 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1522 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1523 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1524 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1525 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1526 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1527 + * OTHER DEALINGS IN THE SOFTWARE.
1528 + */
1529 +
1530 +#include <dt-bindings/interrupt-controller/arm-gic.h>
1531 +#include <dt-bindings/thermal/thermal.h>
1532 +
1533 +/ {
1534 + compatible = "fsl,ls1012a";
1535 + interrupt-parent = <&gic>;
1536 + #address-cells = <2>;
1537 + #size-cells = <2>;
1538 +
1539 + aliases {
1540 + crypto = &crypto;
1541 + rtic_a = &rtic_a;
1542 + rtic_b = &rtic_b;
1543 + rtic_c = &rtic_c;
1544 + rtic_d = &rtic_d;
1545 + sec_mon = &sec_mon;
1546 + };
1547 +
1548 + cpus {
1549 + #address-cells = <1>;
1550 + #size-cells = <0>;
1551 +
1552 + cpu0: cpu@0 {
1553 + device_type = "cpu";
1554 + compatible = "arm,cortex-a53";
1555 + reg = <0x0>;
1556 + clocks = <&clockgen 1 0>;
1557 + #cooling-cells = <2>;
1558 + cpu-idle-states = <&CPU_PH20>;
1559 + };
1560 + };
1561 +
1562 + idle-states {
1563 + /*
1564 + * PSCI node is not added default, U-boot will add missing
1565 + * parts if it determines to use PSCI.
1566 + */
1567 + entry-method = "arm,psci";
1568 +
1569 + CPU_PH20: cpu-ph20 {
1570 + compatible = "arm,idle-state";
1571 + idle-state-name = "PH20";
1572 + arm,psci-suspend-param = <0x0>;
1573 + entry-latency-us = <1000>;
1574 + exit-latency-us = <1000>;
1575 + min-residency-us = <3000>;
1576 + };
1577 + };
1578 +
1579 + sysclk: sysclk {
1580 + compatible = "fixed-clock";
1581 + #clock-cells = <0>;
1582 + clock-frequency = <125000000>;
1583 + clock-output-names = "sysclk";
1584 + };
1585 +
1586 + coreclk: coreclk {
1587 + compatible = "fixed-clock";
1588 + #clock-cells = <0>;
1589 + clock-frequency = <100000000>;
1590 + clock-output-names = "coreclk";
1591 + };
1592 +
1593 + timer {
1594 + compatible = "arm,armv8-timer";
1595 + interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
1596 + <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
1597 + <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
1598 + <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
1599 + };
1600 +
1601 + pmu {
1602 + compatible = "arm,armv8-pmuv3";
1603 + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
1604 + };
1605 +
1606 + gic: interrupt-controller@1400000 {
1607 + compatible = "arm,gic-400";
1608 + #interrupt-cells = <3>;
1609 + interrupt-controller;
1610 + reg = <0x0 0x1401000 0 0x1000>, /* GICD */
1611 + <0x0 0x1402000 0 0x2000>, /* GICC */
1612 + <0x0 0x1404000 0 0x2000>, /* GICH */
1613 + <0x0 0x1406000 0 0x2000>; /* GICV */
1614 + interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
1615 + };
1616 +
1617 + reboot {
1618 + compatible = "syscon-reboot";
1619 + regmap = <&dcfg>;
1620 + offset = <0xb0>;
1621 + mask = <0x02>;
1622 + };
1623 +
1624 + soc {
1625 + compatible = "simple-bus";
1626 + #address-cells = <2>;
1627 + #size-cells = <2>;
1628 + ranges;
1629 +
1630 + scfg: scfg@1570000 {
1631 + compatible = "fsl,ls1012a-scfg", "syscon";
1632 + reg = <0x0 0x1570000 0x0 0x10000>;
1633 + big-endian;
1634 + };
1635 +
1636 + crypto: crypto@1700000 {
1637 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
1638 + "fsl,sec-v4.0";
1639 + fsl,sec-era = <8>;
1640 + #address-cells = <1>;
1641 + #size-cells = <1>;
1642 + ranges = <0x0 0x00 0x1700000 0x100000>;
1643 + reg = <0x00 0x1700000 0x0 0x100000>;
1644 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
1645 +
1646 + sec_jr0: jr@10000 {
1647 + compatible = "fsl,sec-v5.4-job-ring",
1648 + "fsl,sec-v5.0-job-ring",
1649 + "fsl,sec-v4.0-job-ring";
1650 + reg = <0x10000 0x10000>;
1651 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1652 + };
1653 +
1654 + sec_jr1: jr@20000 {
1655 + compatible = "fsl,sec-v5.4-job-ring",
1656 + "fsl,sec-v5.0-job-ring",
1657 + "fsl,sec-v4.0-job-ring";
1658 + reg = <0x20000 0x10000>;
1659 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1660 + };
1661 +
1662 + sec_jr2: jr@30000 {
1663 + compatible = "fsl,sec-v5.4-job-ring",
1664 + "fsl,sec-v5.0-job-ring",
1665 + "fsl,sec-v4.0-job-ring";
1666 + reg = <0x30000 0x10000>;
1667 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1668 + };
1669 +
1670 + sec_jr3: jr@40000 {
1671 + compatible = "fsl,sec-v5.4-job-ring",
1672 + "fsl,sec-v5.0-job-ring",
1673 + "fsl,sec-v4.0-job-ring";
1674 + reg = <0x40000 0x10000>;
1675 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1676 + };
1677 +
1678 + caam-dma {
1679 + compatible = "fsl,sec-v5.4-dma",
1680 + "fsl,sec-v5.0-dma",
1681 + "fsl,sec-v4.0-dma";
1682 + };
1683 +
1684 + rtic@60000 {
1685 + compatible = "fsl,sec-v5.4-rtic",
1686 + "fsl,sec-v5.0-rtic",
1687 + "fsl,sec-v4.0-rtic";
1688 + #address-cells = <1>;
1689 + #size-cells = <1>;
1690 + reg = <0x60000 0x100 0x60e00 0x18>;
1691 + ranges = <0x0 0x60100 0x500>;
1692 +
1693 + rtic_a: rtic-a@0 {
1694 + compatible = "fsl,sec-v5.4-rtic-memory",
1695 + "fsl,sec-v5.0-rtic-memory",
1696 + "fsl,sec-v4.0-rtic-memory";
1697 + reg = <0x00 0x20 0x100 0x100>;
1698 + };
1699 +
1700 + rtic_b: rtic-b@20 {
1701 + compatible = "fsl,sec-v5.4-rtic-memory",
1702 + "fsl,sec-v5.0-rtic-memory",
1703 + "fsl,sec-v4.0-rtic-memory";
1704 + reg = <0x20 0x20 0x200 0x100>;
1705 + };
1706 +
1707 + rtic_c: rtic-c@40 {
1708 + compatible = "fsl,sec-v5.4-rtic-memory",
1709 + "fsl,sec-v5.0-rtic-memory",
1710 + "fsl,sec-v4.0-rtic-memory";
1711 + reg = <0x40 0x20 0x300 0x100>;
1712 + };
1713 +
1714 + rtic_d: rtic-d@60 {
1715 + compatible = "fsl,sec-v5.4-rtic-memory",
1716 + "fsl,sec-v5.0-rtic-memory",
1717 + "fsl,sec-v4.0-rtic-memory";
1718 + reg = <0x60 0x20 0x400 0x100>;
1719 + };
1720 + };
1721 + };
1722 +
1723 + sec_mon: sec_mon@1e90000 {
1724 + compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
1725 + "fsl,sec-v4.0-mon";
1726 + reg = <0x0 0x1e90000 0x0 0x10000>;
1727 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
1728 + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
1729 + };
1730 +
1731 + dcfg: dcfg@1ee0000 {
1732 + compatible = "fsl,ls1012a-dcfg",
1733 + "syscon";
1734 + reg = <0x0 0x1ee0000 0x0 0x10000>;
1735 + big-endian;
1736 + };
1737 +
1738 + clockgen: clocking@1ee1000 {
1739 + compatible = "fsl,ls1012a-clockgen";
1740 + reg = <0x0 0x1ee1000 0x0 0x1000>;
1741 + #clock-cells = <2>;
1742 + clocks = <&sysclk &coreclk>;
1743 + clock-names = "sysclk", "coreclk";
1744 + };
1745 +
1746 + tmu: tmu@1f00000 {
1747 + compatible = "fsl,qoriq-tmu";
1748 + reg = <0x0 0x1f00000 0x0 0x10000>;
1749 + interrupts = <0 33 0x4>;
1750 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
1751 + fsl,tmu-calibration = <0x00000000 0x00000026
1752 + 0x00000001 0x0000002d
1753 + 0x00000002 0x00000032
1754 + 0x00000003 0x00000039
1755 + 0x00000004 0x0000003f
1756 + 0x00000005 0x00000046
1757 + 0x00000006 0x0000004d
1758 + 0x00000007 0x00000054
1759 + 0x00000008 0x0000005a
1760 + 0x00000009 0x00000061
1761 + 0x0000000a 0x0000006a
1762 + 0x0000000b 0x00000071
1763 +
1764 + 0x00010000 0x00000025
1765 + 0x00010001 0x0000002c
1766 + 0x00010002 0x00000035
1767 + 0x00010003 0x0000003d
1768 + 0x00010004 0x00000045
1769 + 0x00010005 0x0000004e
1770 + 0x00010006 0x00000057
1771 + 0x00010007 0x00000061
1772 + 0x00010008 0x0000006b
1773 + 0x00010009 0x00000076
1774 +
1775 + 0x00020000 0x00000029
1776 + 0x00020001 0x00000033
1777 + 0x00020002 0x0000003d
1778 + 0x00020003 0x00000049
1779 + 0x00020004 0x00000056
1780 + 0x00020005 0x00000061
1781 + 0x00020006 0x0000006d
1782 +
1783 + 0x00030000 0x00000021
1784 + 0x00030001 0x0000002a
1785 + 0x00030002 0x0000003c
1786 + 0x00030003 0x0000004e>;
1787 + big-endian;
1788 + #thermal-sensor-cells = <1>;
1789 + };
1790 +
1791 + thermal-zones {
1792 + cpu_thermal: cpu-thermal {
1793 + polling-delay-passive = <1000>;
1794 + polling-delay = <5000>;
1795 + thermal-sensors = <&tmu 0>;
1796 +
1797 + trips {
1798 + cpu_alert: cpu-alert {
1799 + temperature = <85000>;
1800 + hysteresis = <2000>;
1801 + type = "passive";
1802 + };
1803 +
1804 + cpu_crit: cpu-crit {
1805 + temperature = <95000>;
1806 + hysteresis = <2000>;
1807 + type = "critical";
1808 + };
1809 + };
1810 +
1811 + cooling-maps {
1812 + map0 {
1813 + trip = <&cpu_alert>;
1814 + cooling-device =
1815 + <&cpu0 THERMAL_NO_LIMIT
1816 + THERMAL_NO_LIMIT>;
1817 + };
1818 + };
1819 + };
1820 + };
1821 +
1822 + esdhc0: esdhc@1560000 {
1823 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1824 + reg = <0x0 0x1560000 0x0 0x10000>;
1825 + interrupts = <0 62 0x4>;
1826 + clocks = <&clockgen 4 0>;
1827 + voltage-ranges = <1800 1800 3300 3300>;
1828 + sdhci,auto-cmd12;
1829 + big-endian;
1830 + bus-width = <4>;
1831 + status = "disabled";
1832 + };
1833 +
1834 + esdhc1: esdhc@1580000 {
1835 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1836 + reg = <0x0 0x1580000 0x0 0x10000>;
1837 + interrupts = <0 65 0x4>;
1838 + clocks = <&clockgen 4 0>;
1839 + voltage-ranges = <1800 1800 3300 3300>;
1840 + sdhci,auto-cmd12;
1841 + big-endian;
1842 + broken-cd;
1843 + bus-width = <4>;
1844 + status = "disabled";
1845 + };
1846 +
1847 + rcpm: rcpm@1ee2000 {
1848 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1849 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1850 + fsl,#rcpm-wakeup-cells = <1>;
1851 + };
1852 +
1853 + ftm0: ftm0@29d0000 {
1854 + compatible = "fsl,ls1012a-ftm";
1855 + reg = <0x0 0x29d0000 0x0 0x10000>,
1856 + <0x0 0x1ee2140 0x0 0x4>;
1857 + reg-names = "ftm", "FlexTimer1";
1858 + interrupts = <0 86 0x4>;
1859 + big-endian;
1860 + };
1861 +
1862 + i2c0: i2c@2180000 {
1863 + compatible = "fsl,vf610-i2c";
1864 + #address-cells = <1>;
1865 + #size-cells = <0>;
1866 + reg = <0x0 0x2180000 0x0 0x10000>;
1867 + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1868 + clocks = <&clockgen 4 3>;
1869 + status = "disabled";
1870 + };
1871 +
1872 + i2c1: i2c@2190000 {
1873 + compatible = "fsl,vf610-i2c";
1874 + #address-cells = <1>;
1875 + #size-cells = <0>;
1876 + reg = <0x0 0x2190000 0x0 0x10000>;
1877 + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1878 + clocks = <&clockgen 4 3>;
1879 + status = "disabled";
1880 + };
1881 +
1882 + duart0: serial@21c0500 {
1883 + compatible = "fsl,ns16550", "ns16550a";
1884 + reg = <0x00 0x21c0500 0x0 0x100>;
1885 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1886 + clocks = <&clockgen 4 0>;
1887 + status = "disabled";
1888 + };
1889 +
1890 + duart1: serial@21c0600 {
1891 + compatible = "fsl,ns16550", "ns16550a";
1892 + reg = <0x00 0x21c0600 0x0 0x100>;
1893 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1894 + clocks = <&clockgen 4 0>;
1895 + status = "disabled";
1896 + };
1897 +
1898 + gpio0: gpio@2300000 {
1899 + compatible = "fsl,qoriq-gpio";
1900 + reg = <0x0 0x2300000 0x0 0x10000>;
1901 + interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
1902 + gpio-controller;
1903 + #gpio-cells = <2>;
1904 + interrupt-controller;
1905 + #interrupt-cells = <2>;
1906 + };
1907 +
1908 + gpio1: gpio@2310000 {
1909 + compatible = "fsl,qoriq-gpio";
1910 + reg = <0x0 0x2310000 0x0 0x10000>;
1911 + interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
1912 + gpio-controller;
1913 + #gpio-cells = <2>;
1914 + interrupt-controller;
1915 + #interrupt-cells = <2>;
1916 + };
1917 +
1918 + qspi: quadspi@1550000 {
1919 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1920 + #address-cells = <1>;
1921 + #size-cells = <0>;
1922 + reg = <0x0 0x1550000 0x0 0x10000>,
1923 + <0x0 0x40000000 0x0 0x10000000>;
1924 + reg-names = "QuadSPI", "QuadSPI-memory";
1925 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1926 + clock-names = "qspi_en", "qspi";
1927 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1928 + big-endian;
1929 + fsl,qspi-has-second-chip;
1930 + status = "disabled";
1931 + };
1932 +
1933 + wdog0: wdog@2ad0000 {
1934 + compatible = "fsl,ls1012a-wdt",
1935 + "fsl,imx21-wdt";
1936 + reg = <0x0 0x2ad0000 0x0 0x10000>;
1937 + interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
1938 + clocks = <&clockgen 4 0>;
1939 + big-endian;
1940 + };
1941 +
1942 + sai1: sai@2b50000 {
1943 + #sound-dai-cells = <0>;
1944 + compatible = "fsl,vf610-sai";
1945 + reg = <0x0 0x2b50000 0x0 0x10000>;
1946 + interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
1947 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1948 + <&clockgen 4 3>, <&clockgen 4 3>;
1949 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1950 + dma-names = "tx", "rx";
1951 + dmas = <&edma0 1 47>,
1952 + <&edma0 1 46>;
1953 + status = "disabled";
1954 + };
1955 +
1956 + sai2: sai@2b60000 {
1957 + #sound-dai-cells = <0>;
1958 + compatible = "fsl,vf610-sai";
1959 + reg = <0x0 0x2b60000 0x0 0x10000>;
1960 + interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
1961 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1962 + <&clockgen 4 3>, <&clockgen 4 3>;
1963 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1964 + dma-names = "tx", "rx";
1965 + dmas = <&edma0 1 45>,
1966 + <&edma0 1 44>;
1967 + status = "disabled";
1968 + };
1969 +
1970 + edma0: edma@2c00000 {
1971 + #dma-cells = <2>;
1972 + compatible = "fsl,vf610-edma";
1973 + reg = <0x0 0x2c00000 0x0 0x10000>,
1974 + <0x0 0x2c10000 0x0 0x10000>,
1975 + <0x0 0x2c20000 0x0 0x10000>;
1976 + interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
1977 + <0 103 IRQ_TYPE_LEVEL_HIGH>;
1978 + interrupt-names = "edma-tx", "edma-err";
1979 + dma-channels = <32>;
1980 + big-endian;
1981 + clock-names = "dmamux0", "dmamux1";
1982 + clocks = <&clockgen 4 3>,
1983 + <&clockgen 4 3>;
1984 + };
1985 +
1986 + usb0: usb3@2f00000 {
1987 + compatible = "snps,dwc3";
1988 + reg = <0x0 0x2f00000 0x0 0x10000>;
1989 + interrupts = <0 60 0x4>;
1990 + dr_mode = "host";
1991 + snps,quirk-frame-length-adjustment = <0x20>;
1992 + snps,dis_rxdet_inp3_quirk;
1993 + };
1994 +
1995 + usb1: usb2@8600000 {
1996 + compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
1997 + reg = <0x0 0x8600000 0x0 0x1000>;
1998 + interrupts = <0 139 0x4>;
1999 + dr_mode = "host";
2000 + phy_type = "ulpi";
2001 + };
2002 +
2003 + sata: sata@3200000 {
2004 + compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
2005 + reg = <0x0 0x3200000 0x0 0x10000>,
2006 + <0x0 0x20140520 0x0 0x4>;
2007 + reg-names = "ahci", "sata-ecc";
2008 + interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
2009 + clocks = <&clockgen 4 0>;
2010 + dma-coherent;
2011 + status = "disabled";
2012 + };
2013 +
2014 + msi: msi-controller1@1572000 {
2015 + compatible = "fsl,ls1012a-msi";
2016 + reg = <0x0 0x1572000 0x0 0x8>;
2017 + msi-controller;
2018 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
2019 + };
2020 +
2021 + pcie: pcie@3400000 {
2022 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
2023 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
2024 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
2025 + reg-names = "regs", "config";
2026 + interrupts = <0 118 0x4>, /* AER interrupt */
2027 + <0 117 0x4>; /* PME interrupt */
2028 + interrupt-names = "aer", "pme";
2029 + #address-cells = <3>;
2030 + #size-cells = <2>;
2031 + device_type = "pci";
2032 + num-lanes = <4>;
2033 + bus-range = <0x0 0xff>;
2034 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
2035 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
2036 + msi-parent = <&msi>;
2037 + #interrupt-cells = <1>;
2038 + interrupt-map-mask = <0 0 0 7>;
2039 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
2040 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
2041 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
2042 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
2043 + status = "disabled";
2044 + };
2045 + };
2046 +
2047 + reserved-memory {
2048 + #address-cells = <2>;
2049 + #size-cells = <2>;
2050 + ranges;
2051 +
2052 + pfe_reserved: packetbuffer@83400000 {
2053 + reg = <0 0x83400000 0 0xc00000>;
2054 + };
2055 + };
2056 +
2057 + pfe: pfe@04000000 {
2058 + compatible = "fsl,pfe";
2059 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
2060 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
2061 + reg-names = "pfe", "pfe-ddr";
2062 + fsl,pfe-num-interfaces = <0x2>;
2063 + interrupts = <0 172 0x4>, /* HIF interrupt */
2064 + <0 173 0x4>, /*HIF_NOCPY interrupt */
2065 + <0 174 0x4>; /* WoL interrupt */
2066 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
2067 + memory-region = <&pfe_reserved>;
2068 + fsl,pfe-scfg = <&scfg 0>;
2069 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
2070 + clocks = <&clockgen 4 0>;
2071 + clock-names = "pfe";
2072 +
2073 + status = "okay";
2074 + pfe_mac0: ethernet@0 {
2075 + };
2076 +
2077 + pfe_mac1: ethernet@1 {
2078 + };
2079 + };
2080 +
2081 + firmware {
2082 + optee {
2083 + compatible = "linaro,optee-tz";
2084 + method = "smc";
2085 + };
2086 + };
2087 +};
2088 --- /dev/null
2089 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
2090 @@ -0,0 +1,45 @@
2091 +/*
2092 + * QorIQ FMan v3 device tree nodes for ls1043
2093 + *
2094 + * Copyright 2015-2016 Freescale Semiconductor Inc.
2095 + *
2096 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2097 + */
2098 +
2099 +&soc {
2100 +
2101 +/* include used FMan blocks */
2102 +#include "qoriq-fman3-0.dtsi"
2103 +#include "qoriq-fman3-0-1g-0.dtsi"
2104 +#include "qoriq-fman3-0-1g-1.dtsi"
2105 +#include "qoriq-fman3-0-1g-2.dtsi"
2106 +#include "qoriq-fman3-0-1g-3.dtsi"
2107 +#include "qoriq-fman3-0-1g-4.dtsi"
2108 +#include "qoriq-fman3-0-1g-5.dtsi"
2109 +#include "qoriq-fman3-0-10g-0.dtsi"
2110 +
2111 +};
2112 +
2113 +&fman0 {
2114 + /* these aliases provide the FMan ports mapping */
2115 + enet0: ethernet@e0000 {
2116 + };
2117 +
2118 + enet1: ethernet@e2000 {
2119 + };
2120 +
2121 + enet2: ethernet@e4000 {
2122 + };
2123 +
2124 + enet3: ethernet@e6000 {
2125 + };
2126 +
2127 + enet4: ethernet@e8000 {
2128 + };
2129 +
2130 + enet5: ethernet@ea000 {
2131 + };
2132 +
2133 + enet6: ethernet@f0000 {
2134 + };
2135 +};
2136 --- /dev/null
2137 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
2138 @@ -0,0 +1,69 @@
2139 +/*
2140 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2141 + *
2142 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2143 + *
2144 + * Mingkai Hu <Mingkai.hu@freescale.com>
2145 + *
2146 + * This file is dual-licensed: you can use it either under the terms
2147 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2148 + * licensing only applies to this file, and not this project as a
2149 + * whole.
2150 + *
2151 + * a) This library is free software; you can redistribute it and/or
2152 + * modify it under the terms of the GNU General Public License as
2153 + * published by the Free Software Foundation; either version 2 of the
2154 + * License, or (at your option) any later version.
2155 + *
2156 + * This library is distributed in the hope that it will be useful,
2157 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2158 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2159 + * GNU General Public License for more details.
2160 + *
2161 + * Or, alternatively,
2162 + *
2163 + * b) Permission is hereby granted, free of charge, to any person
2164 + * obtaining a copy of this software and associated documentation
2165 + * files (the "Software"), to deal in the Software without
2166 + * restriction, including without limitation the rights to use,
2167 + * copy, modify, merge, publish, distribute, sublicense, and/or
2168 + * sell copies of the Software, and to permit persons to whom the
2169 + * Software is furnished to do so, subject to the following
2170 + * conditions:
2171 + *
2172 + * The above copyright notice and this permission notice shall be
2173 + * included in all copies or substantial portions of the Software.
2174 + *
2175 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2176 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2177 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2178 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2179 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2180 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2181 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2182 + * OTHER DEALINGS IN THE SOFTWARE.
2183 + */
2184 +
2185 +#include "fsl-ls1043a-qds.dts"
2186 +
2187 +&bman_fbpr {
2188 + compatible = "fsl,bman-fbpr";
2189 + alloc-ranges = <0 0 0x10000 0>;
2190 +};
2191 +&qman_fqd {
2192 + compatible = "fsl,qman-fqd";
2193 + alloc-ranges = <0 0 0x10000 0>;
2194 +};
2195 +&qman_pfdr {
2196 + compatible = "fsl,qman-pfdr";
2197 + alloc-ranges = <0 0 0x10000 0>;
2198 +};
2199 +
2200 +&soc {
2201 +#include "qoriq-dpaa-eth.dtsi"
2202 +#include "qoriq-fman3-0-6oh.dtsi"
2203 +};
2204 +
2205 +&fman0 {
2206 + compatible = "fsl,fman", "simple-bus";
2207 +};
2208 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2209 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2210 @@ -1,7 +1,7 @@
2211 /*
2212 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2213 *
2214 - * Copyright 2014-2015, Freescale Semiconductor
2215 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2216 *
2217 * Mingkai Hu <Mingkai.hu@freescale.com>
2218 *
2219 @@ -45,7 +45,7 @@
2220 */
2221
2222 /dts-v1/;
2223 -/include/ "fsl-ls1043a.dtsi"
2224 +#include "fsl-ls1043a.dtsi"
2225
2226 / {
2227 model = "LS1043A QDS Board";
2228 @@ -60,6 +60,22 @@
2229 serial1 = &duart1;
2230 serial2 = &duart2;
2231 serial3 = &duart3;
2232 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2233 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2234 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2235 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2236 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2237 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2238 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2239 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2240 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2241 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2242 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2243 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2244 + emi1_slot1 = &ls1043mdio_s1;
2245 + emi1_slot2 = &ls1043mdio_s2;
2246 + emi1_slot3 = &ls1043mdio_s3;
2247 + emi1_slot4 = &ls1043mdio_s4;
2248 };
2249
2250 chosen {
2251 @@ -97,8 +113,11 @@
2252 };
2253
2254 fpga: board-control@2,0 {
2255 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2256 + #address-cells = <1>;
2257 + #size-cells = <1>;
2258 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2259 reg = <0x2 0x0 0x0000100>;
2260 + ranges = <0 2 0 0x100>;
2261 };
2262 };
2263
2264 @@ -181,3 +200,149 @@
2265 reg = <0>;
2266 };
2267 };
2268 +
2269 +#include "fsl-ls1043-post.dtsi"
2270 +
2271 +&fman0 {
2272 + ethernet@e0000 {
2273 + phy-handle = <&qsgmii_phy_s2_p1>;
2274 + phy-connection-type = "sgmii";
2275 + };
2276 +
2277 + ethernet@e2000 {
2278 + phy-handle = <&qsgmii_phy_s2_p2>;
2279 + phy-connection-type = "sgmii";
2280 + };
2281 +
2282 + ethernet@e4000 {
2283 + phy-handle = <&rgmii_phy1>;
2284 + phy-connection-type = "rgmii";
2285 + };
2286 +
2287 + ethernet@e6000 {
2288 + phy-handle = <&rgmii_phy2>;
2289 + phy-connection-type = "rgmii";
2290 + };
2291 +
2292 + ethernet@e8000 {
2293 + phy-handle = <&qsgmii_phy_s2_p3>;
2294 + phy-connection-type = "sgmii";
2295 + };
2296 +
2297 + ethernet@ea000 {
2298 + phy-handle = <&qsgmii_phy_s2_p4>;
2299 + phy-connection-type = "sgmii";
2300 + };
2301 +
2302 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2303 + fixed-link = <1 1 10000 0 0>;
2304 + phy-connection-type = "xgmii";
2305 + };
2306 +};
2307 +
2308 +&fpga {
2309 + mdio-mux-emi1 {
2310 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2311 + mdio-parent-bus = <&mdio0>;
2312 + #address-cells = <1>;
2313 + #size-cells = <0>;
2314 + reg = <0x54 1>; /* BRDCFG4 */
2315 + mux-mask = <0xe0>; /* EMI1 */
2316 +
2317 + /* On-board RGMII1 PHY */
2318 + ls1043mdio0: mdio@0 {
2319 + reg = <0>;
2320 + #address-cells = <1>;
2321 + #size-cells = <0>;
2322 +
2323 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2324 + reg = <0x1>;
2325 + };
2326 + };
2327 +
2328 + /* On-board RGMII2 PHY */
2329 + ls1043mdio1: mdio@1 {
2330 + reg = <0x20>;
2331 + #address-cells = <1>;
2332 + #size-cells = <0>;
2333 +
2334 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2335 + reg = <0x2>;
2336 + };
2337 + };
2338 +
2339 + /* Slot 1 */
2340 + ls1043mdio_s1: mdio@2 {
2341 + reg = <0x40>;
2342 + #address-cells = <1>;
2343 + #size-cells = <0>;
2344 + status = "disabled";
2345 +
2346 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2347 + reg = <0x4>;
2348 + };
2349 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2350 + reg = <0x5>;
2351 + };
2352 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2353 + reg = <0x6>;
2354 + };
2355 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2356 + reg = <0x7>;
2357 + };
2358 +
2359 + sgmii_phy_s1_p1: ethernet-phy@1c {
2360 + reg = <0x1c>;
2361 + };
2362 + };
2363 +
2364 + /* Slot 2 */
2365 + ls1043mdio_s2: mdio@3 {
2366 + reg = <0x60>;
2367 + #address-cells = <1>;
2368 + #size-cells = <0>;
2369 + status = "disabled";
2370 +
2371 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2372 + reg = <0x8>;
2373 + };
2374 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2375 + reg = <0x9>;
2376 + };
2377 + qsgmii_phy_s2_p3: ethernet-phy@a {
2378 + reg = <0xa>;
2379 + };
2380 + qsgmii_phy_s2_p4: ethernet-phy@b {
2381 + reg = <0xb>;
2382 + };
2383 +
2384 + sgmii_phy_s2_p1: ethernet-phy@1c {
2385 + reg = <0x1c>;
2386 + };
2387 + };
2388 +
2389 + /* Slot 3 */
2390 + ls1043mdio_s3: mdio@4 {
2391 + reg = <0x80>;
2392 + #address-cells = <1>;
2393 + #size-cells = <0>;
2394 + status = "disabled";
2395 +
2396 + sgmii_phy_s3_p1: ethernet-phy@1c {
2397 + reg = <0x1c>;
2398 + };
2399 + };
2400 +
2401 + /* Slot 4 */
2402 + ls1043mdio_s4: mdio@5 {
2403 + reg = <0xa0>;
2404 + #address-cells = <1>;
2405 + #size-cells = <0>;
2406 + status = "disabled";
2407 +
2408 + sgmii_phy_s4_p1: ethernet-phy@1c {
2409 + reg = <0x1c>;
2410 + };
2411 + };
2412 + };
2413 +};
2414 --- /dev/null
2415 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2416 @@ -0,0 +1,69 @@
2417 +/*
2418 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2419 + *
2420 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2421 + *
2422 + * Mingkai Hu <Mingkai.hu@freescale.com>
2423 + *
2424 + * This file is dual-licensed: you can use it either under the terms
2425 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2426 + * licensing only applies to this file, and not this project as a
2427 + * whole.
2428 + *
2429 + * a) This library is free software; you can redistribute it and/or
2430 + * modify it under the terms of the GNU General Public License as
2431 + * published by the Free Software Foundation; either version 2 of the
2432 + * License, or (at your option) any later version.
2433 + *
2434 + * This library is distributed in the hope that it will be useful,
2435 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2436 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2437 + * GNU General Public License for more details.
2438 + *
2439 + * Or, alternatively,
2440 + *
2441 + * b) Permission is hereby granted, free of charge, to any person
2442 + * obtaining a copy of this software and associated documentation
2443 + * files (the "Software"), to deal in the Software without
2444 + * restriction, including without limitation the rights to use,
2445 + * copy, modify, merge, publish, distribute, sublicense, and/or
2446 + * sell copies of the Software, and to permit persons to whom the
2447 + * Software is furnished to do so, subject to the following
2448 + * conditions:
2449 + *
2450 + * The above copyright notice and this permission notice shall be
2451 + * included in all copies or substantial portions of the Software.
2452 + *
2453 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2454 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2455 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2456 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2457 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2458 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2459 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2460 + * OTHER DEALINGS IN THE SOFTWARE.
2461 + */
2462 +
2463 +#include "fsl-ls1043a-rdb.dts"
2464 +
2465 +&bman_fbpr {
2466 + compatible = "fsl,bman-fbpr";
2467 + alloc-ranges = <0 0 0x10000 0>;
2468 +};
2469 +&qman_fqd {
2470 + compatible = "fsl,qman-fqd";
2471 + alloc-ranges = <0 0 0x10000 0>;
2472 +};
2473 +&qman_pfdr {
2474 + compatible = "fsl,qman-pfdr";
2475 + alloc-ranges = <0 0 0x10000 0>;
2476 +};
2477 +
2478 +&soc {
2479 +#include "qoriq-dpaa-eth.dtsi"
2480 +#include "qoriq-fman3-0-6oh.dtsi"
2481 +};
2482 +
2483 +&fman0 {
2484 + compatible = "fsl,fman", "simple-bus";
2485 +};
2486 --- /dev/null
2487 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2488 @@ -0,0 +1,117 @@
2489 +/*
2490 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2491 + *
2492 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2493 + *
2494 + * This file is licensed under the terms of the GNU General Public
2495 + * License version 2. This program is licensed "as is" without any
2496 + * warranty of any kind, whether express or implied.
2497 + */
2498 +
2499 +#include "fsl-ls1043a-rdb-sdk.dts"
2500 +
2501 +&soc {
2502 + bp7: buffer-pool@7 {
2503 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2504 + fsl,bpid = <7>;
2505 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2506 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2507 + };
2508 +
2509 + bp8: buffer-pool@8 {
2510 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2511 + fsl,bpid = <8>;
2512 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2513 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2514 + };
2515 +
2516 + bp9: buffer-pool@9 {
2517 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2518 + fsl,bpid = <9>;
2519 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2520 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2521 + };
2522 +
2523 + fsl,dpaa {
2524 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2525 +
2526 + ethernet@0 {
2527 + compatible = "fsl,dpa-ethernet-init";
2528 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2529 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2530 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2531 + };
2532 +
2533 + ethernet@1 {
2534 + compatible = "fsl,dpa-ethernet-init";
2535 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2536 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2537 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2538 + };
2539 +
2540 + ethernet@2 {
2541 + compatible = "fsl,dpa-ethernet-init";
2542 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2543 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2544 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2545 + };
2546 +
2547 + ethernet@3 {
2548 + compatible = "fsl,dpa-ethernet-init";
2549 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2550 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2551 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2552 + };
2553 +
2554 + ethernet@4 {
2555 + compatible = "fsl,dpa-ethernet-init";
2556 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2557 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2558 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2559 + };
2560 +
2561 + ethernet@5 {
2562 + compatible = "fsl,dpa-ethernet-init";
2563 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2564 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2565 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2566 + };
2567 +
2568 + ethernet@8 {
2569 + compatible = "fsl,dpa-ethernet-init";
2570 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2571 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2572 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2573 +
2574 + };
2575 + dpa-fman0-oh@2 {
2576 + compatible = "fsl,dpa-oh";
2577 + /* Define frame queues for the OH port*/
2578 + /* <OH Rx error, OH Rx default> */
2579 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2580 + fsl,fman-oh-port = <&fman0_oh2>;
2581 + };
2582 + };
2583 +};
2584 +/ {
2585 + reserved-memory {
2586 + #address-cells = <2>;
2587 + #size-cells = <2>;
2588 + ranges;
2589 +
2590 + usdpaa_mem: usdpaa_mem {
2591 + compatible = "fsl,usdpaa-mem";
2592 + alloc-ranges = <0 0 0x10000 0>;
2593 + size = <0 0x10000000>;
2594 + alignment = <0 0x10000000>;
2595 + };
2596 + };
2597 +};
2598 +
2599 +&fman0 {
2600 + fman0_oh2: port@83000 {
2601 + cell-index = <1>;
2602 + compatible = "fsl,fman-port-oh";
2603 + reg = <0x83000 0x1000>;
2604 + };
2605 +};
2606 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2607 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2608 @@ -1,7 +1,7 @@
2609 /*
2610 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2611 *
2612 - * Copyright 2014-2015, Freescale Semiconductor
2613 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2614 *
2615 * Mingkai Hu <Mingkai.hu@freescale.com>
2616 *
2617 @@ -45,7 +45,7 @@
2618 */
2619
2620 /dts-v1/;
2621 -/include/ "fsl-ls1043a.dtsi"
2622 +#include "fsl-ls1043a.dtsi"
2623
2624 / {
2625 model = "LS1043A RDB Board";
2626 @@ -86,6 +86,10 @@
2627 compatible = "pericom,pt7c4338";
2628 reg = <0x68>;
2629 };
2630 + rtc@51 {
2631 + compatible = "nxp,pcf85263";
2632 + reg = <0x51>;
2633 + };
2634 };
2635
2636 &ifc {
2637 @@ -130,6 +134,38 @@
2638 reg = <0>;
2639 spi-max-frequency = <1000000>; /* input clock */
2640 };
2641 +
2642 + slic@2 {
2643 + compatible = "maxim,ds26522";
2644 + reg = <2>;
2645 + spi-max-frequency = <2000000>;
2646 + fsl,spi-cs-sck-delay = <100>;
2647 + fsl,spi-sck-cs-delay = <50>;
2648 + };
2649 +
2650 + slic@3 {
2651 + compatible = "maxim,ds26522";
2652 + reg = <3>;
2653 + spi-max-frequency = <2000000>;
2654 + fsl,spi-cs-sck-delay = <100>;
2655 + fsl,spi-sck-cs-delay = <50>;
2656 + };
2657 +};
2658 +
2659 +&uqe {
2660 + ucc_hdlc: ucc@2000 {
2661 + compatible = "fsl,ucc-hdlc";
2662 + rx-clock-name = "clk8";
2663 + tx-clock-name = "clk9";
2664 + fsl,rx-sync-clock = "rsync_pin";
2665 + fsl,tx-sync-clock = "tsync_pin";
2666 + fsl,tx-timeslot-mask = <0xfffffffe>;
2667 + fsl,rx-timeslot-mask = <0xfffffffe>;
2668 + fsl,tdm-framer-type = "e1";
2669 + fsl,tdm-id = <0>;
2670 + fsl,siram-entry-id = <0>;
2671 + fsl,tdm-interface;
2672 + };
2673 };
2674
2675 &duart0 {
2676 @@ -139,3 +175,76 @@
2677 &duart1 {
2678 status = "okay";
2679 };
2680 +
2681 +#include "fsl-ls1043-post.dtsi"
2682 +
2683 +&fman0 {
2684 + ethernet@e0000 {
2685 + phy-handle = <&qsgmii_phy1>;
2686 + phy-connection-type = "qsgmii";
2687 + };
2688 +
2689 + ethernet@e2000 {
2690 + phy-handle = <&qsgmii_phy2>;
2691 + phy-connection-type = "qsgmii";
2692 + };
2693 +
2694 + ethernet@e4000 {
2695 + phy-handle = <&rgmii_phy1>;
2696 + phy-connection-type = "rgmii-txid";
2697 + };
2698 +
2699 + ethernet@e6000 {
2700 + phy-handle = <&rgmii_phy2>;
2701 + phy-connection-type = "rgmii-txid";
2702 + };
2703 +
2704 + ethernet@e8000 {
2705 + phy-handle = <&qsgmii_phy3>;
2706 + phy-connection-type = "qsgmii";
2707 + };
2708 +
2709 + ethernet@ea000 {
2710 + phy-handle = <&qsgmii_phy4>;
2711 + phy-connection-type = "qsgmii";
2712 + };
2713 +
2714 + ethernet@f0000 { /* 10GEC1 */
2715 + phy-handle = <&aqr105_phy>;
2716 + phy-connection-type = "xgmii";
2717 + };
2718 +
2719 + mdio@fc000 {
2720 + rgmii_phy1: ethernet-phy@1 {
2721 + reg = <0x1>;
2722 + };
2723 +
2724 + rgmii_phy2: ethernet-phy@2 {
2725 + reg = <0x2>;
2726 + };
2727 +
2728 + qsgmii_phy1: ethernet-phy@4 {
2729 + reg = <0x4>;
2730 + };
2731 +
2732 + qsgmii_phy2: ethernet-phy@5 {
2733 + reg = <0x5>;
2734 + };
2735 +
2736 + qsgmii_phy3: ethernet-phy@6 {
2737 + reg = <0x6>;
2738 + };
2739 +
2740 + qsgmii_phy4: ethernet-phy@7 {
2741 + reg = <0x7>;
2742 + };
2743 + };
2744 +
2745 + mdio@fd000 {
2746 + aqr105_phy: ethernet-phy@1 {
2747 + compatible = "ethernet-phy-ieee802.3-c45";
2748 + interrupts = <0 132 4>;
2749 + reg = <0x1>;
2750 + };
2751 + };
2752 +};
2753 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2754 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2755 @@ -1,7 +1,7 @@
2756 /*
2757 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2758 *
2759 - * Copyright 2014-2015, Freescale Semiconductor
2760 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2761 *
2762 * Mingkai Hu <Mingkai.hu@freescale.com>
2763 *
2764 @@ -44,12 +44,25 @@
2765 * OTHER DEALINGS IN THE SOFTWARE.
2766 */
2767
2768 +#include <dt-bindings/thermal/thermal.h>
2769 +
2770 / {
2771 compatible = "fsl,ls1043a";
2772 interrupt-parent = <&gic>;
2773 #address-cells = <2>;
2774 #size-cells = <2>;
2775
2776 + aliases {
2777 + fman0 = &fman0;
2778 + ethernet0 = &enet0;
2779 + ethernet1 = &enet1;
2780 + ethernet2 = &enet2;
2781 + ethernet3 = &enet3;
2782 + ethernet4 = &enet4;
2783 + ethernet5 = &enet5;
2784 + ethernet6 = &enet6;
2785 + };
2786 +
2787 cpus {
2788 #address-cells = <1>;
2789 #size-cells = <0>;
2790 @@ -66,6 +79,8 @@
2791 reg = <0x0>;
2792 clocks = <&clockgen 1 0>;
2793 next-level-cache = <&l2>;
2794 + #cooling-cells = <2>;
2795 + cpu-idle-states = <&CPU_PH20>;
2796 };
2797
2798 cpu1: cpu@1 {
2799 @@ -74,6 +89,7 @@
2800 reg = <0x1>;
2801 clocks = <&clockgen 1 0>;
2802 next-level-cache = <&l2>;
2803 + cpu-idle-states = <&CPU_PH20>;
2804 };
2805
2806 cpu2: cpu@2 {
2807 @@ -82,6 +98,7 @@
2808 reg = <0x2>;
2809 clocks = <&clockgen 1 0>;
2810 next-level-cache = <&l2>;
2811 + cpu-idle-states = <&CPU_PH20>;
2812 };
2813
2814 cpu3: cpu@3 {
2815 @@ -90,6 +107,7 @@
2816 reg = <0x3>;
2817 clocks = <&clockgen 1 0>;
2818 next-level-cache = <&l2>;
2819 + cpu-idle-states = <&CPU_PH20>;
2820 };
2821
2822 l2: l2-cache {
2823 @@ -97,12 +115,56 @@
2824 };
2825 };
2826
2827 + idle-states {
2828 + /*
2829 + * PSCI node is not added default, U-boot will add missing
2830 + * parts if it determines to use PSCI.
2831 + */
2832 + entry-method = "arm,psci";
2833 +
2834 + CPU_PH20: cpu-ph20 {
2835 + compatible = "arm,idle-state";
2836 + idle-state-name = "PH20";
2837 + arm,psci-suspend-param = <0x0>;
2838 + entry-latency-us = <1000>;
2839 + exit-latency-us = <1000>;
2840 + min-residency-us = <3000>;
2841 + };
2842 + };
2843 +
2844 memory@80000000 {
2845 device_type = "memory";
2846 reg = <0x0 0x80000000 0 0x80000000>;
2847 /* DRAM space 1, size: 2GiB DRAM */
2848 };
2849
2850 + reserved-memory {
2851 + #address-cells = <2>;
2852 + #size-cells = <2>;
2853 + ranges;
2854 +
2855 + bman_fbpr: bman-fbpr {
2856 + compatible = "shared-dma-pool";
2857 + size = <0 0x1000000>;
2858 + alignment = <0 0x1000000>;
2859 + no-map;
2860 + };
2861 +
2862 + qman_fqd: qman-fqd {
2863 + compatible = "shared-dma-pool";
2864 + size = <0 0x400000>;
2865 + alignment = <0 0x400000>;
2866 + no-map;
2867 + };
2868 +
2869 + qman_pfdr: qman-pfdr {
2870 + compatible = "shared-dma-pool";
2871 + size = <0 0x2000000>;
2872 + alignment = <0 0x2000000>;
2873 + no-map;
2874 + };
2875 + };
2876 +
2877 sysclk: sysclk {
2878 compatible = "fixed-clock";
2879 #clock-cells = <0>;
2880 @@ -149,7 +211,7 @@
2881 interrupts = <1 9 0xf08>;
2882 };
2883
2884 - soc {
2885 + soc: soc {
2886 compatible = "simple-bus";
2887 #address-cells = <2>;
2888 #size-cells = <2>;
2889 @@ -213,13 +275,14 @@
2890
2891 dcfg: dcfg@1ee0000 {
2892 compatible = "fsl,ls1043a-dcfg", "syscon";
2893 - reg = <0x0 0x1ee0000 0x0 0x10000>;
2894 + reg = <0x0 0x1ee0000 0x0 0x1000>;
2895 big-endian;
2896 };
2897
2898 ifc: ifc@1530000 {
2899 compatible = "fsl,ifc", "simple-bus";
2900 reg = <0x0 0x1530000 0x0 0x10000>;
2901 + big-endian;
2902 interrupts = <0 43 0x4>;
2903 };
2904
2905 @@ -255,6 +318,103 @@
2906 big-endian;
2907 };
2908
2909 + tmu: tmu@1f00000 {
2910 + compatible = "fsl,qoriq-tmu";
2911 + reg = <0x0 0x1f00000 0x0 0x10000>;
2912 + interrupts = <0 33 0x4>;
2913 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
2914 + fsl,tmu-calibration = <0x00000000 0x00000026
2915 + 0x00000001 0x0000002d
2916 + 0x00000002 0x00000032
2917 + 0x00000003 0x00000039
2918 + 0x00000004 0x0000003f
2919 + 0x00000005 0x00000046
2920 + 0x00000006 0x0000004d
2921 + 0x00000007 0x00000054
2922 + 0x00000008 0x0000005a
2923 + 0x00000009 0x00000061
2924 + 0x0000000a 0x0000006a
2925 + 0x0000000b 0x00000071
2926 +
2927 + 0x00010000 0x00000025
2928 + 0x00010001 0x0000002c
2929 + 0x00010002 0x00000035
2930 + 0x00010003 0x0000003d
2931 + 0x00010004 0x00000045
2932 + 0x00010005 0x0000004e
2933 + 0x00010006 0x00000057
2934 + 0x00010007 0x00000061
2935 + 0x00010008 0x0000006b
2936 + 0x00010009 0x00000076
2937 +
2938 + 0x00020000 0x00000029
2939 + 0x00020001 0x00000033
2940 + 0x00020002 0x0000003d
2941 + 0x00020003 0x00000049
2942 + 0x00020004 0x00000056
2943 + 0x00020005 0x00000061
2944 + 0x00020006 0x0000006d
2945 +
2946 + 0x00030000 0x00000021
2947 + 0x00030001 0x0000002a
2948 + 0x00030002 0x0000003c
2949 + 0x00030003 0x0000004e>;
2950 + #thermal-sensor-cells = <1>;
2951 + };
2952 +
2953 + thermal-zones {
2954 + cpu_thermal: cpu-thermal {
2955 + polling-delay-passive = <1000>;
2956 + polling-delay = <5000>;
2957 +
2958 + thermal-sensors = <&tmu 3>;
2959 +
2960 + trips {
2961 + cpu_alert: cpu-alert {
2962 + temperature = <85000>;
2963 + hysteresis = <2000>;
2964 + type = "passive";
2965 + };
2966 + cpu_crit: cpu-crit {
2967 + temperature = <95000>;
2968 + hysteresis = <2000>;
2969 + type = "critical";
2970 + };
2971 + };
2972 +
2973 + cooling-maps {
2974 + map0 {
2975 + trip = <&cpu_alert>;
2976 + cooling-device =
2977 + <&cpu0 THERMAL_NO_LIMIT
2978 + THERMAL_NO_LIMIT>;
2979 + };
2980 + };
2981 + };
2982 + };
2983 +
2984 + qman: qman@1880000 {
2985 + compatible = "fsl,qman";
2986 + reg = <0x00 0x1880000 0x0 0x10000>;
2987 + interrupts = <0 45 0x4>;
2988 + memory-region = <&qman_fqd &qman_pfdr>;
2989 + };
2990 +
2991 + bman: bman@1890000 {
2992 + compatible = "fsl,bman";
2993 + reg = <0x00 0x1890000 0x0 0x10000>;
2994 + interrupts = <0 45 0x4>;
2995 + memory-region = <&bman_fbpr>;
2996 + };
2997 +
2998 + bportals: bman-portals@508000000 {
2999 + ranges = <0x0 0x5 0x08000000 0x8000000>;
3000 + };
3001 +
3002 + qportals: qman-portals@500000000 {
3003 + ranges = <0x0 0x5 0x00000000 0x8000000>;
3004 + };
3005 +
3006 dspi0: dspi@2100000 {
3007 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
3008 #address-cells = <1>;
3009 @@ -396,6 +556,72 @@
3010 #interrupt-cells = <2>;
3011 };
3012
3013 + uqe: uqe@2400000 {
3014 + #address-cells = <1>;
3015 + #size-cells = <1>;
3016 + device_type = "qe";
3017 + compatible = "fsl,qe", "simple-bus";
3018 + ranges = <0x0 0x0 0x2400000 0x40000>;
3019 + reg = <0x0 0x2400000 0x0 0x480>;
3020 + brg-frequency = <100000000>;
3021 + bus-frequency = <200000000>;
3022 +
3023 + fsl,qe-num-riscs = <1>;
3024 + fsl,qe-num-snums = <28>;
3025 +
3026 + qeic: qeic@80 {
3027 + compatible = "fsl,qe-ic";
3028 + reg = <0x80 0x80>;
3029 + #address-cells = <0>;
3030 + interrupt-controller;
3031 + #interrupt-cells = <1>;
3032 + interrupts = <0 77 0x04 0 77 0x04>;
3033 + };
3034 +
3035 + si1: si@700 {
3036 + #address-cells = <1>;
3037 + #size-cells = <0>;
3038 + compatible = "fsl,ls1043-qe-si",
3039 + "fsl,t1040-qe-si";
3040 + reg = <0x700 0x80>;
3041 + };
3042 +
3043 + siram1: siram@1000 {
3044 + #address-cells = <1>;
3045 + #size-cells = <1>;
3046 + compatible = "fsl,ls1043-qe-siram",
3047 + "fsl,t1040-qe-siram";
3048 + reg = <0x1000 0x800>;
3049 + };
3050 +
3051 + ucc@2000 {
3052 + cell-index = <1>;
3053 + reg = <0x2000 0x200>;
3054 + interrupts = <32>;
3055 + interrupt-parent = <&qeic>;
3056 + };
3057 +
3058 + ucc@2200 {
3059 + cell-index = <3>;
3060 + reg = <0x2200 0x200>;
3061 + interrupts = <34>;
3062 + interrupt-parent = <&qeic>;
3063 + };
3064 +
3065 + muram@10000 {
3066 + #address-cells = <1>;
3067 + #size-cells = <1>;
3068 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3069 + ranges = <0x0 0x10000 0x6000>;
3070 +
3071 + data-only@0 {
3072 + compatible = "fsl,qe-muram-data",
3073 + "fsl,cpm-muram-data";
3074 + reg = <0x0 0x6000>;
3075 + };
3076 + };
3077 + };
3078 +
3079 lpuart0: serial@2950000 {
3080 compatible = "fsl,ls1021a-lpuart";
3081 reg = <0x0 0x2950000 0x0 0x1000>;
3082 @@ -450,6 +676,16 @@
3083 status = "disabled";
3084 };
3085
3086 + ftm0: ftm0@29d0000 {
3087 + compatible = "fsl,ls1043a-ftm";
3088 + reg = <0x0 0x29d0000 0x0 0x10000>,
3089 + <0x0 0x1ee2140 0x0 0x4>;
3090 + reg-names = "ftm", "FlexTimer1";
3091 + interrupts = <0 86 0x4>;
3092 + big-endian;
3093 + status = "okay";
3094 + };
3095 +
3096 wdog0: wdog@2ad0000 {
3097 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3098 reg = <0x0 0x2ad0000 0x0 0x10000>;
3099 @@ -482,6 +718,8 @@
3100 dr_mode = "host";
3101 snps,quirk-frame-length-adjustment = <0x20>;
3102 snps,dis_rxdet_inp3_quirk;
3103 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3104 + snps,dma-snooping;
3105 };
3106
3107 usb1: usb3@3000000 {
3108 @@ -491,6 +729,9 @@
3109 dr_mode = "host";
3110 snps,quirk-frame-length-adjustment = <0x20>;
3111 snps,dis_rxdet_inp3_quirk;
3112 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3113 + snps,dma-snooping;
3114 + configure-gfladj;
3115 };
3116
3117 usb2: usb3@3100000 {
3118 @@ -500,32 +741,52 @@
3119 dr_mode = "host";
3120 snps,quirk-frame-length-adjustment = <0x20>;
3121 snps,dis_rxdet_inp3_quirk;
3122 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3123 + snps,dma-snooping;
3124 + configure-gfladj;
3125 };
3126
3127 sata: sata@3200000 {
3128 compatible = "fsl,ls1043a-ahci";
3129 - reg = <0x0 0x3200000 0x0 0x10000>;
3130 + reg = <0x0 0x3200000 0x0 0x10000>,
3131 + <0x0 0x20140520 0x0 0x4>;
3132 + reg-names = "ahci", "sata-ecc";
3133 interrupts = <0 69 0x4>;
3134 clocks = <&clockgen 4 0>;
3135 dma-coherent;
3136 };
3137
3138 + qdma: qdma@8380000 {
3139 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3140 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3141 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3142 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3143 + interrupts = <0 152 0x4>,
3144 + <0 39 0x4>;
3145 + interrupt-names = "qdma-error", "qdma-queue";
3146 + channels = <8>;
3147 + queues = <2>;
3148 + status-sizes = <64>;
3149 + queue-sizes = <64 64>;
3150 + big-endian;
3151 + };
3152 +
3153 msi1: msi-controller1@1571000 {
3154 - compatible = "fsl,1s1043a-msi";
3155 + compatible = "fsl,ls1043a-msi";
3156 reg = <0x0 0x1571000 0x0 0x8>;
3157 msi-controller;
3158 interrupts = <0 116 0x4>;
3159 };
3160
3161 msi2: msi-controller2@1572000 {
3162 - compatible = "fsl,1s1043a-msi";
3163 + compatible = "fsl,ls1043a-msi";
3164 reg = <0x0 0x1572000 0x0 0x8>;
3165 msi-controller;
3166 interrupts = <0 126 0x4>;
3167 };
3168
3169 msi3: msi-controller3@1573000 {
3170 - compatible = "fsl,1s1043a-msi";
3171 + compatible = "fsl,ls1043a-msi";
3172 reg = <0x0 0x1573000 0x0 0x8>;
3173 msi-controller;
3174 interrupts = <0 160 0x4>;
3175 @@ -536,9 +797,9 @@
3176 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3177 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3178 reg-names = "regs", "config";
3179 - interrupts = <0 118 0x4>, /* controller interrupt */
3180 - <0 117 0x4>; /* PME interrupt */
3181 - interrupt-names = "intr", "pme";
3182 + interrupts = <0 117 0x4>, /* PME interrupt */
3183 + <0 118 0x4>; /* aer interrupt */
3184 + interrupt-names = "pme", "aer";
3185 #address-cells = <3>;
3186 #size-cells = <2>;
3187 device_type = "pci";
3188 @@ -547,7 +808,7 @@
3189 bus-range = <0x0 0xff>;
3190 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3191 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3192 - msi-parent = <&msi1>;
3193 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3194 #interrupt-cells = <1>;
3195 interrupt-map-mask = <0 0 0 7>;
3196 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
3197 @@ -561,9 +822,9 @@
3198 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3199 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3200 reg-names = "regs", "config";
3201 - interrupts = <0 128 0x4>,
3202 - <0 127 0x4>;
3203 - interrupt-names = "intr", "pme";
3204 + interrupts = <0 127 0x4>,
3205 + <0 128 0x4>;
3206 + interrupt-names = "pme", "aer";
3207 #address-cells = <3>;
3208 #size-cells = <2>;
3209 device_type = "pci";
3210 @@ -572,7 +833,7 @@
3211 bus-range = <0x0 0xff>;
3212 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3213 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3214 - msi-parent = <&msi2>;
3215 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3216 #interrupt-cells = <1>;
3217 interrupt-map-mask = <0 0 0 7>;
3218 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
3219 @@ -586,9 +847,9 @@
3220 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3221 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3222 reg-names = "regs", "config";
3223 - interrupts = <0 162 0x4>,
3224 - <0 161 0x4>;
3225 - interrupt-names = "intr", "pme";
3226 + interrupts = <0 161 0x4>,
3227 + <0 162 0x4>;
3228 + interrupt-names = "pme", "aer";
3229 #address-cells = <3>;
3230 #size-cells = <2>;
3231 device_type = "pci";
3232 @@ -597,7 +858,7 @@
3233 bus-range = <0x0 0xff>;
3234 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3235 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3236 - msi-parent = <&msi3>;
3237 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3238 #interrupt-cells = <1>;
3239 interrupt-map-mask = <0 0 0 7>;
3240 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
3241 @@ -607,4 +868,13 @@
3242 };
3243 };
3244
3245 + firmware {
3246 + optee {
3247 + compatible = "linaro,optee-tz";
3248 + method = "smc";
3249 + };
3250 + };
3251 };
3252 +
3253 +#include "qoriq-qman1-portals.dtsi"
3254 +#include "qoriq-bman1-portals.dtsi"
3255 --- /dev/null
3256 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3257 @@ -0,0 +1,48 @@
3258 +/*
3259 + * QorIQ FMan v3 device tree nodes for ls1046
3260 + *
3261 + * Copyright 2015-2016 Freescale Semiconductor Inc.
3262 + *
3263 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3264 + */
3265 +
3266 +&soc {
3267 +
3268 +/* include used FMan blocks */
3269 +#include "qoriq-fman3-0.dtsi"
3270 +#include "qoriq-fman3-0-1g-0.dtsi"
3271 +#include "qoriq-fman3-0-1g-1.dtsi"
3272 +#include "qoriq-fman3-0-1g-2.dtsi"
3273 +#include "qoriq-fman3-0-1g-3.dtsi"
3274 +#include "qoriq-fman3-0-1g-4.dtsi"
3275 +#include "qoriq-fman3-0-1g-5.dtsi"
3276 +#include "qoriq-fman3-0-10g-0.dtsi"
3277 +#include "qoriq-fman3-0-10g-1.dtsi"
3278 +};
3279 +
3280 +&fman0 {
3281 + /* these aliases provide the FMan ports mapping */
3282 + enet0: ethernet@e0000 {
3283 + };
3284 +
3285 + enet1: ethernet@e2000 {
3286 + };
3287 +
3288 + enet2: ethernet@e4000 {
3289 + };
3290 +
3291 + enet3: ethernet@e6000 {
3292 + };
3293 +
3294 + enet4: ethernet@e8000 {
3295 + };
3296 +
3297 + enet5: ethernet@ea000 {
3298 + };
3299 +
3300 + enet6: ethernet@f0000 {
3301 + };
3302 +
3303 + enet7: ethernet@f2000 {
3304 + };
3305 +};
3306 --- /dev/null
3307 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
3308 @@ -0,0 +1,110 @@
3309 +/*
3310 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3311 + *
3312 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3313 + *
3314 + * Mingkai Hu <Mingkai.hu@freescale.com>
3315 + *
3316 + * This file is dual-licensed: you can use it either under the terms
3317 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3318 + * licensing only applies to this file, and not this project as a
3319 + * whole.
3320 + *
3321 + * a) This library is free software; you can redistribute it and/or
3322 + * modify it under the terms of the GNU General Public License as
3323 + * published by the Free Software Foundation; either version 2 of the
3324 + * License, or (at your option) any later version.
3325 + *
3326 + * This library is distributed in the hope that it will be useful,
3327 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3328 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3329 + * GNU General Public License for more details.
3330 + *
3331 + * Or, alternatively,
3332 + *
3333 + * b) Permission is hereby granted, free of charge, to any person
3334 + * obtaining a copy of this software and associated documentation
3335 + * files (the "Software"), to deal in the Software without
3336 + * restriction, including without limitation the rights to use,
3337 + * copy, modify, merge, publish, distribute, sublicense, and/or
3338 + * sell copies of the Software, and to permit persons to whom the
3339 + * Software is furnished to do so, subject to the following
3340 + * conditions:
3341 + *
3342 + * The above copyright notice and this permission notice shall be