37dc5ee5f0cfdc6efaf6c8f1f7ee282e26db498d
[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-4.9 / 302-dts-support-layercape.patch
1 From 1806d342beb334c8cb0a438315ad5529262b2791 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Wed, 17 Jan 2018 14:52:50 +0800
4 Subject: [PATCH 04/30] dts: support layercape
5
6 This is an integrated patch for layerscape dts support.
7
8 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
9 Signed-off-by: Alison Wang <b18965@freescale.com>
10 Signed-off-by: Li Yang <leoyang.li@nxp.com>
11 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
12 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
13 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
14 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
15 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
16 Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
17 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
18 Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
19 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
20 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
21 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
22 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
23 Signed-off-by: Meng Yi <meng.yi@nxp.com>
24 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
25 Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
26 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
27 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
28 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
29 ---
30 arch/arm/boot/dts/alpine.dtsi | 2 +-
31 arch/arm/boot/dts/axm55xx.dtsi | 2 +-
32 arch/arm/boot/dts/ecx-2000.dts | 2 +-
33 arch/arm/boot/dts/imx6ul.dtsi | 4 +-
34 arch/arm/boot/dts/keystone.dtsi | 4 +-
35 arch/arm/boot/dts/ls1021a-qds.dts | 21 +
36 arch/arm/boot/dts/ls1021a-twr.dts | 25 +
37 arch/arm/boot/dts/ls1021a.dtsi | 197 +++--
38 arch/arm/boot/dts/mt6580.dtsi | 2 +-
39 arch/arm/boot/dts/mt6589.dtsi | 2 +-
40 arch/arm/boot/dts/mt8127.dtsi | 2 +-
41 arch/arm/boot/dts/mt8135.dtsi | 2 +-
42 arch/arm/boot/dts/rk3288.dtsi | 2 +-
43 arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
44 arch/arm/boot/dts/sun7i-a20.dtsi | 4 +-
45 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
46 arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
47 arch/arm64/boot/dts/freescale/Makefile | 17 +
48 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 123 +++
49 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++
50 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 202 +++++
51 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 138 ++++
52 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 602 ++++++++++++++
53 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 +
54 .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++
55 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++-
56 .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts | 69 ++
57 .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++
58 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 113 ++-
59 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 308 ++++++-
60 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 48 ++
61 .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 110 +++
62 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 363 ++++++++
63 .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 83 ++
64 .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 +++
65 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 218 +++++
66 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 800 ++++++++++++++++++
67 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++
68 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++
69 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 825 ++++++++++++++++++
70 arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++---
71 arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++--
72 arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +-
73 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 763 +++--------------
74 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts | 161 ++++
75 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 162 ++++
76 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 140 ++++
77 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++
78 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
79 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
80 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 919 +++++++++++++++++++++
81 .../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++
82 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 73 ++
83 .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 +
84 .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 43 +
85 .../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi | 42 +
86 .../boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi | 42 +
87 .../boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi | 42 +
88 .../boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi | 42 +
89 .../boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi | 42 +
90 .../boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi | 42 +
91 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 ++
92 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi | 130 +++
93 .../boot/dts/freescale/qoriq-qman1-portals.dtsi | 104 +++
94 arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 +
95 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +-
96 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +-
97 67 files changed, 8231 insertions(+), 1022 deletions(-)
98 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
99 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
100 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
101 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
102 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
103 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
104 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
105 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
106 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
107 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
108 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
109 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
110 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
111 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
112 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
113 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
114 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
115 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
116 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
117 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
118 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
119 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
120 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
121 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
122 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
123 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
124 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
125 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
126 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
127 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
128 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
129 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
130 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
131 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
132 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
133 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
134 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
135 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
136 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
137
138 --- a/arch/arm/boot/dts/alpine.dtsi
139 +++ b/arch/arm/boot/dts/alpine.dtsi
140 @@ -93,7 +93,7 @@
141 interrupt-controller;
142 reg = <0x0 0xfb001000 0x0 0x1000>,
143 <0x0 0xfb002000 0x0 0x2000>,
144 - <0x0 0xfb004000 0x0 0x1000>,
145 + <0x0 0xfb004000 0x0 0x2000>,
146 <0x0 0xfb006000 0x0 0x2000>;
147 interrupts =
148 <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
149 --- a/arch/arm/boot/dts/axm55xx.dtsi
150 +++ b/arch/arm/boot/dts/axm55xx.dtsi
151 @@ -62,7 +62,7 @@
152 #address-cells = <0>;
153 interrupt-controller;
154 reg = <0x20 0x01001000 0 0x1000>,
155 - <0x20 0x01002000 0 0x1000>,
156 + <0x20 0x01002000 0 0x2000>,
157 <0x20 0x01004000 0 0x2000>,
158 <0x20 0x01006000 0 0x2000>;
159 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
160 --- a/arch/arm/boot/dts/ecx-2000.dts
161 +++ b/arch/arm/boot/dts/ecx-2000.dts
162 @@ -99,7 +99,7 @@
163 interrupt-controller;
164 interrupts = <1 9 0xf04>;
165 reg = <0xfff11000 0x1000>,
166 - <0xfff12000 0x1000>,
167 + <0xfff12000 0x2000>,
168 <0xfff14000 0x2000>,
169 <0xfff16000 0x2000>;
170 };
171 --- a/arch/arm/boot/dts/imx6ul.dtsi
172 +++ b/arch/arm/boot/dts/imx6ul.dtsi
173 @@ -89,11 +89,11 @@
174 };
175
176 intc: interrupt-controller@00a01000 {
177 - compatible = "arm,cortex-a7-gic";
178 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
179 #interrupt-cells = <3>;
180 interrupt-controller;
181 reg = <0x00a01000 0x1000>,
182 - <0x00a02000 0x1000>,
183 + <0x00a02000 0x2000>,
184 <0x00a04000 0x2000>,
185 <0x00a06000 0x2000>;
186 };
187 --- a/arch/arm/boot/dts/keystone.dtsi
188 +++ b/arch/arm/boot/dts/keystone.dtsi
189 @@ -30,12 +30,12 @@
190 };
191
192 gic: interrupt-controller {
193 - compatible = "arm,cortex-a15-gic";
194 + compatible = "arm,gic-400", "arm,cortex-a15-gic";
195 #interrupt-cells = <3>;
196 interrupt-controller;
197 reg = <0x0 0x02561000 0x0 0x1000>,
198 <0x0 0x02562000 0x0 0x2000>,
199 - <0x0 0x02564000 0x0 0x1000>,
200 + <0x0 0x02564000 0x0 0x2000>,
201 <0x0 0x02566000 0x0 0x2000>;
202 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
203 IRQ_TYPE_LEVEL_HIGH)>;
204 --- a/arch/arm/boot/dts/ls1021a-qds.dts
205 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
206 @@ -124,6 +124,19 @@
207 };
208 };
209
210 +&qspi {
211 + num-cs = <2>;
212 + status = "okay";
213 +
214 + qflash0: s25fl128s@0 {
215 + compatible = "spansion,m25p80";
216 + #address-cells = <1>;
217 + #size-cells = <1>;
218 + spi-max-frequency = <20000000>;
219 + reg = <0>;
220 + };
221 +};
222 +
223 &enet0 {
224 tbi-handle = <&tbi0>;
225 phy-handle = <&sgmii_phy1c>;
226 @@ -331,3 +344,11 @@
227 &uart1 {
228 status = "okay";
229 };
230 +
231 +&can0 {
232 + status = "okay";
233 +};
234 +
235 +&can1 {
236 + status = "okay";
237 +};
238 --- a/arch/arm/boot/dts/ls1021a-twr.dts
239 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
240 @@ -142,6 +142,19 @@
241 };
242 };
243
244 +&qspi {
245 + num-cs = <2>;
246 + status = "okay";
247 +
248 + qflash0: n25q128a13@0 {
249 + compatible = "n25q128a13", "jedec,spi-nor";
250 + #address-cells = <1>;
251 + #size-cells = <1>;
252 + spi-max-frequency = <20000000>;
253 + reg = <0>;
254 + };
255 +};
256 +
257 &enet0 {
258 tbi-handle = <&tbi1>;
259 phy-handle = <&sgmii_phy2>;
260 @@ -228,6 +241,10 @@
261 };
262 };
263
264 +&esdhc {
265 + status = "okay";
266 +};
267 +
268 &sai1 {
269 status = "okay";
270 };
271 @@ -243,3 +260,11 @@
272 &uart1 {
273 status = "okay";
274 };
275 +
276 +&can0 {
277 + status = "okay";
278 +};
279 +
280 +&can1 {
281 + status = "okay";
282 +};
283 --- a/arch/arm/boot/dts/ls1021a.dtsi
284 +++ b/arch/arm/boot/dts/ls1021a.dtsi
285 @@ -74,17 +74,24 @@
286 compatible = "arm,cortex-a7";
287 device_type = "cpu";
288 reg = <0xf00>;
289 - clocks = <&cluster1_clk>;
290 + clocks = <&clockgen 1 0>;
291 };
292
293 cpu@f01 {
294 compatible = "arm,cortex-a7";
295 device_type = "cpu";
296 reg = <0xf01>;
297 - clocks = <&cluster1_clk>;
298 + clocks = <&clockgen 1 0>;
299 };
300 };
301
302 + sysclk: sysclk {
303 + compatible = "fixed-clock";
304 + #clock-cells = <0>;
305 + clock-frequency = <100000000>;
306 + clock-output-names = "sysclk";
307 + };
308 +
309 timer {
310 compatible = "arm,armv7-timer";
311 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
312 @@ -108,11 +115,11 @@
313 ranges;
314
315 gic: interrupt-controller@1400000 {
316 - compatible = "arm,cortex-a7-gic";
317 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
318 #interrupt-cells = <3>;
319 interrupt-controller;
320 reg = <0x0 0x1401000 0x0 0x1000>,
321 - <0x0 0x1402000 0x0 0x1000>,
322 + <0x0 0x1402000 0x0 0x2000>,
323 <0x0 0x1404000 0x0 0x2000>,
324 <0x0 0x1406000 0x0 0x2000>;
325 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
326 @@ -120,14 +127,14 @@
327 };
328
329 msi1: msi-controller@1570e00 {
330 - compatible = "fsl,1s1021a-msi";
331 + compatible = "fsl,ls1021a-msi";
332 reg = <0x0 0x1570e00 0x0 0x8>;
333 msi-controller;
334 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
335 };
336
337 msi2: msi-controller@1570e08 {
338 - compatible = "fsl,1s1021a-msi";
339 + compatible = "fsl,ls1021a-msi";
340 reg = <0x0 0x1570e08 0x0 0x8>;
341 msi-controller;
342 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
343 @@ -137,11 +144,12 @@
344 compatible = "fsl,ifc", "simple-bus";
345 reg = <0x0 0x1530000 0x0 0x10000>;
346 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
347 + big-endian;
348 };
349
350 dcfg: dcfg@1ee0000 {
351 compatible = "fsl,ls1021a-dcfg", "syscon";
352 - reg = <0x0 0x1ee0000 0x0 0x10000>;
353 + reg = <0x0 0x1ee0000 0x0 0x1000>;
354 big-endian;
355 };
356
357 @@ -163,7 +171,7 @@
358 <0x0 0x20220520 0x0 0x4>;
359 reg-names = "ahci", "sata-ecc";
360 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
361 - clocks = <&platform_clk 1>;
362 + clocks = <&clockgen 4 1>;
363 dma-coherent;
364 status = "disabled";
365 };
366 @@ -214,41 +222,10 @@
367 };
368
369 clockgen: clocking@1ee1000 {
370 - #address-cells = <1>;
371 - #size-cells = <1>;
372 - ranges = <0x0 0x0 0x1ee1000 0x10000>;
373 -
374 - sysclk: sysclk {
375 - compatible = "fixed-clock";
376 - #clock-cells = <0>;
377 - clock-output-names = "sysclk";
378 - };
379 -
380 - cga_pll1: pll@800 {
381 - compatible = "fsl,qoriq-core-pll-2.0";
382 - #clock-cells = <1>;
383 - reg = <0x800 0x10>;
384 - clocks = <&sysclk>;
385 - clock-output-names = "cga-pll1", "cga-pll1-div2",
386 - "cga-pll1-div4";
387 - };
388 -
389 - platform_clk: pll@c00 {
390 - compatible = "fsl,qoriq-core-pll-2.0";
391 - #clock-cells = <1>;
392 - reg = <0xc00 0x10>;
393 - clocks = <&sysclk>;
394 - clock-output-names = "platform-clk", "platform-clk-div2";
395 - };
396 -
397 - cluster1_clk: clk0c0@0 {
398 - compatible = "fsl,qoriq-core-mux-2.0";
399 - #clock-cells = <0>;
400 - reg = <0x0 0x10>;
401 - clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
402 - clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>;
403 - clock-output-names = "cluster1-clk";
404 - };
405 + compatible = "fsl,ls1021a-clockgen";
406 + reg = <0x0 0x1ee1000 0x0 0x1000>;
407 + #clock-cells = <2>;
408 + clocks = <&sysclk>;
409 };
410
411 dspi0: dspi@2100000 {
412 @@ -258,7 +235,7 @@
413 reg = <0x0 0x2100000 0x0 0x10000>;
414 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
415 clock-names = "dspi";
416 - clocks = <&platform_clk 1>;
417 + clocks = <&clockgen 4 1>;
418 spi-num-chipselects = <6>;
419 big-endian;
420 status = "disabled";
421 @@ -271,12 +248,27 @@
422 reg = <0x0 0x2110000 0x0 0x10000>;
423 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
424 clock-names = "dspi";
425 - clocks = <&platform_clk 1>;
426 + clocks = <&clockgen 4 1>;
427 spi-num-chipselects = <6>;
428 big-endian;
429 status = "disabled";
430 };
431
432 + qspi: quadspi@1550000 {
433 + compatible = "fsl,ls1021a-qspi";
434 + #address-cells = <1>;
435 + #size-cells = <0>;
436 + reg = <0x0 0x1550000 0x0 0x10000>,
437 + <0x0 0x40000000 0x0 0x4000000>;
438 + reg-names = "QuadSPI", "QuadSPI-memory";
439 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
440 + clock-names = "qspi_en", "qspi";
441 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
442 + big-endian;
443 + amba-base = <0x40000000>;
444 + status = "disabled";
445 + };
446 +
447 i2c0: i2c@2180000 {
448 compatible = "fsl,vf610-i2c";
449 #address-cells = <1>;
450 @@ -284,7 +276,7 @@
451 reg = <0x0 0x2180000 0x0 0x10000>;
452 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
453 clock-names = "i2c";
454 - clocks = <&platform_clk 1>;
455 + clocks = <&clockgen 4 1>;
456 status = "disabled";
457 };
458
459 @@ -295,7 +287,7 @@
460 reg = <0x0 0x2190000 0x0 0x10000>;
461 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
462 clock-names = "i2c";
463 - clocks = <&platform_clk 1>;
464 + clocks = <&clockgen 4 1>;
465 status = "disabled";
466 };
467
468 @@ -306,7 +298,7 @@
469 reg = <0x0 0x21a0000 0x0 0x10000>;
470 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
471 clock-names = "i2c";
472 - clocks = <&platform_clk 1>;
473 + clocks = <&clockgen 4 1>;
474 status = "disabled";
475 };
476
477 @@ -399,7 +391,7 @@
478 compatible = "fsl,ls1021a-lpuart";
479 reg = <0x0 0x2960000 0x0 0x1000>;
480 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
481 - clocks = <&platform_clk 1>;
482 + clocks = <&clockgen 4 1>;
483 clock-names = "ipg";
484 status = "disabled";
485 };
486 @@ -408,7 +400,7 @@
487 compatible = "fsl,ls1021a-lpuart";
488 reg = <0x0 0x2970000 0x0 0x1000>;
489 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
490 - clocks = <&platform_clk 1>;
491 + clocks = <&clockgen 4 1>;
492 clock-names = "ipg";
493 status = "disabled";
494 };
495 @@ -417,7 +409,7 @@
496 compatible = "fsl,ls1021a-lpuart";
497 reg = <0x0 0x2980000 0x0 0x1000>;
498 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
499 - clocks = <&platform_clk 1>;
500 + clocks = <&clockgen 4 1>;
501 clock-names = "ipg";
502 status = "disabled";
503 };
504 @@ -426,7 +418,7 @@
505 compatible = "fsl,ls1021a-lpuart";
506 reg = <0x0 0x2990000 0x0 0x1000>;
507 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
508 - clocks = <&platform_clk 1>;
509 + clocks = <&clockgen 4 1>;
510 clock-names = "ipg";
511 status = "disabled";
512 };
513 @@ -435,16 +427,26 @@
514 compatible = "fsl,ls1021a-lpuart";
515 reg = <0x0 0x29a0000 0x0 0x1000>;
516 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
517 - clocks = <&platform_clk 1>;
518 + clocks = <&clockgen 4 1>;
519 clock-names = "ipg";
520 status = "disabled";
521 };
522
523 + ftm0: ftm0@29d0000 {
524 + compatible = "fsl,ls1021a-ftm";
525 + reg = <0x0 0x29d0000 0x0 0x10000>,
526 + <0x0 0x1ee2140 0x0 0x4>;
527 + reg-names = "ftm", "FlexTimer1";
528 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
529 + big-endian;
530 + status = "okay";
531 + };
532 +
533 wdog0: watchdog@2ad0000 {
534 compatible = "fsl,imx21-wdt";
535 reg = <0x0 0x2ad0000 0x0 0x10000>;
536 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
537 - clocks = <&platform_clk 1>;
538 + clocks = <&clockgen 4 1>;
539 clock-names = "wdog-en";
540 big-endian;
541 };
542 @@ -454,8 +456,8 @@
543 compatible = "fsl,vf610-sai";
544 reg = <0x0 0x2b50000 0x0 0x10000>;
545 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
546 - clocks = <&platform_clk 1>, <&platform_clk 1>,
547 - <&platform_clk 1>, <&platform_clk 1>;
548 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
549 + <&clockgen 4 1>, <&clockgen 4 1>;
550 clock-names = "bus", "mclk1", "mclk2", "mclk3";
551 dma-names = "tx", "rx";
552 dmas = <&edma0 1 47>,
553 @@ -468,8 +470,8 @@
554 compatible = "fsl,vf610-sai";
555 reg = <0x0 0x2b60000 0x0 0x10000>;
556 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
557 - clocks = <&platform_clk 1>, <&platform_clk 1>,
558 - <&platform_clk 1>, <&platform_clk 1>;
559 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
560 + <&clockgen 4 1>, <&clockgen 4 1>;
561 clock-names = "bus", "mclk1", "mclk2", "mclk3";
562 dma-names = "tx", "rx";
563 dmas = <&edma0 1 45>,
564 @@ -489,16 +491,31 @@
565 dma-channels = <32>;
566 big-endian;
567 clock-names = "dmamux0", "dmamux1";
568 - clocks = <&platform_clk 1>,
569 - <&platform_clk 1>;
570 + clocks = <&clockgen 4 1>,
571 + <&clockgen 4 1>;
572 + };
573 +
574 + qdma: qdma@8390000 {
575 + compatible = "fsl,ls1021a-qdma";
576 + reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */
577 + <0x0 0x8399000 0x0 0x1000>, /* Status regs */
578 + <0x0 0x839a000 0x0 0x2000>; /* Block regs */
579 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
580 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
581 + interrupt-names = "qdma-error", "qdma-queue";
582 + channels = <8>;
583 + queues = <2>;
584 + status-sizes = <64>;
585 + queue-sizes = <64 64>;
586 + big-endian;
587 };
588
589 dcu: dcu@2ce0000 {
590 compatible = "fsl,ls1021a-dcu";
591 reg = <0x0 0x2ce0000 0x0 0x10000>;
592 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
593 - clocks = <&platform_clk 0>,
594 - <&platform_clk 0>;
595 + clocks = <&clockgen 4 0>,
596 + <&clockgen 4 0>;
597 clock-names = "dcu", "pix";
598 big-endian;
599 status = "disabled";
600 @@ -626,6 +643,8 @@
601 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
602 dr_mode = "host";
603 snps,quirk-frame-length-adjustment = <0x20>;
604 + configure-gfladj;
605 + dma-coherent;
606 snps,dis_rxdet_inp3_quirk;
607 };
608
609 @@ -634,7 +653,9 @@
610 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
611 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
612 reg-names = "regs", "config";
613 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
614 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
615 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
616 + interrupt-names = "pme", "aer";
617 fsl,pcie-scfg = <&scfg 0>;
618 #address-cells = <3>;
619 #size-cells = <2>;
620 @@ -643,7 +664,7 @@
621 bus-range = <0x0 0xff>;
622 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
623 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
624 - msi-parent = <&msi1>;
625 + msi-parent = <&msi1>, <&msi2>;
626 #interrupt-cells = <1>;
627 interrupt-map-mask = <0 0 0 7>;
628 interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
629 @@ -657,7 +678,9 @@
630 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
631 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
632 reg-names = "regs", "config";
633 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
634 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
635 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
636 + interrupt-names = "pme", "aer";
637 fsl,pcie-scfg = <&scfg 1>;
638 #address-cells = <3>;
639 #size-cells = <2>;
640 @@ -666,7 +689,7 @@
641 bus-range = <0x0 0xff>;
642 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
643 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
644 - msi-parent = <&msi2>;
645 + msi-parent = <&msi1>, <&msi2>;
646 #interrupt-cells = <1>;
647 interrupt-map-mask = <0 0 0 7>;
648 interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
649 @@ -674,5 +697,45 @@
650 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
651 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
652 };
653 +
654 + can0: can@2a70000 {
655 + compatible = "fsl,ls1021ar2-flexcan";
656 + reg = <0x0 0x2a70000 0x0 0x1000>;
657 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
658 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
659 + clock-names = "ipg", "per";
660 + big-endian;
661 + status = "disabled";
662 + };
663 +
664 + can1: can@2a80000 {
665 + compatible = "fsl,ls1021ar2-flexcan";
666 + reg = <0x0 0x2a80000 0x0 0x1000>;
667 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
668 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
669 + clock-names = "ipg", "per";
670 + big-endian;
671 + status = "disabled";
672 + };
673 +
674 + can2: can@2a90000 {
675 + compatible = "fsl,ls1021ar2-flexcan";
676 + reg = <0x0 0x2a90000 0x0 0x1000>;
677 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
678 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
679 + clock-names = "ipg", "per";
680 + big-endian;
681 + status = "disabled";
682 + };
683 +
684 + can3: can@2aa0000 {
685 + compatible = "fsl,ls1021ar2-flexcan";
686 + reg = <0x0 0x2aa0000 0x0 0x1000>;
687 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
688 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
689 + clock-names = "ipg", "per";
690 + big-endian;
691 + status = "disabled";
692 + };
693 };
694 };
695 --- a/arch/arm/boot/dts/mt6580.dtsi
696 +++ b/arch/arm/boot/dts/mt6580.dtsi
697 @@ -91,7 +91,7 @@
698 #interrupt-cells = <3>;
699 interrupt-parent = <&gic>;
700 reg = <0x10211000 0x1000>,
701 - <0x10212000 0x1000>,
702 + <0x10212000 0x2000>,
703 <0x10214000 0x2000>,
704 <0x10216000 0x2000>;
705 };
706 --- a/arch/arm/boot/dts/mt6589.dtsi
707 +++ b/arch/arm/boot/dts/mt6589.dtsi
708 @@ -102,7 +102,7 @@
709 #interrupt-cells = <3>;
710 interrupt-parent = <&gic>;
711 reg = <0x10211000 0x1000>,
712 - <0x10212000 0x1000>,
713 + <0x10212000 0x2000>,
714 <0x10214000 0x2000>,
715 <0x10216000 0x2000>;
716 };
717 --- a/arch/arm/boot/dts/mt8127.dtsi
718 +++ b/arch/arm/boot/dts/mt8127.dtsi
719 @@ -129,7 +129,7 @@
720 #interrupt-cells = <3>;
721 interrupt-parent = <&gic>;
722 reg = <0 0x10211000 0 0x1000>,
723 - <0 0x10212000 0 0x1000>,
724 + <0 0x10212000 0 0x2000>,
725 <0 0x10214000 0 0x2000>,
726 <0 0x10216000 0 0x2000>;
727 };
728 --- a/arch/arm/boot/dts/mt8135.dtsi
729 +++ b/arch/arm/boot/dts/mt8135.dtsi
730 @@ -221,7 +221,7 @@
731 #interrupt-cells = <3>;
732 interrupt-parent = <&gic>;
733 reg = <0 0x10211000 0 0x1000>,
734 - <0 0x10212000 0 0x1000>,
735 + <0 0x10212000 0 0x2000>,
736 <0 0x10214000 0 0x2000>,
737 <0 0x10216000 0 0x2000>;
738 };
739 --- a/arch/arm/boot/dts/rk3288.dtsi
740 +++ b/arch/arm/boot/dts/rk3288.dtsi
741 @@ -1109,7 +1109,7 @@
742 #address-cells = <0>;
743
744 reg = <0xffc01000 0x1000>,
745 - <0xffc02000 0x1000>,
746 + <0xffc02000 0x2000>,
747 <0xffc04000 0x2000>,
748 <0xffc06000 0x2000>;
749 interrupts = <GIC_PPI 9 0xf04>;
750 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
751 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
752 @@ -791,7 +791,7 @@
753 gic: interrupt-controller@01c81000 {
754 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
755 reg = <0x01c81000 0x1000>,
756 - <0x01c82000 0x1000>,
757 + <0x01c82000 0x2000>,
758 <0x01c84000 0x2000>,
759 <0x01c86000 0x2000>;
760 interrupt-controller;
761 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
762 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
763 @@ -1685,9 +1685,9 @@
764 };
765
766 gic: interrupt-controller@01c81000 {
767 - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
768 + compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
769 reg = <0x01c81000 0x1000>,
770 - <0x01c82000 0x1000>,
771 + <0x01c82000 0x2000>,
772 <0x01c84000 0x2000>,
773 <0x01c86000 0x2000>;
774 interrupt-controller;
775 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
776 +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
777 @@ -488,7 +488,7 @@
778 gic: interrupt-controller@01c81000 {
779 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
780 reg = <0x01c81000 0x1000>,
781 - <0x01c82000 0x1000>,
782 + <0x01c82000 0x2000>,
783 <0x01c84000 0x2000>,
784 <0x01c86000 0x2000>;
785 interrupt-controller;
786 --- a/arch/arm/boot/dts/sun9i-a80.dtsi
787 +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
788 @@ -613,7 +613,7 @@
789 gic: interrupt-controller@01c41000 {
790 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
791 reg = <0x01c41000 0x1000>,
792 - <0x01c42000 0x1000>,
793 + <0x01c42000 0x2000>,
794 <0x01c44000 0x2000>,
795 <0x01c46000 0x2000>;
796 interrupt-controller;
797 --- a/arch/arm64/boot/dts/freescale/Makefile
798 +++ b/arch/arm64/boot/dts/freescale/Makefile
799 @@ -1,8 +1,25 @@
800 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
801 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
802 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
803 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
804 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
805 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
806 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
807 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
808 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
809 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
810 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
811 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
812 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
813 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
814 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
815 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
816 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
817 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
818 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
819 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
820 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
821 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
822
823 always := $(dtb-y)
824 subdir-y := $(dts-dirs)
825 --- /dev/null
826 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
827 @@ -0,0 +1,123 @@
828 +/*
829 + * Device Tree file for NXP LS1012A 2G5RDB Board.
830 + *
831 + * Copyright 2017 NXP
832 + *
833 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
834 + *
835 + * This file is dual-licensed: you can use it either under the terms
836 + * of the GPLv2 or the X11 license, at your option. Note that this dual
837 + * licensing only applies to this file, and not this project as a
838 + * whole.
839 + *
840 + * a) This library is free software; you can redistribute it and/or
841 + * modify it under the terms of the GNU General Public License as
842 + * published by the Free Software Foundation; either version 2 of the
843 + * License, or (at your option) any later version.
844 + *
845 + * This library is distributed in the hope that it will be useful,
846 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
847 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
848 + * GNU General Public License for more details.
849 + *
850 + * Or, alternatively,
851 + *
852 + * b) Permission is hereby granted, free of charge, to any person
853 + * obtaining a copy of this software and associated documentation
854 + * files (the "Software"), to deal in the Software without
855 + * restriction, including without limitation the rights to use,
856 + * copy, modify, merge, publish, distribute, sublicense, and/or
857 + * sell copies of the Software, and to permit persons to whom the
858 + * Software is furnished to do so, subject to the following
859 + * conditions:
860 + *
861 + * The above copyright notice and this permission notice shall be
862 + * included in all copies or substantial portions of the Software.
863 + *
864 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
865 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
866 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
867 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
868 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
869 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
870 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
871 + * OTHER DEALINGS IN THE SOFTWARE.
872 + */
873 +/dts-v1/;
874 +
875 +#include "fsl-ls1012a.dtsi"
876 +
877 +/ {
878 + model = "LS1012A 2G5RDB Board";
879 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
880 +
881 + aliases {
882 + ethernet0 = &pfe_mac0;
883 + ethernet1 = &pfe_mac1;
884 + };
885 +};
886 +
887 +&duart0 {
888 + status = "okay";
889 +};
890 +
891 +&i2c0 {
892 + status = "okay";
893 +};
894 +
895 +&qspi {
896 + num-cs = <2>;
897 + bus-num = <0>;
898 + status = "okay";
899 +
900 + qflash0: s25fs512s@0 {
901 + compatible = "spansion,m25p80";
902 + #address-cells = <1>;
903 + #size-cells = <1>;
904 + spi-max-frequency = <20000000>;
905 + m25p,fast-read;
906 + reg = <0>;
907 + };
908 +};
909 +
910 +&sata {
911 + status = "okay";
912 +};
913 +
914 +&pfe {
915 + status = "okay";
916 + #address-cells = <1>;
917 + #size-cells = <0>;
918 +
919 + ethernet@0 {
920 + compatible = "fsl,pfe-gemac-port";
921 + #address-cells = <1>;
922 + #size-cells = <0>;
923 + reg = <0x0>; /* GEM_ID */
924 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
925 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
926 + fsl,mdio-mux-val = <0x0>;
927 + phy-mode = "sgmii-2500";
928 + fsl,pfe-phy-if-flags = <0x0>;
929 +
930 + mdio@0 {
931 + reg = <0x1>; /* enabled/disabled */
932 + };
933 + };
934 +
935 + ethernet@1 {
936 + compatible = "fsl,pfe-gemac-port";
937 + #address-cells = <1>;
938 + #size-cells = <0>;
939 + reg = <0x1>; /* GEM_ID */
940 + fsl,gemac-bus-id = < 0x0>; /* BUS_ID */
941 + fsl,gemac-phy-id = < 0x2>; /* PHY_ID */
942 + fsl,mdio-mux-val = <0x0>;
943 + phy-mode = "sgmii-2500";
944 + fsl,pfe-phy-if-flags = <0x0>;
945 +
946 + mdio@0 {
947 + reg = <0x0>; /* enabled/disabled */
948 + };
949 + };
950 +};
951 --- /dev/null
952 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
953 @@ -0,0 +1,177 @@
954 +/*
955 + * Device Tree file for Freescale LS1012A Freedom Board.
956 + *
957 + * Copyright 2016 Freescale Semiconductor, Inc.
958 + *
959 + * This file is dual-licensed: you can use it either under the terms
960 + * of the GPLv2 or the X11 license, at your option. Note that this dual
961 + * licensing only applies to this file, and not this project as a
962 + * whole.
963 + *
964 + * a) This library is free software; you can redistribute it and/or
965 + * modify it under the terms of the GNU General Public License as
966 + * published by the Free Software Foundation; either version 2 of the
967 + * License, or (at your option) any later version.
968 + *
969 + * This library is distributed in the hope that it will be useful,
970 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
971 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
972 + * GNU General Public License for more details.
973 + *
974 + * Or, alternatively,
975 + *
976 + * b) Permission is hereby granted, free of charge, to any person
977 + * obtaining a copy of this software and associated documentation
978 + * files (the "Software"), to deal in the Software without
979 + * restriction, including without limitation the rights to use,
980 + * copy, modify, merge, publish, distribute, sublicense, and/or
981 + * sell copies of the Software, and to permit persons to whom the
982 + * Software is furnished to do so, subject to the following
983 + * conditions:
984 + *
985 + * The above copyright notice and this permission notice shall be
986 + * included in all copies or substantial portions of the Software.
987 + *
988 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
989 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
990 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
991 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
992 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
993 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
994 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
995 + * OTHER DEALINGS IN THE SOFTWARE.
996 + */
997 +/dts-v1/;
998 +
999 +#include "fsl-ls1012a.dtsi"
1000 +
1001 +/ {
1002 + model = "LS1012A Freedom Board";
1003 + compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1004 +
1005 + aliases {
1006 + ethernet0 = &pfe_mac0;
1007 + ethernet1 = &pfe_mac1;
1008 + };
1009 +
1010 + sys_mclk: clock-mclk {
1011 + compatible = "fixed-clock";
1012 + #clock-cells = <0>;
1013 + clock-frequency = <25000000>;
1014 + };
1015 +
1016 + reg_1p8v: regulator-1p8v {
1017 + compatible = "regulator-fixed";
1018 + regulator-name = "1P8V";
1019 + regulator-min-microvolt = <1800000>;
1020 + regulator-max-microvolt = <1800000>;
1021 + regulator-always-on;
1022 + };
1023 +
1024 + sound {
1025 + compatible = "simple-audio-card";
1026 + simple-audio-card,format = "i2s";
1027 + simple-audio-card,widgets =
1028 + "Microphone", "Microphone Jack",
1029 + "Headphone", "Headphone Jack",
1030 + "Speaker", "Speaker Ext",
1031 + "Line", "Line In Jack";
1032 + simple-audio-card,routing =
1033 + "MIC_IN", "Microphone Jack",
1034 + "Microphone Jack", "Mic Bias",
1035 + "LINE_IN", "Line In Jack",
1036 + "Headphone Jack", "HP_OUT",
1037 + "Speaker Ext", "LINE_OUT";
1038 +
1039 + simple-audio-card,cpu {
1040 + sound-dai = <&sai2>;
1041 + frame-master;
1042 + bitclock-master;
1043 + };
1044 +
1045 + simple-audio-card,codec {
1046 + sound-dai = <&codec>;
1047 + frame-master;
1048 + bitclock-master;
1049 + system-clock-frequency = <25000000>;
1050 + };
1051 + };
1052 +};
1053 +
1054 +&duart0 {
1055 + status = "okay";
1056 +};
1057 +
1058 +&i2c0 {
1059 + status = "okay";
1060 +
1061 + codec: sgtl5000@a {
1062 + #sound-dai-cells = <0>;
1063 + compatible = "fsl,sgtl5000";
1064 + reg = <0xa>;
1065 + VDDA-supply = <&reg_1p8v>;
1066 + VDDIO-supply = <&reg_1p8v>;
1067 + clocks = <&sys_mclk>;
1068 + };
1069 +};
1070 +
1071 +&qspi {
1072 + num-cs = <1>;
1073 + bus-num = <0>;
1074 + status = "okay";
1075 +
1076 + qflash0: s25fs512s@0 {
1077 + compatible = "spansion,m25p80";
1078 + #address-cells = <1>;
1079 + #size-cells = <1>;
1080 + m25p,fast-read;
1081 + spi-max-frequency = <20000000>;
1082 + reg = <0>;
1083 + };
1084 +};
1085 +
1086 +&pfe {
1087 + status = "okay";
1088 + #address-cells = <1>;
1089 + #size-cells = <0>;
1090 +
1091 + ethernet@0 {
1092 + compatible = "fsl,pfe-gemac-port";
1093 + #address-cells = <1>;
1094 + #size-cells = <0>;
1095 + reg = <0x0>; /* GEM_ID */
1096 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1097 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1098 + fsl,mdio-mux-val = <0x0>;
1099 + phy-mode = "sgmii";
1100 + fsl,pfe-phy-if-flags = <0x0>;
1101 +
1102 + mdio@0 {
1103 + reg = <0x1>; /* enabled/disabled */
1104 + };
1105 + };
1106 +
1107 + ethernet@1 {
1108 + compatible = "fsl,pfe-gemac-port";
1109 + #address-cells = <1>;
1110 + #size-cells = <0>;
1111 + reg = <0x1>; /* GEM_ID */
1112 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
1113 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
1114 + fsl,mdio-mux-val = <0x0>;
1115 + phy-mode = "sgmii";
1116 + fsl,pfe-phy-if-flags = <0x0>;
1117 +
1118 + mdio@0 {
1119 + reg = <0x0>; /* enabled/disabled */
1120 + };
1121 + };
1122 +};
1123 +
1124 +&sai2 {
1125 + status = "okay";
1126 +};
1127 +
1128 +&sata {
1129 + status = "okay";
1130 +};
1131 --- /dev/null
1132 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1133 @@ -0,0 +1,202 @@
1134 +/*
1135 + * Device Tree file for Freescale LS1012A QDS Board.
1136 + *
1137 + * Copyright 2016 Freescale Semiconductor, Inc.
1138 + *
1139 + * This file is dual-licensed: you can use it either under the terms
1140 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1141 + * licensing only applies to this file, and not this project as a
1142 + * whole.
1143 + *
1144 + * a) This library is free software; you can redistribute it and/or
1145 + * modify it under the terms of the GNU General Public License as
1146 + * published by the Free Software Foundation; either version 2 of the
1147 + * License, or (at your option) any later version.
1148 + *
1149 + * This library is distributed in the hope that it will be useful,
1150 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1151 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1152 + * GNU General Public License for more details.
1153 + *
1154 + * Or, alternatively,
1155 + *
1156 + * b) Permission is hereby granted, free of charge, to any person
1157 + * obtaining a copy of this software and associated documentation
1158 + * files (the "Software"), to deal in the Software without
1159 + * restriction, including without limitation the rights to use,
1160 + * copy, modify, merge, publish, distribute, sublicense, and/or
1161 + * sell copies of the Software, and to permit persons to whom the
1162 + * Software is furnished to do so, subject to the following
1163 + * conditions:
1164 + *
1165 + * The above copyright notice and this permission notice shall be
1166 + * included in all copies or substantial portions of the Software.
1167 + *
1168 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1169 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1170 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1171 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1172 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1173 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1174 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1175 + * OTHER DEALINGS IN THE SOFTWARE.
1176 + */
1177 +/dts-v1/;
1178 +
1179 +#include "fsl-ls1012a.dtsi"
1180 +
1181 +/ {
1182 + model = "LS1012A QDS Board";
1183 + compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1184 +
1185 + aliases {
1186 + ethernet0 = &pfe_mac0;
1187 + ethernet1 = &pfe_mac1;
1188 + };
1189 +
1190 + sys_mclk: clock-mclk {
1191 + compatible = "fixed-clock";
1192 + #clock-cells = <0>;
1193 + clock-frequency = <24576000>;
1194 + };
1195 +
1196 + reg_3p3v: regulator-3p3v {
1197 + compatible = "regulator-fixed";
1198 + regulator-name = "3P3V";
1199 + regulator-min-microvolt = <3300000>;
1200 + regulator-max-microvolt = <3300000>;
1201 + regulator-always-on;
1202 + };
1203 +
1204 + sound {
1205 + compatible = "simple-audio-card";
1206 + simple-audio-card,format = "i2s";
1207 + simple-audio-card,widgets =
1208 + "Microphone", "Microphone Jack",
1209 + "Headphone", "Headphone Jack",
1210 + "Speaker", "Speaker Ext",
1211 + "Line", "Line In Jack";
1212 + simple-audio-card,routing =
1213 + "MIC_IN", "Microphone Jack",
1214 + "Microphone Jack", "Mic Bias",
1215 + "LINE_IN", "Line In Jack",
1216 + "Headphone Jack", "HP_OUT",
1217 + "Speaker Ext", "LINE_OUT";
1218 +
1219 + simple-audio-card,cpu {
1220 + sound-dai = <&sai2>;
1221 + frame-master;
1222 + bitclock-master;
1223 + };
1224 +
1225 + simple-audio-card,codec {
1226 + sound-dai = <&codec>;
1227 + frame-master;
1228 + bitclock-master;
1229 + system-clock-frequency = <24576000>;
1230 + };
1231 + };
1232 +};
1233 +
1234 +&pcie {
1235 + status = "okay";
1236 +};
1237 +
1238 +&duart0 {
1239 + status = "okay";
1240 +};
1241 +
1242 +&i2c0 {
1243 + status = "okay";
1244 +
1245 + pca9547@77 {
1246 + compatible = "nxp,pca9547";
1247 + reg = <0x77>;
1248 + #address-cells = <1>;
1249 + #size-cells = <0>;
1250 +
1251 + i2c@4 {
1252 + #address-cells = <1>;
1253 + #size-cells = <0>;
1254 + reg = <0x4>;
1255 +
1256 + codec: sgtl5000@a {
1257 + #sound-dai-cells = <0>;
1258 + compatible = "fsl,sgtl5000";
1259 + reg = <0xa>;
1260 + VDDA-supply = <&reg_3p3v>;
1261 + VDDIO-supply = <&reg_3p3v>;
1262 + clocks = <&sys_mclk>;
1263 + };
1264 + };
1265 + };
1266 +};
1267 +
1268 +&qspi {
1269 + num-cs = <2>;
1270 + bus-num = <0>;
1271 + status = "okay";
1272 +
1273 + qflash0: s25fs512s@0 {
1274 + compatible = "spansion,m25p80";
1275 + #address-cells = <1>;
1276 + #size-cells = <1>;
1277 + spi-max-frequency = <20000000>;
1278 + m25p,fast-read;
1279 + reg = <0>;
1280 + };
1281 +};
1282 +
1283 +&pfe {
1284 + status = "okay";
1285 + #address-cells = <1>;
1286 + #size-cells = <0>;
1287 +
1288 + ethernet@0 {
1289 + compatible = "fsl,pfe-gemac-port";
1290 + #address-cells = <1>;
1291 + #size-cells = <0>;
1292 + reg = <0x0>; /* GEM_ID */
1293 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1294 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
1295 + fsl,mdio-mux-val = <0x2>;
1296 + phy-mode = "sgmii-2500";
1297 + fsl,pfe-phy-if-flags = <0x0>;
1298 +
1299 + mdio@0 {
1300 + reg = <0x1>; /* enabled/disabled */
1301 + };
1302 + };
1303 +
1304 + ethernet@1 {
1305 + compatible = "fsl,pfe-gemac-port";
1306 + #address-cells = <1>;
1307 + #size-cells = <0>;
1308 + reg = <0x1>; /* GEM_ID */
1309 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
1310 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1311 + fsl,mdio-mux-val = <0x3>;
1312 + phy-mode = "sgmii-2500";
1313 + fsl,pfe-phy-if-flags = <0x0>;
1314 +
1315 + mdio@0 {
1316 + reg = <0x0>; /* enabled/disabled */
1317 + };
1318 + };
1319 +};
1320 +
1321 +&sai2 {
1322 + status = "okay";
1323 +};
1324 +
1325 +&sata {
1326 + status = "okay";
1327 +};
1328 +
1329 +&esdhc0 {
1330 + status = "okay";
1331 +};
1332 +
1333 +&esdhc1 {
1334 + status = "okay";
1335 +};
1336 --- /dev/null
1337 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1338 @@ -0,0 +1,138 @@
1339 +/*
1340 + * Device Tree file for Freescale LS1012A RDB Board.
1341 + *
1342 + * Copyright 2016 Freescale Semiconductor, Inc.
1343 + *
1344 + * This file is dual-licensed: you can use it either under the terms
1345 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1346 + * licensing only applies to this file, and not this project as a
1347 + * whole.
1348 + *
1349 + * a) This library is free software; you can redistribute it and/or
1350 + * modify it under the terms of the GNU General Public License as
1351 + * published by the Free Software Foundation; either version 2 of the
1352 + * License, or (at your option) any later version.
1353 + *
1354 + * This library is distributed in the hope that it will be useful,
1355 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1356 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1357 + * GNU General Public License for more details.
1358 + *
1359 + * Or, alternatively,
1360 + *
1361 + * b) Permission is hereby granted, free of charge, to any person
1362 + * obtaining a copy of this software and associated documentation
1363 + * files (the "Software"), to deal in the Software without
1364 + * restriction, including without limitation the rights to use,
1365 + * copy, modify, merge, publish, distribute, sublicense, and/or
1366 + * sell copies of the Software, and to permit persons to whom the
1367 + * Software is furnished to do so, subject to the following
1368 + * conditions:
1369 + *
1370 + * The above copyright notice and this permission notice shall be
1371 + * included in all copies or substantial portions of the Software.
1372 + *
1373 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1374 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1375 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1376 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1377 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1378 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1379 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1380 + * OTHER DEALINGS IN THE SOFTWARE.
1381 + */
1382 +/dts-v1/;
1383 +
1384 +#include "fsl-ls1012a.dtsi"
1385 +
1386 +/ {
1387 + model = "LS1012A RDB Board";
1388 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1389 +
1390 + aliases {
1391 + ethernet0 = &pfe_mac0;
1392 + ethernet1 = &pfe_mac1;
1393 + };
1394 +};
1395 +
1396 +&pcie {
1397 + status = "okay";
1398 +};
1399 +
1400 +&duart0 {
1401 + status = "okay";
1402 +};
1403 +
1404 +&i2c0 {
1405 + status = "okay";
1406 +};
1407 +
1408 +&qspi {
1409 + num-cs = <2>;
1410 + bus-num = <0>;
1411 + status = "okay";
1412 +
1413 + qflash0: s25fs512s@0 {
1414 + compatible = "spansion,m25p80";
1415 + #address-cells = <1>;
1416 + #size-cells = <1>;
1417 + spi-max-frequency = <20000000>;
1418 + m25p,fast-read;
1419 + reg = <0>;
1420 + };
1421 +};
1422 +
1423 +&sata {
1424 + status = "okay";
1425 +};
1426 +
1427 +&esdhc0 {
1428 + sd-uhs-sdr104;
1429 + sd-uhs-sdr50;
1430 + sd-uhs-sdr25;
1431 + sd-uhs-sdr12;
1432 + status = "okay";
1433 +};
1434 +
1435 +&esdhc1 {
1436 + mmc-hs200-1_8v;
1437 + status = "okay";
1438 +};
1439 +
1440 +&pfe {
1441 + status = "okay";
1442 + #address-cells = <1>;
1443 + #size-cells = <0>;
1444 +
1445 + ethernet@0 {
1446 + compatible = "fsl,pfe-gemac-port";
1447 + #address-cells = <1>;
1448 + #size-cells = <0>;
1449 + reg = <0x0>; /* GEM_ID */
1450 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1451 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1452 + fsl,mdio-mux-val = <0x0>;
1453 + phy-mode = "sgmii";
1454 + fsl,pfe-phy-if-flags = <0x0>;
1455 +
1456 + mdio@0 {
1457 + reg = <0x1>; /* enabled/disabled */
1458 + };
1459 + };
1460 +
1461 + ethernet@1 {
1462 + compatible = "fsl,pfe-gemac-port";
1463 + #address-cells = <1>;
1464 + #size-cells = <0>;
1465 + reg = <0x1>; /* GEM_ID */
1466 + fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
1467 + fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
1468 + fsl,mdio-mux-val = <0x0>;
1469 + phy-mode = "rgmii-txid";
1470 + fsl,pfe-phy-if-flags = <0x0>;
1471 +
1472 + mdio@0 {
1473 + reg = <0x0>; /* enabled/disabled */
1474 + };
1475 + };
1476 +};
1477 --- /dev/null
1478 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1479 @@ -0,0 +1,602 @@
1480 +/*
1481 + * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1482 + *
1483 + * Copyright 2016 Freescale Semiconductor, Inc.
1484 + *
1485 + * This file is dual-licensed: you can use it either under the terms
1486 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1487 + * licensing only applies to this file, and not this project as a
1488 + * whole.
1489 + *
1490 + * a) This library is free software; you can redistribute it and/or
1491 + * modify it under the terms of the GNU General Public License as
1492 + * published by the Free Software Foundation; either version 2 of the
1493 + * License, or (at your option) any later version.
1494 + *
1495 + * This library is distributed in the hope that it will be useful,
1496 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1497 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1498 + * GNU General Public License for more details.
1499 + *
1500 + * Or, alternatively,
1501 + *
1502 + * b) Permission is hereby granted, free of charge, to any person
1503 + * obtaining a copy of this software and associated documentation
1504 + * files (the "Software"), to deal in the Software without
1505 + * restriction, including without limitation the rights to use,
1506 + * copy, modify, merge, publish, distribute, sublicense, and/or
1507 + * sell copies of the Software, and to permit persons to whom the
1508 + * Software is furnished to do so, subject to the following
1509 + * conditions:
1510 + *
1511 + * The above copyright notice and this permission notice shall be
1512 + * included in all copies or substantial portions of the Software.
1513 + *
1514 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1515 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1516 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1517 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1518 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1519 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1520 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1521 + * OTHER DEALINGS IN THE SOFTWARE.
1522 + */
1523 +
1524 +#include <dt-bindings/interrupt-controller/arm-gic.h>
1525 +#include <dt-bindings/thermal/thermal.h>
1526 +
1527 +/ {
1528 + compatible = "fsl,ls1012a";
1529 + interrupt-parent = <&gic>;
1530 + #address-cells = <2>;
1531 + #size-cells = <2>;
1532 +
1533 + aliases {
1534 + crypto = &crypto;
1535 + rtic_a = &rtic_a;
1536 + rtic_b = &rtic_b;
1537 + rtic_c = &rtic_c;
1538 + rtic_d = &rtic_d;
1539 + sec_mon = &sec_mon;
1540 + };
1541 +
1542 + cpus {
1543 + #address-cells = <1>;
1544 + #size-cells = <0>;
1545 +
1546 + cpu0: cpu@0 {
1547 + device_type = "cpu";
1548 + compatible = "arm,cortex-a53";
1549 + reg = <0x0>;
1550 + clocks = <&clockgen 1 0>;
1551 + #cooling-cells = <2>;
1552 + cpu-idle-states = <&CPU_PH20>;
1553 + };
1554 + };
1555 +
1556 + idle-states {
1557 + /*
1558 + * PSCI node is not added default, U-boot will add missing
1559 + * parts if it determines to use PSCI.
1560 + */
1561 + entry-method = "arm,psci";
1562 +
1563 + CPU_PH20: cpu-ph20 {
1564 + compatible = "arm,idle-state";
1565 + idle-state-name = "PH20";
1566 + arm,psci-suspend-param = <0x0>;
1567 + entry-latency-us = <1000>;
1568 + exit-latency-us = <1000>;
1569 + min-residency-us = <3000>;
1570 + };
1571 + };
1572 +
1573 + sysclk: sysclk {
1574 + compatible = "fixed-clock";
1575 + #clock-cells = <0>;
1576 + clock-frequency = <125000000>;
1577 + clock-output-names = "sysclk";
1578 + };
1579 +
1580 + coreclk: coreclk {
1581 + compatible = "fixed-clock";
1582 + #clock-cells = <0>;
1583 + clock-frequency = <100000000>;
1584 + clock-output-names = "coreclk";
1585 + };
1586 +
1587 + timer {
1588 + compatible = "arm,armv8-timer";
1589 + interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
1590 + <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
1591 + <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
1592 + <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
1593 + };
1594 +
1595 + pmu {
1596 + compatible = "arm,armv8-pmuv3";
1597 + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
1598 + };
1599 +
1600 + gic: interrupt-controller@1400000 {
1601 + compatible = "arm,gic-400";
1602 + #interrupt-cells = <3>;
1603 + interrupt-controller;
1604 + reg = <0x0 0x1401000 0 0x1000>, /* GICD */
1605 + <0x0 0x1402000 0 0x2000>, /* GICC */
1606 + <0x0 0x1404000 0 0x2000>, /* GICH */
1607 + <0x0 0x1406000 0 0x2000>; /* GICV */
1608 + interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
1609 + };
1610 +
1611 + reboot {
1612 + compatible = "syscon-reboot";
1613 + regmap = <&dcfg>;
1614 + offset = <0xb0>;
1615 + mask = <0x02>;
1616 + };
1617 +
1618 + soc {
1619 + compatible = "simple-bus";
1620 + #address-cells = <2>;
1621 + #size-cells = <2>;
1622 + ranges;
1623 +
1624 + scfg: scfg@1570000 {
1625 + compatible = "fsl,ls1012a-scfg", "syscon";
1626 + reg = <0x0 0x1570000 0x0 0x10000>;
1627 + big-endian;
1628 + };
1629 +
1630 + crypto: crypto@1700000 {
1631 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
1632 + "fsl,sec-v4.0";
1633 + fsl,sec-era = <8>;
1634 + #address-cells = <1>;
1635 + #size-cells = <1>;
1636 + ranges = <0x0 0x00 0x1700000 0x100000>;
1637 + reg = <0x00 0x1700000 0x0 0x100000>;
1638 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
1639 +
1640 + sec_jr0: jr@10000 {
1641 + compatible = "fsl,sec-v5.4-job-ring",
1642 + "fsl,sec-v5.0-job-ring",
1643 + "fsl,sec-v4.0-job-ring";
1644 + reg = <0x10000 0x10000>;
1645 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1646 + };
1647 +
1648 + sec_jr1: jr@20000 {
1649 + compatible = "fsl,sec-v5.4-job-ring",
1650 + "fsl,sec-v5.0-job-ring",
1651 + "fsl,sec-v4.0-job-ring";
1652 + reg = <0x20000 0x10000>;
1653 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1654 + };
1655 +
1656 + sec_jr2: jr@30000 {
1657 + compatible = "fsl,sec-v5.4-job-ring",
1658 + "fsl,sec-v5.0-job-ring",
1659 + "fsl,sec-v4.0-job-ring";
1660 + reg = <0x30000 0x10000>;
1661 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1662 + };
1663 +
1664 + sec_jr3: jr@40000 {
1665 + compatible = "fsl,sec-v5.4-job-ring",
1666 + "fsl,sec-v5.0-job-ring",
1667 + "fsl,sec-v4.0-job-ring";
1668 + reg = <0x40000 0x10000>;
1669 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1670 + };
1671 +
1672 + caam-dma {
1673 + compatible = "fsl,sec-v5.4-dma",
1674 + "fsl,sec-v5.0-dma",
1675 + "fsl,sec-v4.0-dma";
1676 + };
1677 +
1678 + rtic@60000 {
1679 + compatible = "fsl,sec-v5.4-rtic",
1680 + "fsl,sec-v5.0-rtic",
1681 + "fsl,sec-v4.0-rtic";
1682 + #address-cells = <1>;
1683 + #size-cells = <1>;
1684 + reg = <0x60000 0x100 0x60e00 0x18>;
1685 + ranges = <0x0 0x60100 0x500>;
1686 +
1687 + rtic_a: rtic-a@0 {
1688 + compatible = "fsl,sec-v5.4-rtic-memory",
1689 + "fsl,sec-v5.0-rtic-memory",
1690 + "fsl,sec-v4.0-rtic-memory";
1691 + reg = <0x00 0x20 0x100 0x100>;
1692 + };
1693 +
1694 + rtic_b: rtic-b@20 {
1695 + compatible = "fsl,sec-v5.4-rtic-memory",
1696 + "fsl,sec-v5.0-rtic-memory",
1697 + "fsl,sec-v4.0-rtic-memory";
1698 + reg = <0x20 0x20 0x200 0x100>;
1699 + };
1700 +
1701 + rtic_c: rtic-c@40 {
1702 + compatible = "fsl,sec-v5.4-rtic-memory",
1703 + "fsl,sec-v5.0-rtic-memory",
1704 + "fsl,sec-v4.0-rtic-memory";
1705 + reg = <0x40 0x20 0x300 0x100>;
1706 + };
1707 +
1708 + rtic_d: rtic-d@60 {
1709 + compatible = "fsl,sec-v5.4-rtic-memory",
1710 + "fsl,sec-v5.0-rtic-memory",
1711 + "fsl,sec-v4.0-rtic-memory";
1712 + reg = <0x60 0x20 0x400 0x100>;
1713 + };
1714 + };
1715 + };
1716 +
1717 + sec_mon: sec_mon@1e90000 {
1718 + compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
1719 + "fsl,sec-v4.0-mon";
1720 + reg = <0x0 0x1e90000 0x0 0x10000>;
1721 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
1722 + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
1723 + };
1724 +
1725 + dcfg: dcfg@1ee0000 {
1726 + compatible = "fsl,ls1012a-dcfg",
1727 + "syscon";
1728 + reg = <0x0 0x1ee0000 0x0 0x10000>;
1729 + big-endian;
1730 + };
1731 +
1732 + clockgen: clocking@1ee1000 {
1733 + compatible = "fsl,ls1012a-clockgen";
1734 + reg = <0x0 0x1ee1000 0x0 0x1000>;
1735 + #clock-cells = <2>;
1736 + clocks = <&sysclk &coreclk>;
1737 + clock-names = "sysclk", "coreclk";
1738 + };
1739 +
1740 + tmu: tmu@1f00000 {
1741 + compatible = "fsl,qoriq-tmu";
1742 + reg = <0x0 0x1f00000 0x0 0x10000>;
1743 + interrupts = <0 33 0x4>;
1744 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
1745 + fsl,tmu-calibration = <0x00000000 0x00000026
1746 + 0x00000001 0x0000002d
1747 + 0x00000002 0x00000032
1748 + 0x00000003 0x00000039
1749 + 0x00000004 0x0000003f
1750 + 0x00000005 0x00000046
1751 + 0x00000006 0x0000004d
1752 + 0x00000007 0x00000054
1753 + 0x00000008 0x0000005a
1754 + 0x00000009 0x00000061
1755 + 0x0000000a 0x0000006a
1756 + 0x0000000b 0x00000071
1757 +
1758 + 0x00010000 0x00000025
1759 + 0x00010001 0x0000002c
1760 + 0x00010002 0x00000035
1761 + 0x00010003 0x0000003d
1762 + 0x00010004 0x00000045
1763 + 0x00010005 0x0000004e
1764 + 0x00010006 0x00000057
1765 + 0x00010007 0x00000061
1766 + 0x00010008 0x0000006b
1767 + 0x00010009 0x00000076
1768 +
1769 + 0x00020000 0x00000029
1770 + 0x00020001 0x00000033
1771 + 0x00020002 0x0000003d
1772 + 0x00020003 0x00000049
1773 + 0x00020004 0x00000056
1774 + 0x00020005 0x00000061
1775 + 0x00020006 0x0000006d
1776 +
1777 + 0x00030000 0x00000021
1778 + 0x00030001 0x0000002a
1779 + 0x00030002 0x0000003c
1780 + 0x00030003 0x0000004e>;
1781 + big-endian;
1782 + #thermal-sensor-cells = <1>;
1783 + };
1784 +
1785 + thermal-zones {
1786 + cpu_thermal: cpu-thermal {
1787 + polling-delay-passive = <1000>;
1788 + polling-delay = <5000>;
1789 + thermal-sensors = <&tmu 0>;
1790 +
1791 + trips {
1792 + cpu_alert: cpu-alert {
1793 + temperature = <85000>;
1794 + hysteresis = <2000>;
1795 + type = "passive";
1796 + };
1797 +
1798 + cpu_crit: cpu-crit {
1799 + temperature = <95000>;
1800 + hysteresis = <2000>;
1801 + type = "critical";
1802 + };
1803 + };
1804 +
1805 + cooling-maps {
1806 + map0 {
1807 + trip = <&cpu_alert>;
1808 + cooling-device =
1809 + <&cpu0 THERMAL_NO_LIMIT
1810 + THERMAL_NO_LIMIT>;
1811 + };
1812 + };
1813 + };
1814 + };
1815 +
1816 + esdhc0: esdhc@1560000 {
1817 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1818 + reg = <0x0 0x1560000 0x0 0x10000>;
1819 + interrupts = <0 62 0x4>;
1820 + clocks = <&clockgen 4 0>;
1821 + voltage-ranges = <1800 1800 3300 3300>;
1822 + sdhci,auto-cmd12;
1823 + big-endian;
1824 + bus-width = <4>;
1825 + status = "disabled";
1826 + };
1827 +
1828 + esdhc1: esdhc@1580000 {
1829 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1830 + reg = <0x0 0x1580000 0x0 0x10000>;
1831 + interrupts = <0 65 0x4>;
1832 + clocks = <&clockgen 4 0>;
1833 + voltage-ranges = <1800 1800 3300 3300>;
1834 + sdhci,auto-cmd12;
1835 + big-endian;
1836 + broken-cd;
1837 + bus-width = <4>;
1838 + status = "disabled";
1839 + };
1840 +
1841 + rcpm: rcpm@1ee2000 {
1842 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1843 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1844 + fsl,#rcpm-wakeup-cells = <1>;
1845 + };
1846 +
1847 + ftm0: ftm0@29d0000 {
1848 + compatible = "fsl,ls1012a-ftm";
1849 + reg = <0x0 0x29d0000 0x0 0x10000>,
1850 + <0x0 0x1ee2140 0x0 0x4>;
1851 + reg-names = "ftm", "FlexTimer1";
1852 + interrupts = <0 86 0x4>;
1853 + big-endian;
1854 + };
1855 +
1856 + i2c0: i2c@2180000 {
1857 + compatible = "fsl,vf610-i2c";
1858 + #address-cells = <1>;
1859 + #size-cells = <0>;
1860 + reg = <0x0 0x2180000 0x0 0x10000>;
1861 + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1862 + clocks = <&clockgen 4 3>;
1863 + status = "disabled";
1864 + };
1865 +
1866 + i2c1: i2c@2190000 {
1867 + compatible = "fsl,vf610-i2c";
1868 + #address-cells = <1>;
1869 + #size-cells = <0>;
1870 + reg = <0x0 0x2190000 0x0 0x10000>;
1871 + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1872 + clocks = <&clockgen 4 3>;
1873 + status = "disabled";
1874 + };
1875 +
1876 + duart0: serial@21c0500 {
1877 + compatible = "fsl,ns16550", "ns16550a";
1878 + reg = <0x00 0x21c0500 0x0 0x100>;
1879 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1880 + clocks = <&clockgen 4 0>;
1881 + status = "disabled";
1882 + };
1883 +
1884 + duart1: serial@21c0600 {
1885 + compatible = "fsl,ns16550", "ns16550a";
1886 + reg = <0x00 0x21c0600 0x0 0x100>;
1887 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1888 + clocks = <&clockgen 4 0>;
1889 + status = "disabled";
1890 + };
1891 +
1892 + gpio0: gpio@2300000 {
1893 + compatible = "fsl,qoriq-gpio";
1894 + reg = <0x0 0x2300000 0x0 0x10000>;
1895 + interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
1896 + gpio-controller;
1897 + #gpio-cells = <2>;
1898 + interrupt-controller;
1899 + #interrupt-cells = <2>;
1900 + };
1901 +
1902 + gpio1: gpio@2310000 {
1903 + compatible = "fsl,qoriq-gpio";
1904 + reg = <0x0 0x2310000 0x0 0x10000>;
1905 + interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
1906 + gpio-controller;
1907 + #gpio-cells = <2>;
1908 + interrupt-controller;
1909 + #interrupt-cells = <2>;
1910 + };
1911 +
1912 + qspi: quadspi@1550000 {
1913 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1914 + #address-cells = <1>;
1915 + #size-cells = <0>;
1916 + reg = <0x0 0x1550000 0x0 0x10000>,
1917 + <0x0 0x40000000 0x0 0x10000000>;
1918 + reg-names = "QuadSPI", "QuadSPI-memory";
1919 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1920 + clock-names = "qspi_en", "qspi";
1921 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1922 + big-endian;
1923 + fsl,qspi-has-second-chip;
1924 + status = "disabled";
1925 + };
1926 +
1927 + wdog0: wdog@2ad0000 {
1928 + compatible = "fsl,ls1012a-wdt",
1929 + "fsl,imx21-wdt";
1930 + reg = <0x0 0x2ad0000 0x0 0x10000>;
1931 + interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
1932 + clocks = <&clockgen 4 0>;
1933 + big-endian;
1934 + };
1935 +
1936 + sai1: sai@2b50000 {
1937 + #sound-dai-cells = <0>;
1938 + compatible = "fsl,vf610-sai";
1939 + reg = <0x0 0x2b50000 0x0 0x10000>;
1940 + interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
1941 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1942 + <&clockgen 4 3>, <&clockgen 4 3>;
1943 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1944 + dma-names = "tx", "rx";
1945 + dmas = <&edma0 1 47>,
1946 + <&edma0 1 46>;
1947 + status = "disabled";
1948 + };
1949 +
1950 + sai2: sai@2b60000 {
1951 + #sound-dai-cells = <0>;
1952 + compatible = "fsl,vf610-sai";
1953 + reg = <0x0 0x2b60000 0x0 0x10000>;
1954 + interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
1955 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1956 + <&clockgen 4 3>, <&clockgen 4 3>;
1957 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1958 + dma-names = "tx", "rx";
1959 + dmas = <&edma0 1 45>,
1960 + <&edma0 1 44>;
1961 + status = "disabled";
1962 + };
1963 +
1964 + edma0: edma@2c00000 {
1965 + #dma-cells = <2>;
1966 + compatible = "fsl,vf610-edma";
1967 + reg = <0x0 0x2c00000 0x0 0x10000>,
1968 + <0x0 0x2c10000 0x0 0x10000>,
1969 + <0x0 0x2c20000 0x0 0x10000>;
1970 + interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
1971 + <0 103 IRQ_TYPE_LEVEL_HIGH>;
1972 + interrupt-names = "edma-tx", "edma-err";
1973 + dma-channels = <32>;
1974 + big-endian;
1975 + clock-names = "dmamux0", "dmamux1";
1976 + clocks = <&clockgen 4 3>,
1977 + <&clockgen 4 3>;
1978 + };
1979 +
1980 + usb0: usb3@2f00000 {
1981 + compatible = "snps,dwc3";
1982 + reg = <0x0 0x2f00000 0x0 0x10000>;
1983 + interrupts = <0 60 0x4>;
1984 + dr_mode = "host";
1985 + snps,quirk-frame-length-adjustment = <0x20>;
1986 + snps,dis_rxdet_inp3_quirk;
1987 + };
1988 +
1989 + usb1: usb2@8600000 {
1990 + compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
1991 + reg = <0x0 0x8600000 0x0 0x1000>;
1992 + interrupts = <0 139 0x4>;
1993 + dr_mode = "host";
1994 + phy_type = "ulpi";
1995 + };
1996 +
1997 + sata: sata@3200000 {
1998 + compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
1999 + reg = <0x0 0x3200000 0x0 0x10000>,
2000 + <0x0 0x20140520 0x0 0x4>;
2001 + reg-names = "ahci", "sata-ecc";
2002 + interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
2003 + clocks = <&clockgen 4 0>;
2004 + dma-coherent;
2005 + status = "disabled";
2006 + };
2007 +
2008 + msi: msi-controller1@1572000 {
2009 + compatible = "fsl,ls1012a-msi";
2010 + reg = <0x0 0x1572000 0x0 0x8>;
2011 + msi-controller;
2012 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
2013 + };
2014 +
2015 + pcie: pcie@3400000 {
2016 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
2017 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
2018 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
2019 + reg-names = "regs", "config";
2020 + interrupts = <0 118 0x4>, /* AER interrupt */
2021 + <0 117 0x4>; /* PME interrupt */
2022 + interrupt-names = "aer", "pme";
2023 + #address-cells = <3>;
2024 + #size-cells = <2>;
2025 + device_type = "pci";
2026 + num-lanes = <4>;
2027 + bus-range = <0x0 0xff>;
2028 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
2029 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
2030 + msi-parent = <&msi>;
2031 + #interrupt-cells = <1>;
2032 + interrupt-map-mask = <0 0 0 7>;
2033 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
2034 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
2035 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
2036 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
2037 + status = "disabled";
2038 + };
2039 + };
2040 +
2041 + reserved-memory {
2042 + #address-cells = <2>;
2043 + #size-cells = <2>;
2044 + ranges;
2045 +
2046 + pfe_reserved: packetbuffer@83400000 {
2047 + reg = <0 0x83400000 0 0xc00000>;
2048 + };
2049 + };
2050 +
2051 + pfe: pfe@04000000 {
2052 + compatible = "fsl,pfe";
2053 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
2054 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
2055 + reg-names = "pfe", "pfe-ddr";
2056 + fsl,pfe-num-interfaces = <0x2>;
2057 + interrupts = <0 172 0x4>, /* HIF interrupt */
2058 + <0 173 0x4>, /*HIF_NOCPY interrupt */
2059 + <0 174 0x4>; /* WoL interrupt */
2060 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
2061 + memory-region = <&pfe_reserved>;
2062 + fsl,pfe-scfg = <&scfg 0>;
2063 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
2064 + clocks = <&clockgen 4 0>;
2065 + clock-names = "pfe";
2066 +
2067 + status = "okay";
2068 + pfe_mac0: ethernet@0 {
2069 + };
2070 +
2071 + pfe_mac1: ethernet@1 {
2072 + };
2073 + };
2074 +
2075 + firmware {
2076 + optee {
2077 + compatible = "linaro,optee-tz";
2078 + method = "smc";
2079 + };
2080 + };
2081 +};
2082 --- /dev/null
2083 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
2084 @@ -0,0 +1,45 @@
2085 +/*
2086 + * QorIQ FMan v3 device tree nodes for ls1043
2087 + *
2088 + * Copyright 2015-2016 Freescale Semiconductor Inc.
2089 + *
2090 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2091 + */
2092 +
2093 +&soc {
2094 +
2095 +/* include used FMan blocks */
2096 +#include "qoriq-fman3-0.dtsi"
2097 +#include "qoriq-fman3-0-1g-0.dtsi"
2098 +#include "qoriq-fman3-0-1g-1.dtsi"
2099 +#include "qoriq-fman3-0-1g-2.dtsi"
2100 +#include "qoriq-fman3-0-1g-3.dtsi"
2101 +#include "qoriq-fman3-0-1g-4.dtsi"
2102 +#include "qoriq-fman3-0-1g-5.dtsi"
2103 +#include "qoriq-fman3-0-10g-0.dtsi"
2104 +
2105 +};
2106 +
2107 +&fman0 {
2108 + /* these aliases provide the FMan ports mapping */
2109 + enet0: ethernet@e0000 {
2110 + };
2111 +
2112 + enet1: ethernet@e2000 {
2113 + };
2114 +
2115 + enet2: ethernet@e4000 {
2116 + };
2117 +
2118 + enet3: ethernet@e6000 {
2119 + };
2120 +
2121 + enet4: ethernet@e8000 {
2122 + };
2123 +
2124 + enet5: ethernet@ea000 {
2125 + };
2126 +
2127 + enet6: ethernet@f0000 {
2128 + };
2129 +};
2130 --- /dev/null
2131 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
2132 @@ -0,0 +1,69 @@
2133 +/*
2134 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2135 + *
2136 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2137 + *
2138 + * Mingkai Hu <Mingkai.hu@freescale.com>
2139 + *
2140 + * This file is dual-licensed: you can use it either under the terms
2141 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2142 + * licensing only applies to this file, and not this project as a
2143 + * whole.
2144 + *
2145 + * a) This library is free software; you can redistribute it and/or
2146 + * modify it under the terms of the GNU General Public License as
2147 + * published by the Free Software Foundation; either version 2 of the
2148 + * License, or (at your option) any later version.
2149 + *
2150 + * This library is distributed in the hope that it will be useful,
2151 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2152 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2153 + * GNU General Public License for more details.
2154 + *
2155 + * Or, alternatively,
2156 + *
2157 + * b) Permission is hereby granted, free of charge, to any person
2158 + * obtaining a copy of this software and associated documentation
2159 + * files (the "Software"), to deal in the Software without
2160 + * restriction, including without limitation the rights to use,
2161 + * copy, modify, merge, publish, distribute, sublicense, and/or
2162 + * sell copies of the Software, and to permit persons to whom the
2163 + * Software is furnished to do so, subject to the following
2164 + * conditions:
2165 + *
2166 + * The above copyright notice and this permission notice shall be
2167 + * included in all copies or substantial portions of the Software.
2168 + *
2169 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2170 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2171 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2172 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2173 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2174 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2175 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2176 + * OTHER DEALINGS IN THE SOFTWARE.
2177 + */
2178 +
2179 +#include "fsl-ls1043a-qds.dts"
2180 +
2181 +&bman_fbpr {
2182 + compatible = "fsl,bman-fbpr";
2183 + alloc-ranges = <0 0 0x10000 0>;
2184 +};
2185 +&qman_fqd {
2186 + compatible = "fsl,qman-fqd";
2187 + alloc-ranges = <0 0 0x10000 0>;
2188 +};
2189 +&qman_pfdr {
2190 + compatible = "fsl,qman-pfdr";
2191 + alloc-ranges = <0 0 0x10000 0>;
2192 +};
2193 +
2194 +&soc {
2195 +#include "qoriq-dpaa-eth.dtsi"
2196 +#include "qoriq-fman3-0-6oh.dtsi"
2197 +};
2198 +
2199 +&fman0 {
2200 + compatible = "fsl,fman", "simple-bus";
2201 +};
2202 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2203 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2204 @@ -1,7 +1,7 @@
2205 /*
2206 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2207 *
2208 - * Copyright 2014-2015, Freescale Semiconductor
2209 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2210 *
2211 * Mingkai Hu <Mingkai.hu@freescale.com>
2212 *
2213 @@ -45,7 +45,7 @@
2214 */
2215
2216 /dts-v1/;
2217 -/include/ "fsl-ls1043a.dtsi"
2218 +#include "fsl-ls1043a.dtsi"
2219
2220 / {
2221 model = "LS1043A QDS Board";
2222 @@ -60,6 +60,22 @@
2223 serial1 = &duart1;
2224 serial2 = &duart2;
2225 serial3 = &duart3;
2226 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2227 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2228 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2229 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2230 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2231 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2232 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2233 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2234 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2235 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2236 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2237 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2238 + emi1_slot1 = &ls1043mdio_s1;
2239 + emi1_slot2 = &ls1043mdio_s2;
2240 + emi1_slot3 = &ls1043mdio_s3;
2241 + emi1_slot4 = &ls1043mdio_s4;
2242 };
2243
2244 chosen {
2245 @@ -97,8 +113,11 @@
2246 };
2247
2248 fpga: board-control@2,0 {
2249 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2250 + #address-cells = <1>;
2251 + #size-cells = <1>;
2252 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2253 reg = <0x2 0x0 0x0000100>;
2254 + ranges = <0 2 0 0x100>;
2255 };
2256 };
2257
2258 @@ -181,3 +200,149 @@
2259 reg = <0>;
2260 };
2261 };
2262 +
2263 +#include "fsl-ls1043-post.dtsi"
2264 +
2265 +&fman0 {
2266 + ethernet@e0000 {
2267 + phy-handle = <&qsgmii_phy_s2_p1>;
2268 + phy-connection-type = "sgmii";
2269 + };
2270 +
2271 + ethernet@e2000 {
2272 + phy-handle = <&qsgmii_phy_s2_p2>;
2273 + phy-connection-type = "sgmii";
2274 + };
2275 +
2276 + ethernet@e4000 {
2277 + phy-handle = <&rgmii_phy1>;
2278 + phy-connection-type = "rgmii";
2279 + };
2280 +
2281 + ethernet@e6000 {
2282 + phy-handle = <&rgmii_phy2>;
2283 + phy-connection-type = "rgmii";
2284 + };
2285 +
2286 + ethernet@e8000 {
2287 + phy-handle = <&qsgmii_phy_s2_p3>;
2288 + phy-connection-type = "sgmii";
2289 + };
2290 +
2291 + ethernet@ea000 {
2292 + phy-handle = <&qsgmii_phy_s2_p4>;
2293 + phy-connection-type = "sgmii";
2294 + };
2295 +
2296 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2297 + fixed-link = <1 1 10000 0 0>;
2298 + phy-connection-type = "xgmii";
2299 + };
2300 +};
2301 +
2302 +&fpga {
2303 + mdio-mux-emi1 {
2304 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2305 + mdio-parent-bus = <&mdio0>;
2306 + #address-cells = <1>;
2307 + #size-cells = <0>;
2308 + reg = <0x54 1>; /* BRDCFG4 */
2309 + mux-mask = <0xe0>; /* EMI1 */
2310 +
2311 + /* On-board RGMII1 PHY */
2312 + ls1043mdio0: mdio@0 {
2313 + reg = <0>;
2314 + #address-cells = <1>;
2315 + #size-cells = <0>;
2316 +
2317 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2318 + reg = <0x1>;
2319 + };
2320 + };
2321 +
2322 + /* On-board RGMII2 PHY */
2323 + ls1043mdio1: mdio@1 {
2324 + reg = <0x20>;
2325 + #address-cells = <1>;
2326 + #size-cells = <0>;
2327 +
2328 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2329 + reg = <0x2>;
2330 + };
2331 + };
2332 +
2333 + /* Slot 1 */
2334 + ls1043mdio_s1: mdio@2 {
2335 + reg = <0x40>;
2336 + #address-cells = <1>;
2337 + #size-cells = <0>;
2338 + status = "disabled";
2339 +
2340 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2341 + reg = <0x4>;
2342 + };
2343 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2344 + reg = <0x5>;
2345 + };
2346 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2347 + reg = <0x6>;
2348 + };
2349 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2350 + reg = <0x7>;
2351 + };
2352 +
2353 + sgmii_phy_s1_p1: ethernet-phy@1c {
2354 + reg = <0x1c>;
2355 + };
2356 + };
2357 +
2358 + /* Slot 2 */
2359 + ls1043mdio_s2: mdio@3 {
2360 + reg = <0x60>;
2361 + #address-cells = <1>;
2362 + #size-cells = <0>;
2363 + status = "disabled";
2364 +
2365 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2366 + reg = <0x8>;
2367 + };
2368 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2369 + reg = <0x9>;
2370 + };
2371 + qsgmii_phy_s2_p3: ethernet-phy@a {
2372 + reg = <0xa>;
2373 + };
2374 + qsgmii_phy_s2_p4: ethernet-phy@b {
2375 + reg = <0xb>;
2376 + };
2377 +
2378 + sgmii_phy_s2_p1: ethernet-phy@1c {
2379 + reg = <0x1c>;
2380 + };
2381 + };
2382 +
2383 + /* Slot 3 */
2384 + ls1043mdio_s3: mdio@4 {
2385 + reg = <0x80>;
2386 + #address-cells = <1>;
2387 + #size-cells = <0>;
2388 + status = "disabled";
2389 +
2390 + sgmii_phy_s3_p1: ethernet-phy@1c {
2391 + reg = <0x1c>;
2392 + };
2393 + };
2394 +
2395 + /* Slot 4 */
2396 + ls1043mdio_s4: mdio@5 {
2397 + reg = <0xa0>;
2398 + #address-cells = <1>;
2399 + #size-cells = <0>;
2400 + status = "disabled";
2401 +
2402 + sgmii_phy_s4_p1: ethernet-phy@1c {
2403 + reg = <0x1c>;
2404 + };
2405 + };
2406 + };
2407 +};
2408 --- /dev/null
2409 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2410 @@ -0,0 +1,69 @@
2411 +/*
2412 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2413 + *
2414 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2415 + *
2416 + * Mingkai Hu <Mingkai.hu@freescale.com>
2417 + *
2418 + * This file is dual-licensed: you can use it either under the terms
2419 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2420 + * licensing only applies to this file, and not this project as a
2421 + * whole.
2422 + *
2423 + * a) This library is free software; you can redistribute it and/or
2424 + * modify it under the terms of the GNU General Public License as
2425 + * published by the Free Software Foundation; either version 2 of the
2426 + * License, or (at your option) any later version.
2427 + *
2428 + * This library is distributed in the hope that it will be useful,
2429 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2430 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2431 + * GNU General Public License for more details.
2432 + *
2433 + * Or, alternatively,
2434 + *
2435 + * b) Permission is hereby granted, free of charge, to any person
2436 + * obtaining a copy of this software and associated documentation
2437 + * files (the "Software"), to deal in the Software without
2438 + * restriction, including without limitation the rights to use,
2439 + * copy, modify, merge, publish, distribute, sublicense, and/or
2440 + * sell copies of the Software, and to permit persons to whom the
2441 + * Software is furnished to do so, subject to the following
2442 + * conditions:
2443 + *
2444 + * The above copyright notice and this permission notice shall be
2445 + * included in all copies or substantial portions of the Software.
2446 + *
2447 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2448 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2449 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2450 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2451 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2452 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2453 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2454 + * OTHER DEALINGS IN THE SOFTWARE.
2455 + */
2456 +
2457 +#include "fsl-ls1043a-rdb.dts"
2458 +
2459 +&bman_fbpr {
2460 + compatible = "fsl,bman-fbpr";
2461 + alloc-ranges = <0 0 0x10000 0>;
2462 +};
2463 +&qman_fqd {
2464 + compatible = "fsl,qman-fqd";
2465 + alloc-ranges = <0 0 0x10000 0>;
2466 +};
2467 +&qman_pfdr {
2468 + compatible = "fsl,qman-pfdr";
2469 + alloc-ranges = <0 0 0x10000 0>;
2470 +};
2471 +
2472 +&soc {
2473 +#include "qoriq-dpaa-eth.dtsi"
2474 +#include "qoriq-fman3-0-6oh.dtsi"
2475 +};
2476 +
2477 +&fman0 {
2478 + compatible = "fsl,fman", "simple-bus";
2479 +};
2480 --- /dev/null
2481 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2482 @@ -0,0 +1,117 @@
2483 +/*
2484 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2485 + *
2486 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2487 + *
2488 + * This file is licensed under the terms of the GNU General Public
2489 + * License version 2. This program is licensed "as is" without any
2490 + * warranty of any kind, whether express or implied.
2491 + */
2492 +
2493 +#include "fsl-ls1043a-rdb-sdk.dts"
2494 +
2495 +&soc {
2496 + bp7: buffer-pool@7 {
2497 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2498 + fsl,bpid = <7>;
2499 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2500 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2501 + };
2502 +
2503 + bp8: buffer-pool@8 {
2504 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2505 + fsl,bpid = <8>;
2506 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2507 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2508 + };
2509 +
2510 + bp9: buffer-pool@9 {
2511 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2512 + fsl,bpid = <9>;
2513 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2514 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2515 + };
2516 +
2517 + fsl,dpaa {
2518 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2519 +
2520 + ethernet@0 {
2521 + compatible = "fsl,dpa-ethernet-init";
2522 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2523 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2524 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2525 + };
2526 +
2527 + ethernet@1 {
2528 + compatible = "fsl,dpa-ethernet-init";
2529 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2530 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2531 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2532 + };
2533 +
2534 + ethernet@2 {
2535 + compatible = "fsl,dpa-ethernet-init";
2536 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2537 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2538 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2539 + };
2540 +
2541 + ethernet@3 {
2542 + compatible = "fsl,dpa-ethernet-init";
2543 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2544 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2545 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2546 + };
2547 +
2548 + ethernet@4 {
2549 + compatible = "fsl,dpa-ethernet-init";
2550 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2551 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2552 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2553 + };
2554 +
2555 + ethernet@5 {
2556 + compatible = "fsl,dpa-ethernet-init";
2557 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2558 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2559 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2560 + };
2561 +
2562 + ethernet@8 {
2563 + compatible = "fsl,dpa-ethernet-init";
2564 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2565 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2566 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2567 +
2568 + };
2569 + dpa-fman0-oh@2 {
2570 + compatible = "fsl,dpa-oh";
2571 + /* Define frame queues for the OH port*/
2572 + /* <OH Rx error, OH Rx default> */
2573 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2574 + fsl,fman-oh-port = <&fman0_oh2>;
2575 + };
2576 + };
2577 +};
2578 +/ {
2579 + reserved-memory {
2580 + #address-cells = <2>;
2581 + #size-cells = <2>;
2582 + ranges;
2583 +
2584 + usdpaa_mem: usdpaa_mem {
2585 + compatible = "fsl,usdpaa-mem";
2586 + alloc-ranges = <0 0 0x10000 0>;
2587 + size = <0 0x10000000>;
2588 + alignment = <0 0x10000000>;
2589 + };
2590 + };
2591 +};
2592 +
2593 +&fman0 {
2594 + fman0_oh2: port@83000 {
2595 + cell-index = <1>;
2596 + compatible = "fsl,fman-port-oh";
2597 + reg = <0x83000 0x1000>;
2598 + };
2599 +};
2600 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2601 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2602 @@ -1,7 +1,7 @@
2603 /*
2604 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2605 *
2606 - * Copyright 2014-2015, Freescale Semiconductor
2607 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2608 *
2609 * Mingkai Hu <Mingkai.hu@freescale.com>
2610 *
2611 @@ -45,7 +45,7 @@
2612 */
2613
2614 /dts-v1/;
2615 -/include/ "fsl-ls1043a.dtsi"
2616 +#include "fsl-ls1043a.dtsi"
2617
2618 / {
2619 model = "LS1043A RDB Board";
2620 @@ -86,6 +86,10 @@
2621 compatible = "pericom,pt7c4338";
2622 reg = <0x68>;
2623 };
2624 + rtc@51 {
2625 + compatible = "nxp,pcf85263";
2626 + reg = <0x51>;
2627 + };
2628 };
2629
2630 &ifc {
2631 @@ -130,6 +134,38 @@
2632 reg = <0>;
2633 spi-max-frequency = <1000000>; /* input clock */
2634 };
2635 +
2636 + slic@2 {
2637 + compatible = "maxim,ds26522";
2638 + reg = <2>;
2639 + spi-max-frequency = <2000000>;
2640 + fsl,spi-cs-sck-delay = <100>;
2641 + fsl,spi-sck-cs-delay = <50>;
2642 + };
2643 +
2644 + slic@3 {
2645 + compatible = "maxim,ds26522";
2646 + reg = <3>;
2647 + spi-max-frequency = <2000000>;
2648 + fsl,spi-cs-sck-delay = <100>;
2649 + fsl,spi-sck-cs-delay = <50>;
2650 + };
2651 +};
2652 +
2653 +&uqe {
2654 + ucc_hdlc: ucc@2000 {
2655 + compatible = "fsl,ucc-hdlc";
2656 + rx-clock-name = "clk8";
2657 + tx-clock-name = "clk9";
2658 + fsl,rx-sync-clock = "rsync_pin";
2659 + fsl,tx-sync-clock = "tsync_pin";
2660 + fsl,tx-timeslot-mask = <0xfffffffe>;
2661 + fsl,rx-timeslot-mask = <0xfffffffe>;
2662 + fsl,tdm-framer-type = "e1";
2663 + fsl,tdm-id = <0>;
2664 + fsl,siram-entry-id = <0>;
2665 + fsl,tdm-interface;
2666 + };
2667 };
2668
2669 &duart0 {
2670 @@ -139,3 +175,76 @@
2671 &duart1 {
2672 status = "okay";
2673 };
2674 +
2675 +#include "fsl-ls1043-post.dtsi"
2676 +
2677 +&fman0 {
2678 + ethernet@e0000 {
2679 + phy-handle = <&qsgmii_phy1>;
2680 + phy-connection-type = "qsgmii";
2681 + };
2682 +
2683 + ethernet@e2000 {
2684 + phy-handle = <&qsgmii_phy2>;
2685 + phy-connection-type = "qsgmii";
2686 + };
2687 +
2688 + ethernet@e4000 {
2689 + phy-handle = <&rgmii_phy1>;
2690 + phy-connection-type = "rgmii-txid";
2691 + };
2692 +
2693 + ethernet@e6000 {
2694 + phy-handle = <&rgmii_phy2>;
2695 + phy-connection-type = "rgmii-txid";
2696 + };
2697 +
2698 + ethernet@e8000 {
2699 + phy-handle = <&qsgmii_phy3>;
2700 + phy-connection-type = "qsgmii";
2701 + };
2702 +
2703 + ethernet@ea000 {
2704 + phy-handle = <&qsgmii_phy4>;
2705 + phy-connection-type = "qsgmii";
2706 + };
2707 +
2708 + ethernet@f0000 { /* 10GEC1 */
2709 + phy-handle = <&aqr105_phy>;
2710 + phy-connection-type = "xgmii";
2711 + };
2712 +
2713 + mdio@fc000 {
2714 + rgmii_phy1: ethernet-phy@1 {
2715 + reg = <0x1>;
2716 + };
2717 +
2718 + rgmii_phy2: ethernet-phy@2 {
2719 + reg = <0x2>;
2720 + };
2721 +
2722 + qsgmii_phy1: ethernet-phy@4 {
2723 + reg = <0x4>;
2724 + };
2725 +
2726 + qsgmii_phy2: ethernet-phy@5 {
2727 + reg = <0x5>;
2728 + };
2729 +
2730 + qsgmii_phy3: ethernet-phy@6 {
2731 + reg = <0x6>;
2732 + };
2733 +
2734 + qsgmii_phy4: ethernet-phy@7 {
2735 + reg = <0x7>;
2736 + };
2737 + };
2738 +
2739 + mdio@fd000 {
2740 + aqr105_phy: ethernet-phy@1 {
2741 + compatible = "ethernet-phy-ieee802.3-c45";
2742 + interrupts = <0 132 4>;
2743 + reg = <0x1>;
2744 + };
2745 + };
2746 +};
2747 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2748 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2749 @@ -1,7 +1,7 @@
2750 /*
2751 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2752 *
2753 - * Copyright 2014-2015, Freescale Semiconductor
2754 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2755 *
2756 * Mingkai Hu <Mingkai.hu@freescale.com>
2757 *
2758 @@ -44,12 +44,25 @@
2759 * OTHER DEALINGS IN THE SOFTWARE.
2760 */
2761
2762 +#include <dt-bindings/thermal/thermal.h>
2763 +
2764 / {
2765 compatible = "fsl,ls1043a";
2766 interrupt-parent = <&gic>;
2767 #address-cells = <2>;
2768 #size-cells = <2>;
2769
2770 + aliases {
2771 + fman0 = &fman0;
2772 + ethernet0 = &enet0;
2773 + ethernet1 = &enet1;
2774 + ethernet2 = &enet2;
2775 + ethernet3 = &enet3;
2776 + ethernet4 = &enet4;
2777 + ethernet5 = &enet5;
2778 + ethernet6 = &enet6;
2779 + };
2780 +
2781 cpus {
2782 #address-cells = <1>;
2783 #size-cells = <0>;
2784 @@ -66,6 +79,8 @@
2785 reg = <0x0>;
2786 clocks = <&clockgen 1 0>;
2787 next-level-cache = <&l2>;
2788 + #cooling-cells = <2>;
2789 + cpu-idle-states = <&CPU_PH20>;
2790 };
2791
2792 cpu1: cpu@1 {
2793 @@ -74,6 +89,7 @@
2794 reg = <0x1>;
2795 clocks = <&clockgen 1 0>;
2796 next-level-cache = <&l2>;
2797 + cpu-idle-states = <&CPU_PH20>;
2798 };
2799
2800 cpu2: cpu@2 {
2801 @@ -82,6 +98,7 @@
2802 reg = <0x2>;
2803 clocks = <&clockgen 1 0>;
2804 next-level-cache = <&l2>;
2805 + cpu-idle-states = <&CPU_PH20>;
2806 };
2807
2808 cpu3: cpu@3 {
2809 @@ -90,6 +107,7 @@
2810 reg = <0x3>;
2811 clocks = <&clockgen 1 0>;
2812 next-level-cache = <&l2>;
2813 + cpu-idle-states = <&CPU_PH20>;
2814 };
2815
2816 l2: l2-cache {
2817 @@ -97,12 +115,56 @@
2818 };
2819 };
2820
2821 + idle-states {
2822 + /*
2823 + * PSCI node is not added default, U-boot will add missing
2824 + * parts if it determines to use PSCI.
2825 + */
2826 + entry-method = "arm,psci";
2827 +
2828 + CPU_PH20: cpu-ph20 {
2829 + compatible = "arm,idle-state";
2830 + idle-state-name = "PH20";
2831 + arm,psci-suspend-param = <0x0>;
2832 + entry-latency-us = <1000>;
2833 + exit-latency-us = <1000>;
2834 + min-residency-us = <3000>;
2835 + };
2836 + };
2837 +
2838 memory@80000000 {
2839 device_type = "memory";
2840 reg = <0x0 0x80000000 0 0x80000000>;
2841 /* DRAM space 1, size: 2GiB DRAM */
2842 };
2843
2844 + reserved-memory {
2845 + #address-cells = <2>;
2846 + #size-cells = <2>;
2847 + ranges;
2848 +
2849 + bman_fbpr: bman-fbpr {
2850 + compatible = "shared-dma-pool";
2851 + size = <0 0x1000000>;
2852 + alignment = <0 0x1000000>;
2853 + no-map;
2854 + };
2855 +
2856 + qman_fqd: qman-fqd {
2857 + compatible = "shared-dma-pool";
2858 + size = <0 0x400000>;
2859 + alignment = <0 0x400000>;
2860 + no-map;
2861 + };
2862 +
2863 + qman_pfdr: qman-pfdr {
2864 + compatible = "shared-dma-pool";
2865 + size = <0 0x2000000>;
2866 + alignment = <0 0x2000000>;
2867 + no-map;
2868 + };
2869 + };
2870 +
2871 sysclk: sysclk {
2872 compatible = "fixed-clock";
2873 #clock-cells = <0>;
2874 @@ -149,7 +211,7 @@
2875 interrupts = <1 9 0xf08>;
2876 };
2877
2878 - soc {
2879 + soc: soc {
2880 compatible = "simple-bus";
2881 #address-cells = <2>;
2882 #size-cells = <2>;
2883 @@ -213,13 +275,14 @@
2884
2885 dcfg: dcfg@1ee0000 {
2886 compatible = "fsl,ls1043a-dcfg", "syscon";
2887 - reg = <0x0 0x1ee0000 0x0 0x10000>;
2888 + reg = <0x0 0x1ee0000 0x0 0x1000>;
2889 big-endian;
2890 };
2891
2892 ifc: ifc@1530000 {
2893 compatible = "fsl,ifc", "simple-bus";
2894 reg = <0x0 0x1530000 0x0 0x10000>;
2895 + big-endian;
2896 interrupts = <0 43 0x4>;
2897 };
2898
2899 @@ -255,6 +318,103 @@
2900 big-endian;
2901 };
2902
2903 + tmu: tmu@1f00000 {
2904 + compatible = "fsl,qoriq-tmu";
2905 + reg = <0x0 0x1f00000 0x0 0x10000>;
2906 + interrupts = <0 33 0x4>;
2907 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
2908 + fsl,tmu-calibration = <0x00000000 0x00000026
2909 + 0x00000001 0x0000002d
2910 + 0x00000002 0x00000032
2911 + 0x00000003 0x00000039
2912 + 0x00000004 0x0000003f
2913 + 0x00000005 0x00000046
2914 + 0x00000006 0x0000004d
2915 + 0x00000007 0x00000054
2916 + 0x00000008 0x0000005a
2917 + 0x00000009 0x00000061
2918 + 0x0000000a 0x0000006a
2919 + 0x0000000b 0x00000071
2920 +
2921 + 0x00010000 0x00000025
2922 + 0x00010001 0x0000002c
2923 + 0x00010002 0x00000035
2924 + 0x00010003 0x0000003d
2925 + 0x00010004 0x00000045
2926 + 0x00010005 0x0000004e
2927 + 0x00010006 0x00000057
2928 + 0x00010007 0x00000061
2929 + 0x00010008 0x0000006b
2930 + 0x00010009 0x00000076
2931 +
2932 + 0x00020000 0x00000029
2933 + 0x00020001 0x00000033
2934 + 0x00020002 0x0000003d
2935 + 0x00020003 0x00000049
2936 + 0x00020004 0x00000056
2937 + 0x00020005 0x00000061
2938 + 0x00020006 0x0000006d
2939 +
2940 + 0x00030000 0x00000021
2941 + 0x00030001 0x0000002a
2942 + 0x00030002 0x0000003c
2943 + 0x00030003 0x0000004e>;
2944 + #thermal-sensor-cells = <1>;
2945 + };
2946 +
2947 + thermal-zones {
2948 + cpu_thermal: cpu-thermal {
2949 + polling-delay-passive = <1000>;
2950 + polling-delay = <5000>;
2951 +
2952 + thermal-sensors = <&tmu 3>;
2953 +
2954 + trips {
2955 + cpu_alert: cpu-alert {
2956 + temperature = <85000>;
2957 + hysteresis = <2000>;
2958 + type = "passive";
2959 + };
2960 + cpu_crit: cpu-crit {
2961 + temperature = <95000>;
2962 + hysteresis = <2000>;
2963 + type = "critical";
2964 + };
2965 + };
2966 +
2967 + cooling-maps {
2968 + map0 {
2969 + trip = <&cpu_alert>;
2970 + cooling-device =
2971 + <&cpu0 THERMAL_NO_LIMIT
2972 + THERMAL_NO_LIMIT>;
2973 + };
2974 + };
2975 + };
2976 + };
2977 +
2978 + qman: qman@1880000 {
2979 + compatible = "fsl,qman";
2980 + reg = <0x00 0x1880000 0x0 0x10000>;
2981 + interrupts = <0 45 0x4>;
2982 + memory-region = <&qman_fqd &qman_pfdr>;
2983 + };
2984 +
2985 + bman: bman@1890000 {
2986 + compatible = "fsl,bman";
2987 + reg = <0x00 0x1890000 0x0 0x10000>;
2988 + interrupts = <0 45 0x4>;
2989 + memory-region = <&bman_fbpr>;
2990 + };
2991 +
2992 + bportals: bman-portals@508000000 {
2993 + ranges = <0x0 0x5 0x08000000 0x8000000>;
2994 + };
2995 +
2996 + qportals: qman-portals@500000000 {
2997 + ranges = <0x0 0x5 0x00000000 0x8000000>;
2998 + };
2999 +
3000 dspi0: dspi@2100000 {
3001 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
3002 #address-cells = <1>;
3003 @@ -396,6 +556,72 @@
3004 #interrupt-cells = <2>;
3005 };
3006
3007 + uqe: uqe@2400000 {
3008 + #address-cells = <1>;
3009 + #size-cells = <1>;
3010 + device_type = "qe";
3011 + compatible = "fsl,qe", "simple-bus";
3012 + ranges = <0x0 0x0 0x2400000 0x40000>;
3013 + reg = <0x0 0x2400000 0x0 0x480>;
3014 + brg-frequency = <100000000>;
3015 + bus-frequency = <200000000>;
3016 +
3017 + fsl,qe-num-riscs = <1>;
3018 + fsl,qe-num-snums = <28>;
3019 +
3020 + qeic: qeic@80 {
3021 + compatible = "fsl,qe-ic";
3022 + reg = <0x80 0x80>;
3023 + #address-cells = <0>;
3024 + interrupt-controller;
3025 + #interrupt-cells = <1>;
3026 + interrupts = <0 77 0x04 0 77 0x04>;
3027 + };
3028 +
3029 + si1: si@700 {
3030 + #address-cells = <1>;
3031 + #size-cells = <0>;
3032 + compatible = "fsl,ls1043-qe-si",
3033 + "fsl,t1040-qe-si";
3034 + reg = <0x700 0x80>;
3035 + };
3036 +
3037 + siram1: siram@1000 {
3038 + #address-cells = <1>;
3039 + #size-cells = <1>;
3040 + compatible = "fsl,ls1043-qe-siram",
3041 + "fsl,t1040-qe-siram";
3042 + reg = <0x1000 0x800>;
3043 + };
3044 +
3045 + ucc@2000 {
3046 + cell-index = <1>;
3047 + reg = <0x2000 0x200>;
3048 + interrupts = <32>;
3049 + interrupt-parent = <&qeic>;
3050 + };
3051 +
3052 + ucc@2200 {
3053 + cell-index = <3>;
3054 + reg = <0x2200 0x200>;
3055 + interrupts = <34>;
3056 + interrupt-parent = <&qeic>;
3057 + };
3058 +
3059 + muram@10000 {
3060 + #address-cells = <1>;
3061 + #size-cells = <1>;
3062 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3063 + ranges = <0x0 0x10000 0x6000>;
3064 +
3065 + data-only@0 {
3066 + compatible = "fsl,qe-muram-data",
3067 + "fsl,cpm-muram-data";
3068 + reg = <0x0 0x6000>;
3069 + };
3070 + };
3071 + };
3072 +
3073 lpuart0: serial@2950000 {
3074 compatible = "fsl,ls1021a-lpuart";
3075 reg = <0x0 0x2950000 0x0 0x1000>;
3076 @@ -450,6 +676,16 @@
3077 status = "disabled";
3078 };
3079
3080 + ftm0: ftm0@29d0000 {
3081 + compatible = "fsl,ls1043a-ftm";
3082 + reg = <0x0 0x29d0000 0x0 0x10000>,
3083 + <0x0 0x1ee2140 0x0 0x4>;
3084 + reg-names = "ftm", "FlexTimer1";
3085 + interrupts = <0 86 0x4>;
3086 + big-endian;
3087 + status = "okay";
3088 + };
3089 +
3090 wdog0: wdog@2ad0000 {
3091 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3092 reg = <0x0 0x2ad0000 0x0 0x10000>;
3093 @@ -482,6 +718,8 @@
3094 dr_mode = "host";
3095 snps,quirk-frame-length-adjustment = <0x20>;
3096 snps,dis_rxdet_inp3_quirk;
3097 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3098 + snps,dma-snooping;
3099 };
3100
3101 usb1: usb3@3000000 {
3102 @@ -491,6 +729,9 @@
3103 dr_mode = "host";
3104 snps,quirk-frame-length-adjustment = <0x20>;
3105 snps,dis_rxdet_inp3_quirk;
3106 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3107 + snps,dma-snooping;
3108 + configure-gfladj;
3109 };
3110
3111 usb2: usb3@3100000 {
3112 @@ -500,32 +741,52 @@
3113 dr_mode = "host";
3114 snps,quirk-frame-length-adjustment = <0x20>;
3115 snps,dis_rxdet_inp3_quirk;
3116 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3117 + snps,dma-snooping;
3118 + configure-gfladj;
3119 };
3120
3121 sata: sata@3200000 {
3122 compatible = "fsl,ls1043a-ahci";
3123 - reg = <0x0 0x3200000 0x0 0x10000>;
3124 + reg = <0x0 0x3200000 0x0 0x10000>,
3125 + <0x0 0x20140520 0x0 0x4>;
3126 + reg-names = "ahci", "sata-ecc";
3127 interrupts = <0 69 0x4>;
3128 clocks = <&clockgen 4 0>;
3129 dma-coherent;
3130 };
3131
3132 + qdma: qdma@8380000 {
3133 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3134 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3135 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3136 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3137 + interrupts = <0 152 0x4>,
3138 + <0 39 0x4>;
3139 + interrupt-names = "qdma-error", "qdma-queue";
3140 + channels = <8>;
3141 + queues = <2>;
3142 + status-sizes = <64>;
3143 + queue-sizes = <64 64>;
3144 + big-endian;
3145 + };
3146 +
3147 msi1: msi-controller1@1571000 {
3148 - compatible = "fsl,1s1043a-msi";
3149 + compatible = "fsl,ls1043a-msi";
3150 reg = <0x0 0x1571000 0x0 0x8>;
3151 msi-controller;
3152 interrupts = <0 116 0x4>;
3153 };
3154
3155 msi2: msi-controller2@1572000 {
3156 - compatible = "fsl,1s1043a-msi";
3157 + compatible = "fsl,ls1043a-msi";
3158 reg = <0x0 0x1572000 0x0 0x8>;
3159 msi-controller;
3160 interrupts = <0 126 0x4>;
3161 };
3162
3163 msi3: msi-controller3@1573000 {
3164 - compatible = "fsl,1s1043a-msi";
3165 + compatible = "fsl,ls1043a-msi";
3166 reg = <0x0 0x1573000 0x0 0x8>;
3167 msi-controller;
3168 interrupts = <0 160 0x4>;
3169 @@ -536,9 +797,9 @@
3170 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3171 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3172 reg-names = "regs", "config";
3173 - interrupts = <0 118 0x4>, /* controller interrupt */
3174 - <0 117 0x4>; /* PME interrupt */
3175 - interrupt-names = "intr", "pme";
3176 + interrupts = <0 117 0x4>, /* PME interrupt */
3177 + <0 118 0x4>; /* aer interrupt */
3178 + interrupt-names = "pme", "aer";
3179 #address-cells = <3>;
3180 #size-cells = <2>;
3181 device_type = "pci";
3182 @@ -547,7 +808,7 @@
3183 bus-range = <0x0 0xff>;
3184 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3185 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3186 - msi-parent = <&msi1>;
3187 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3188 #interrupt-cells = <1>;
3189 interrupt-map-mask = <0 0 0 7>;
3190 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
3191 @@ -561,9 +822,9 @@
3192 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3193 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3194 reg-names = "regs", "config";
3195 - interrupts = <0 128 0x4>,
3196 - <0 127 0x4>;
3197 - interrupt-names = "intr", "pme";
3198 + interrupts = <0 127 0x4>,
3199 + <0 128 0x4>;
3200 + interrupt-names = "pme", "aer";
3201 #address-cells = <3>;
3202 #size-cells = <2>;
3203 device_type = "pci";
3204 @@ -572,7 +833,7 @@
3205 bus-range = <0x0 0xff>;
3206 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3207 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3208 - msi-parent = <&msi2>;
3209 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3210 #interrupt-cells = <1>;
3211 interrupt-map-mask = <0 0 0 7>;
3212 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
3213 @@ -586,9 +847,9 @@
3214 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3215 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3216 reg-names = "regs", "config";
3217 - interrupts = <0 162 0x4>,
3218 - <0 161 0x4>;
3219 - interrupt-names = "intr", "pme";
3220 + interrupts = <0 161 0x4>,
3221 + <0 162 0x4>;
3222 + interrupt-names = "pme", "aer";
3223 #address-cells = <3>;
3224 #size-cells = <2>;
3225 device_type = "pci";
3226 @@ -597,7 +858,7 @@
3227 bus-range = <0x0 0xff>;
3228 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3229 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3230 - msi-parent = <&msi3>;
3231 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3232 #interrupt-cells = <1>;
3233 interrupt-map-mask = <0 0 0 7>;
3234 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
3235 @@ -607,4 +868,13 @@
3236 };
3237 };
3238
3239 + firmware {
3240 + optee {
3241 + compatible = "linaro,optee-tz";
3242 + method = "smc";
3243 + };
3244 + };
3245 };
3246 +
3247 +#include "qoriq-qman1-portals.dtsi"
3248 +#include "qoriq-bman1-portals.dtsi"
3249 --- /dev/null
3250 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3251 @@ -0,0 +1,48 @@
3252 +/*
3253 + * QorIQ FMan v3 device tree nodes for ls1046
3254 + *
3255 + * Copyright 2015-2016 Freescale Semiconductor Inc.
3256 + *
3257 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3258 + */
3259 +
3260 +&soc {
3261 +
3262 +/* include used FMan blocks */
3263 +#include "qoriq-fman3-0.dtsi"
3264 +#include "qoriq-fman3-0-1g-0.dtsi"
3265 +#include "qoriq-fman3-0-1g-1.dtsi"
3266 +#include "qoriq-fman3-0-1g-2.dtsi"
3267 +#include "qoriq-fman3-0-1g-3.dtsi"
3268 +#include "qoriq-fman3-0-1g-4.dtsi"
3269 +#include "qoriq-fman3-0-1g-5.dtsi"
3270 +#include "qoriq-fman3-0-10g-0.dtsi"
3271 +#include "qoriq-fman3-0-10g-1.dtsi"
3272 +};
3273 +
3274 +&fman0 {
3275 + /* these aliases provide the FMan ports mapping */
3276 + enet0: ethernet@e0000 {
3277 + };
3278 +
3279 + enet1: ethernet@e2000 {
3280 + };
3281 +
3282 + enet2: ethernet@e4000 {
3283 + };
3284 +
3285 + enet3: ethernet@e6000 {
3286 + };
3287 +
3288 + enet4: ethernet@e8000 {
3289 + };
3290 +
3291 + enet5: ethernet@ea000 {
3292 + };
3293 +
3294 + enet6: ethernet@f0000 {
3295 + };
3296 +
3297 + enet7: ethernet@f2000 {
3298 + };
3299 +};
3300 --- /dev/null
3301 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
3302 @@ -0,0 +1,110 @@
3303 +/*
3304 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3305 + *
3306 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3307 + *
3308 + * Mingkai Hu <Mingkai.hu@freescale.com>
3309 + *
3310 + * This file is dual-licensed: you can use it either under the terms
3311 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3312 + * licensing only applies to this file, and not this project as a
3313 + * whole.
3314 + *
3315 + * a) This library is free software; you can redistribute it and/or
3316 + * modify it under the terms of the GNU General Public License as
3317 + * published by the Free Software Foundation; either version 2 of the
3318 + * License, or (at your option) any later version.
3319 + *
3320 + * This library is distributed in the hope that it will be useful,
3321 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3322 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3323 + * GNU General Public License for more details.
3324 + *
3325 + * Or, alternatively,
3326 + *
3327 + * b) Permission is hereby granted, free of charge, to any person
3328 + * obtaining a copy of this software and associated documentation
3329 + * files (the "Software"), to deal in the Software without
3330 + * restriction, including without limitation the rights to use,
3331 + * copy, modify, merge, publish, distribute, sublicense, and/or
3332 + * sell copies of the Software, and to permit persons to whom the
3333 + * Software is furnished to do so, subject to the following
3334 + * conditions:
3335 + *
3336 + * The above copyright notice and this permission notice shall be
3337 + * included in all copies or substantial portions of the Software.
3338 + *
3339 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3340 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3341 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3342 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT