ramips: fix size-cells on spi nodes
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / CS-QR10.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 / {
6 compatible = "ralink,mt7620a-soc";
7 model = "Planex CS-QR10";
8
9 sound {
10 compatible = "mediatek,mt7620-audio-wm8960";
11 model = "mt7620-wm8960";
12 i2s-controller = <&i2s>;
13 audio-routing =
14 "Ext Spk", "SPK_LP",
15 "Ext Spk", "SPK_LN",
16 "Ext Spk", "SPK_RP",
17 "Ext Spk", "SPK_RN";
18 };
19
20 gpio-leds {
21 compatible = "gpio-leds";
22
23 power {
24 label = "cs-qr10:red:power";
25 gpios = <&gpio1 4 1>;
26 };
27 };
28
29 gpio-keys-polled {
30 compatible = "gpio-keys-polled";
31 #address-cells = <1>;
32 #size-cells = <0>;
33 poll-interval = <20>;
34
35 s1 {
36 label = "reset";
37 gpios = <&gpio1 1 1>;
38 linux,code = <0x198>;
39 };
40
41 s2 {
42 label = "wps";
43 gpios = <&gpio1 3 1>;
44 linux,code = <0x211>;
45 };
46 };
47 };
48
49 &gpio0 {
50 status = "okay";
51 };
52
53 &gpio1 {
54 status = "okay";
55 };
56
57 &gpio2 {
58 status = "okay";
59 };
60
61 &gpio3 {
62 status = "okay";
63 };
64
65 &i2c {
66 status = "okay";
67 };
68
69 &i2s {
70 status = "okay";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pcm_i2s_pins>;
73 };
74
75 &spi0 {
76 status = "okay";
77
78 m25p80@0 {
79 #address-cells = <1>;
80 #size-cells = <1>;
81 compatible = "jedec,spi-nor";
82 reg = <0>;
83 linux,modalias = "m25p80", "mx25l6405d";
84 spi-max-frequency = <10000000>;
85
86 partition@0 {
87 label = "u-boot";
88 reg = <0x0 0x30000>;
89 read-only;
90 };
91
92 partition@30000 {
93 label = "u-boot-env";
94 reg = <0x30000 0x10000>;
95 read-only;
96 };
97
98 factory: partition@40000 {
99 label = "factory";
100 reg = <0x40000 0x10000>;
101 read-only;
102 };
103
104 partition@50000 {
105 label = "firmware";
106 reg = <0x50000 0x7b0000>;
107 };
108 };
109 };
110
111 &pcm {
112 status = "okay";
113 };
114
115 &gdma {
116 status = "okay";
117 };
118
119 &pinctrl {
120 state_default: pinctrl0 {
121 gpio {
122 ralink,group = "spi refclk", "rgmii1";
123 ralink,function = "gpio";
124 };
125 wdt {
126 ralink,group = "wdt";
127 ralink,function = "wdt refclk";
128 };
129 };
130 };
131
132 &ethernet {
133 pinctrl-names = "default";
134 pinctrl-0 = <&ephy_pins>;
135 mtd-mac-address = <&factory 0x4>;
136 mediatek,portmap = "llllw";
137 };
138
139 &gsw {
140 ralink,port4 = "ephy";
141 };
142
143 &sdhci {
144 status = "okay";
145 };
146
147 &ehci {
148 status = "okay";
149 };
150
151 &ohci {
152 status = "okay";
153 };
154
155 &wmac {
156 ralink,mtd-eeprom = <&factory 0>;
157 };
158
159 &pcie {
160 status = "okay";
161 };