target/linux/ramips/dts/DIR-860L-B1.dts

   1 /dts-v1/;
   2
   3 #include "mt7621.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
  10         model = "D-Link DIR-860L B1";
  11
  12         aliases {
  13                 led-status = &led_power_green;
  14         };
  15
  16         memory@0 {
  17                 device_type = "memory";
  18                 reg = <0x0 0x8000000>;
  19         };
  20
  21         chosen {
  22                 bootargs = "console=ttyS0,57600";
  23         };
  24
  25         gpio-leds {
  26                 compatible = "gpio-leds";
  27
  28                 power {
  29                         label = "dir-860l-b1:orange:power";
  30                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  31                 };
  32
  33                 led_power_green: power2 {
  34                         label = "dir-860l-b1:green:power";
  35                         gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 net {
  39                         label = "dir-860l-b1:orange:net";
  40                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 net2 {
  44                         label = "dir-860l-b1:green:net";
  45                         gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  46                 };
  47         };
  48
  49         gpio-keys-polled {
  50                 compatible = "gpio-keys-polled";
  51                 poll-interval = <20>;
  52
  53                 reset {
  54                         label = "reset";
  55                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  56                         linux,code = <KEY_RESTART>;
  57                 };
  58
  59                 wps {
  60                         label = "wps";
  61                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  62                         linux,code = <KEY_WPS_BUTTON>;
  63                 };
  64         };
  65 };
  66
  67 &spi0 {
  68         status = "okay";
  69
  70         m25p80@0 {
  71                 compatible = "jedec,spi-nor";
  72                 reg = <0>;
  73                 spi-max-frequency = <10000000>;
  74                 m25p,chunked-io = <32>;
  75
  76                 partitions {
  77                         compatible = "fixed-partitions";
  78                         #address-cells = <1>;
  79                         #size-cells = <1>;
  80
  81                         partition@0 {
  82                                 label = "u-boot";
  83                                 reg = <0x0 0x30000>;
  84                                 read-only;
  85                         };
  86
  87                         partition@30000 {
  88                                 label = "u-boot-env";
  89                                 reg = <0x30000 0x4000>;
  90                                 read-only;
  91                         };
  92
  93                         radio: partition@34000 {
  94                                 label = "radio";
  95                                 reg = <0x34000 0x4000>;
  96                                 read-only;
  97                         };
  98
  99                         factory: partition@38000 {
 100                                 label = "factory";
 101                                 reg = <0x38000 0x8000>;
 102                                 read-only;
 103                         };
 104
 105                         partition@40000 {
 106                                 label = "defaults";
 107                                 reg = <0x40000 0x10000>;
 108                                 read-only;
 109                         };
 110
 111                         partition@50000 {
 112                                 label = "firmware";
 113                                 reg = <0x50000 0xfb0000>;
 114                         };
 115                 };
 116         };
 117 };
 118
 119 &pcie {
 120         status = "okay";
 121 };
 122
 123 &pcie0 {
 124         mt76@0,0 {
 125                 reg = <0x0000 0 0 0 0>;
 126                 mediatek,mtd-eeprom = <&radio 0x2000>;
 127                 ieee80211-freq-limit = <5000000 6000000>;
 128         };
 129 };
 130
 131 &pcie1 {
 132         mt76@0,0 {
 133                 reg = <0x0000 0 0 0 0>;
 134                 mediatek,mtd-eeprom = <&radio 0>;
 135                 ieee80211-freq-limit = <2400000 2500000>;
 136         };
 137 };
 138
 139 &pinctrl {
 140         state_default: pinctrl0 {
 141                 gpio {
 142                         ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
 143                         ralink,function = "gpio";
 144                 };
 145         };
 146 };