3788c44b3a69d99cbd8c162382a11f06293fd3d9
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / MIR3G.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "xiaomi,mir3g", "mediatek,mt7621-soc";
10 model = "Xiaomi Mi Router 3G";
11
12 aliases {
13 led-boot = &led_status_blue;
14 led-failsafe = &led_status_blue;
15 led-running = &led_status_blue;
16 led-upgrade = &led_status_blue;
17 };
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x10000000>;
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,115200n8";
26 };
27
28 gpio-leds {
29 compatible = "gpio-leds";
30
31 status_red {
32 label = "mir3g:red:status";
33 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
34 };
35
36 led_status_blue: status_blue {
37 label = "mir3g:blue:status";
38 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
39 };
40
41 status_yellow {
42 label = "mir3g:yellow:status";
43 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
44 };
45
46 wan_amber {
47 label = "mir3g:amber:wan";
48 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
49 };
50
51 lan1_amber {
52 label = "mir3g:amber:lan1";
53 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
54 };
55
56 lan2_amber {
57 label = "mir3g:amber:lan2";
58 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
59 };
60 };
61
62 keys {
63 compatible = "gpio-keys-polled";
64 poll-interval = <20>;
65
66 reset {
67 label = "reset";
68 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
69 linux,code = <KEY_RESTART>;
70 };
71 };
72
73 reg_usb_vbus: reg_usb_vbus {
74 compatible = "regulator-fixed";
75 regulator-name = "usb_vbus";
76 regulator-min-microvolt = <5000000>;
77 regulator-max-microvolt = <5000000>;
78 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
79 enable-active-high;
80 };
81 };
82
83 &xhci {
84 vbus-supply = <&reg_usb_vbus>;
85 };
86
87 &nand {
88 status = "okay";
89
90 partitions {
91 compatible = "fixed-partitions";
92 #address-cells = <1>;
93 #size-cells = <1>;
94
95 partition@0 {
96 label = "Bootloader";
97 reg = <0x0 0x80000>;
98 read-only;
99 };
100
101 partition@80000 {
102 label = "Config";
103 reg = <0x80000 0x40000>;
104 };
105
106 partition@c0000 {
107 label = "Bdata";
108 reg = <0xc0000 0x40000>;
109 read-only;
110 };
111
112 factory: partition@100000 {
113 label = "Factory";
114 reg = <0x100000 0x40000>;
115 read-only;
116 };
117
118 partition@140000 {
119 label = "crash";
120 reg = <0x140000 0x40000>;
121 };
122
123 partition@180000 {
124 label = "crash_syslog";
125 reg = <0x180000 0x40000>;
126 };
127
128 partition@1c0000 {
129 label = "reserved0";
130 reg = <0x1c0000 0x40000>;
131 read-only;
132 };
133
134 /* uboot expects to find kernels at 0x200000 & 0x600000
135 * referred to as system 1 & system 2 respectively.
136 * a kernel is considered suitable for handing control over
137 * if its linux magic number exists & uImage CRC are correct.
138 * If either of those conditions fail, a matching sys'n'_fail flag
139 * is set in uboot env & a restart performed in the hope that the
140 * alternate kernel is okay.
141 * if neither kernel checksums ok and both are marked failed, system 2
142 * is booted anyway.
143 *
144 * Note uboot's tftp flash install writes the transferred
145 * image to both kernel partitions.
146 */
147
148 partition@200000 {
149 label = "kernel_stock";
150 reg = <0x200000 0x400000>;
151 };
152
153 partition@600000 {
154 label = "kernel";
155 reg = <0x600000 0x400000>;
156 };
157
158 /* ubi partition is the result of squashing
159 * next consecutive stock partitions:
160 * - rootfs0 (rootfs partition for stock kernel0),
161 * - rootfs1 (rootfs partition for stock failsafe kernel1),
162 * - overlay (used as ubi overlay in stock fw)
163 * resulting 117,5MiB space for packages.
164 */
165
166 partition@a00000 {
167 label = "ubi";
168 reg = <0xa00000 0x7580000>;
169 };
170 };
171 };
172
173 &pcie {
174 status = "okay";
175 };
176
177 &pcie0 {
178 wifi@0,0 {
179 compatible = "pci14c3,7603";
180 reg = <0x0000 0 0 0 0>;
181 mediatek,mtd-eeprom = <&factory 0x0000>;
182 ieee80211-freq-limit = <2400000 2500000>;
183 };
184 };
185
186 &pcie1 {
187 wifi@0,0 {
188 compatible = "pci14c3,7662";
189 reg = <0x0000 0 0 0 0>;
190 mediatek,mtd-eeprom = <&factory 0x8000>;
191 ieee80211-freq-limit = <5000000 6000000>;
192 };
193 };
194
195 &ethernet {
196 mtd-mac-address = <&factory 0xe000>;
197 mediatek,portmap = "lwlll";
198 };
199
200 &pinctrl {
201 state_default: pinctrl0 {
202 gpio {
203 ralink,group = "jtag", "uart2", "uart3", "wdt";
204 ralink,function = "gpio";
205 };
206 };
207 };