ea175120825e0b2ccc6bab55ff590247c4705cf8
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / MT7620a_V22SG.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
9 model = "Ralink MT7620a V22SG High Power evaluation board";
10
11 gpio-keys-polled {
12 compatible = "gpio-keys-polled";
13 #address-cells = <1>;
14 #size-cells = <0>;
15 poll-interval = <20>;
16
17 reset {
18 label = "reset";
19 gpios = <&gpio0 1 1>;
20 linux,code = <KEY_RESTART>;
21 };
22
23 aoss {
24 label = "aoss";
25 gpios = <&gpio0 2 1>;
26 linux,code = <KEY_WPS_BUTTON>;
27 };
28 };
29
30 nand {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "mtk,mt7620-nand";
34
35 partition@0 {
36 label = "u-boot";
37 reg = <0x0 0x40000>;
38 read-only;
39 };
40
41 partition@40000 {
42 label = "u-boot-env";
43 reg = <0x40000 0x20000>;
44 read-only;
45 };
46
47 factory: partition@60000 {
48 label = "factory";
49 reg = <0x60000 0x20000>;
50 read-only;
51 };
52
53 partition@80000 {
54 label = "firmware";
55 reg = <0x80000 0x7f80000>;
56 };
57 };
58 };
59
60 &pinctrl {
61 state_default: pinctrl0 {
62 gpio {
63 ralink,group = "i2c", "uartf", "spi";
64 ralink,function = "gpio";
65 };
66 };
67 };
68
69 &ethernet {
70 status = "okay";
71 pinctrl-names = "default";
72 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
73 mediatek,portmap = "llllw";
74
75 port@4 {
76 status = "okay";
77 phy-handle = <&phy4>;
78 phy-mode = "rgmii";
79 };
80
81 port@5 {
82 status = "okay";
83 phy-handle = <&phy5>;
84 phy-mode = "rgmii";
85 };
86
87 mdio-bus {
88 status = "okay";
89
90 phy4: ethernet-phy@4 {
91 reg = <4>;
92 phy-mode = "rgmii";
93 };
94
95 phy5: ethernet-phy@5 {
96 reg = <5>;
97 phy-mode = "rgmii";
98 };
99 };
100 };
101
102 &gsw {
103 mediatek,port4 = "gmac";
104 };
105
106 &pcie {
107 status = "okay";
108 };
109
110 &ehci {
111 status = "okay";
112 };
113
114 &ohci {
115 status = "okay";
116 };