ramips: fix power LED DTB for wt3020
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / MZK-750DHP.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc";
10 model = "Planex MZK-750DHP";
11
12 aliases {
13 led-status = &led_power;
14 };
15
16 gpio-leds {
17 compatible = "gpio-leds";
18
19 wps {
20 label = "mzk-750dhp:green:wps";
21 gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
22 };
23
24 led_power: power {
25 label = "mzk-750dhp:green:power";
26 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
27 };
28
29 wlan5g {
30 label = "mzk-750dhp:green:wlan5g";
31 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
32 };
33 };
34
35 gpio-keys-polled {
36 compatible = "gpio-keys-polled";
37 poll-interval = <20>;
38
39 s1 {
40 label = "reset";
41 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
43 };
44
45 s2 {
46 label = "wps";
47 gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_WPS_BUTTON>;
49 };
50 };
51 };
52
53 &gpio1 {
54 status = "okay";
55 };
56
57 &gpio2 {
58 status = "okay";
59 };
60
61 &spi0 {
62 status = "okay";
63
64 m25p80@0 {
65 compatible = "jedec,spi-nor";
66 reg = <0>;
67 spi-max-frequency = <10000000>;
68
69 partitions {
70 compatible = "fixed-partitions";
71 #address-cells = <1>;
72 #size-cells = <1>;
73
74 partition@0 {
75 label = "u-boot";
76 reg = <0x0 0x30000>;
77 read-only;
78 };
79
80 partition@30000 {
81 label = "u-boot-env";
82 reg = <0x30000 0x10000>;
83 read-only;
84 };
85
86 factory: partition@40000 {
87 label = "factory";
88 reg = <0x40000 0x10000>;
89 read-only;
90 };
91
92 partition@50000 {
93 label = "firmware";
94 reg = <0x50000 0x7b0000>;
95 };
96 };
97 };
98 };
99
100 &pinctrl {
101 state_default: pinctrl0 {
102 gpio {
103 ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd";
104 ralink,function = "gpio";
105 };
106 };
107 };
108
109 &ethernet {
110 pinctrl-names = "default";
111 pinctrl-0 = <&ephy_pins>;
112 mtd-mac-address = <&factory 0x4>;
113 mediatek,portmap = "llllw";
114 };
115
116 &gsw {
117 mediatek,port4 = "ephy";
118 };
119
120 &wmac {
121 ralink,mtd-eeprom = <&factory 0>;
122 };
123
124 &pcie {
125 status = "okay";
126 };
127
128 &pcie0 {
129 mt76@0,0 {
130 reg = <0x0000 0 0 0 0>;
131 mediatek,mtd-eeprom = <&factory 0x8000>;
132 };
133 };