target/linux/ramips/dts/MZK-750DHP.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc";
  10         model = "Planex MZK-750DHP";
  11
  12         aliases {
  13                 led-boot = &led_power;
  14                 led-failsafe = &led_power;
  15                 led-running = &led_power;
  16                 led-upgrade = &led_power;
  17         };
  18
  19         gpio-leds {
  20                 compatible = "gpio-leds";
  21
  22                 wps {
  23                         label = "mzk-750dhp:green:wps";
  24                         gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
  25                 };
  26
  27                 led_power: power {
  28                         label = "mzk-750dhp:green:power";
  29                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  30                 };
  31
  32                 wlan5g {
  33                         label = "mzk-750dhp:green:wlan5g";
  34                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  35                 };
  36         };
  37
  38         keys {
  39                 compatible = "gpio-keys-polled";
  40                 poll-interval = <20>;
  41
  42                 s1 {
  43                         label = "reset";
  44                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  45                         linux,code = <KEY_RESTART>;
  46                 };
  47
  48                 s2 {
  49                         label = "wps";
  50                         gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
  51                         linux,code = <KEY_WPS_BUTTON>;
  52                 };
  53         };
  54 };
  55
  56 &gpio1 {
  57         status = "okay";
  58 };
  59
  60 &gpio2 {
  61         status = "okay";
  62 };
  63
  64 &spi0 {
  65         status = "okay";
  66
  67         m25p80@0 {
  68                 compatible = "jedec,spi-nor";
  69                 reg = <0>;
  70                 spi-max-frequency = <10000000>;
  71
  72                 partitions {
  73                         compatible = "fixed-partitions";
  74                         #address-cells = <1>;
  75                         #size-cells = <1>;
  76
  77                         partition@0 {
  78                                 label = "u-boot";
  79                                 reg = <0x0 0x30000>;
  80                                 read-only;
  81                         };
  82
  83                         partition@30000 {
  84                                 label = "u-boot-env";
  85                                 reg = <0x30000 0x10000>;
  86                                 read-only;
  87                         };
  88
  89                         factory: partition@40000 {
  90                                 label = "factory";
  91                                 reg = <0x40000 0x10000>;
  92                                 read-only;
  93                         };
  94
  95                         partition@50000 {
  96                                 compatible = "denx,uimage";
  97                                 label = "firmware";
  98                                 reg = <0x50000 0x7b0000>;
  99                         };
 100                 };
 101         };
 102 };
 103
 104 &pinctrl {
 105         state_default: pinctrl0 {
 106                 gpio {
 107                         ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd";
 108                         ralink,function = "gpio";
 109                 };
 110         };
 111 };
 112
 113 &ethernet {
 114         pinctrl-names = "default";
 115         pinctrl-0 = <&ephy_pins>;
 116         mtd-mac-address = <&factory 0x4>;
 117         mediatek,portmap = "llllw";
 118 };
 119
 120 &gsw {
 121         mediatek,port4 = "ephy";
 122 };
 123
 124 &wmac {
 125         ralink,mtd-eeprom = <&factory 0>;
 126 };
 127
 128 &pcie {
 129         status = "okay";
 130 };
 131
 132 &pcie0 {
 133         mt76@0,0 {
 134                 reg = <0x0000 0 0 0 0>;
 135                 mediatek,mtd-eeprom = <&factory 0x8000>;
 136         };
 137 };