ramips: dts: Unify naming of gpio-led nodes
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / PBR-M1.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "d-team,pbr-m1", "mediatek,mt7621-soc";
10 model = "PBR-M1";
11
12 aliases {
13 led-boot = &led_sys;
14 led-failsafe = &led_sys;
15 led-running = &led_sys;
16 led-upgrade = &led_sys;
17 };
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x10000000>;
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,115200";
26 };
27
28 palmbus: palmbus@1E000000 {
29 i2c: i2c@900 {
30 status = "okay";
31
32 pcf8563: rtc@51 {
33 status = "okay";
34 compatible = "nxp,pcf8563";
35 reg = <0x51>;
36 };
37 };
38 };
39
40 leds {
41 compatible = "gpio-leds";
42
43 power {
44 label = "pbr-m1:blue:power";
45 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
46 default-state = "on";
47 };
48
49 led_sys: sys {
50 label = "pbr-m1:blue:sys";
51 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
52 };
53
54 internet {
55 label = "pbr-m1:blue:internet";
56 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
57 };
58
59 wlan2g {
60 label = "pbr-m1:blue:wlan2g";
61 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
62 };
63
64 wlan5g {
65 label = "pbr-m1:blue:wlan5g";
66 gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
67 };
68 };
69
70 keys {
71 compatible = "gpio-keys-polled";
72 poll-interval = <20>;
73
74 reset {
75 label = "reset";
76 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_RESTART>;
78 };
79 };
80
81 gpio_export {
82 compatible = "gpio-export";
83 #size-cells = <0>;
84
85 power_usb2 {
86 gpio-export,name = "power_usb2";
87 gpio-export,output = <1>;
88 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
89 };
90
91 power_usb3 {
92 gpio-export,name = "power_usb3";
93 gpio-export,output = <1>;
94 gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
95 };
96
97 power_sata {
98 gpio-export,name = "power_sata";
99 gpio-export,output = <1>;
100 gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
101 };
102 };
103
104 beeper: beeper {
105 compatible = "gpio-beeper";
106 gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
107 };
108 };
109
110 &sdhci {
111 status = "okay";
112 };
113
114 &spi0 {
115 status = "okay";
116
117 m25p80@0 {
118 compatible = "jedec,spi-nor";
119 reg = <0>;
120 spi-max-frequency = <10000000>;
121 m25p,chunked-io = <32>;
122
123 partitions {
124 compatible = "fixed-partitions";
125 #address-cells = <1>;
126 #size-cells = <1>;
127
128 partition@0 {
129 label = "u-boot";
130 reg = <0x0 0x30000>;
131 read-only;
132 };
133
134 partition@30000 {
135 label = "u-boot-env";
136 reg = <0x30000 0x10000>;
137 read-only;
138 };
139
140 factory: partition@40000 {
141 label = "factory";
142 reg = <0x40000 0x10000>;
143 read-only;
144 };
145
146 partition@50000 {
147 compatible = "denx,uimage";
148 label = "firmware";
149 reg = <0x50000 0xfb0000>;
150 };
151 };
152 };
153 };
154
155 &pcie {
156 status = "okay";
157 };
158
159 &pcie0 {
160 mt76@0,0 {
161 reg = <0x0000 0 0 0 0>;
162 mediatek,mtd-eeprom = <&factory 0x8000>;
163 ieee80211-freq-limit = <5000000 6000000>;
164 };
165 };
166
167 &pcie1 {
168 mt76@0,0 {
169 reg = <0x0000 0 0 0 0>;
170 mediatek,mtd-eeprom = <&factory 0x0000>;
171 };
172 };
173
174 &ethernet {
175 mtd-mac-address = <&factory 0xe000>;
176 };
177
178 &pinctrl {
179 state_default: pinctrl0 {
180 gpio {
181 ralink,group = "wdt", "rgmii2", "jtag", "mdio";
182 ralink,function = "gpio";
183 };
184 };
185 };