target/linux/ramips/dts/PSG1208.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
  10         model = "Phicomm PSG1208";
  11
  12         aliases {
  13                 led-status = &led_wps;
  14         };
  15
  16         gpio-leds {
  17                 compatible = "gpio-leds";
  18
  19                 led_wps: wps {
  20                         label = "psg1208:white:wps";
  21                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  22                 };
  23
  24                 wlan {
  25                         label = "psg1208:white:wlan2g";
  26                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  27                 };
  28         };
  29
  30         gpio-keys-polled {
  31                 compatible = "gpio-keys-polled";
  32                 poll-interval = <20>;
  33
  34                 reset {
  35                         label = "reset";
  36                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  37                         linux,code = <KEY_RESTART>;
  38                 };
  39         };
  40 };
  41
  42 &gpio1 {
  43         status = "okay";
  44 };
  45
  46 &gpio3 {
  47         status = "okay";
  48 };
  49
  50 &spi0 {
  51         status = "okay";
  52
  53         m25p80@0 {
  54                 #address-cells = <1>;
  55                 #size-cells = <1>;
  56                 compatible = "jedec,spi-nor";
  57                 reg = <0>;
  58                 spi-max-frequency = <10000000>;
  59
  60                 partition@0 {
  61                         label = "u-boot";
  62                         reg = <0x0 0x30000>;
  63                         read-only;
  64                 };
  65
  66                 partition@20000 {
  67                         label = "u-boot-env";
  68                         reg = <0x30000 0x10000>;
  69                         read-only;
  70                 };
  71
  72                 factory: partition@30000 {
  73                         label = "factory";
  74                         reg = <0x40000 0x10000>;
  75                         read-only;
  76                 };
  77
  78                 partition@40000 {
  79                         label = "firmware";
  80                         reg = <0x50000 0x7b0000>;
  81                 };
  82         };
  83 };
  84
  85 &pinctrl {
  86         state_default: pinctrl0 {
  87                 gpio {
  88                         ralink,group = "i2c", "spi refclk", "wled";
  89                         ralink,function = "gpio";
  90                 };
  91         };
  92 };
  93
  94 &ethernet {
  95         pinctrl-names = "default";
  96         pinctrl-0 = <&ephy_pins>;
  97         mtd-mac-address = <&factory 0x4>;
  98         mediatek,portmap = "llllw";
  99 };
 100
 101 &pcie {
 102         status = "okay";
 103 };
 104
 105 &pcie0 {
 106         mt76@0,0 {
 107                 reg = <0x0000 0 0 0 0>;
 108                 mediatek,mtd-eeprom = <&factory 0x8000>;
 109                 ieee80211-freq-limit = <5000000 6000000>;
 110         };
 111 };
 112
 113 &wmac {
 114         ralink,mtd-eeprom = <&factory 0>;
 115 };