mt76: update to the latest version
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / PSG1208.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "PSG1208", "ralink,mt7620a-soc";
9 model = "Phicomm PSG1208";
10
11 gpio-leds {
12 compatible = "gpio-leds";
13
14 wan {
15 label = "psg1208:white:wps";
16 gpios = <&gpio1 15 1>;
17 };
18
19 wlan {
20 label = "psg1208:white:wlan2g";
21 gpios = <&gpio3 0 1>;
22 };
23 };
24
25 gpio-keys-polled {
26 compatible = "gpio-keys-polled";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 poll-interval = <20>;
30
31 reset {
32 label = "reset";
33 gpios = <&gpio0 1 1>;
34 linux,code = <KEY_RESTART>;
35 };
36 };
37 };
38
39 &gpio1 {
40 status = "okay";
41 };
42
43 &gpio3 {
44 status = "okay";
45 };
46
47 &spi0 {
48 status = "okay";
49
50 m25p80@0 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 compatible = "jedec,spi-nor";
54 reg = <0>;
55 linux,modalias = "m25p80", "en25q64";
56 spi-max-frequency = <10000000>;
57
58 partition@0 {
59 label = "u-boot";
60 reg = <0x0 0x30000>;
61 read-only;
62 };
63
64 partition@20000 {
65 label = "u-boot-env";
66 reg = <0x30000 0x10000>;
67 read-only;
68 };
69
70 factory: partition@30000 {
71 label = "factory";
72 reg = <0x40000 0x10000>;
73 read-only;
74 };
75
76 partition@40000 {
77 label = "firmware";
78 reg = <0x50000 0x7b0000>;
79 };
80 };
81 };
82
83 &pinctrl {
84 state_default: pinctrl0 {
85 gpio {
86 ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
87 ralink,function = "gpio";
88 };
89 };
90 };
91
92 &ethernet {
93 pinctrl-names = "default";
94 pinctrl-0 = <&ephy_pins>;
95 mtd-mac-address = <&factory 0x4>;
96 mediatek,portmap = "llllw";
97 };
98
99 &pcie {
100 status = "okay";
101
102 pcie-bridge {
103 mt76@0,0 {
104 reg = <0x0000 0 0 0 0>;
105 device_type = "pci";
106 mediatek,mtd-eeprom = <&factory 0x8000>;
107 ieee80211-freq-limit = <5000000 6000000>;
108 };
109 };
110 };
111
112 &wmac {
113 ralink,mtd-eeprom = <&factory 0>;
114 };