ramips/mt7620: Name DTS files based on scheme
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / RE6500.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "linksys,re6500", "mediatek,mt7621-soc";
10 model = "Linksys RE6500";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x4000000>;
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,57600";
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 wifi {
32 label = "re6500:orange:wifi";
33 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
34 };
35
36 led_power: power {
37 label = "re6500:white:power";
38 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
39 };
40 };
41
42 keys {
43 compatible = "gpio-keys-polled";
44 poll-interval = <20>;
45
46 wps {
47 label = "wps";
48 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_WPS_BUTTON>;
50 };
51
52 reset {
53 label = "reset";
54 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
55 linux,code = <KEY_RESTART>;
56 };
57 };
58 };
59
60 &spi0 {
61 status = "okay";
62
63 m25p80@0 {
64 compatible = "jedec,spi-nor";
65 reg = <0>;
66 spi-max-frequency = <10000000>;
67
68 partitions {
69 compatible = "fixed-partitions";
70 #address-cells = <1>;
71 #size-cells = <1>;
72
73 partition@0 {
74 label = "u-boot";
75 reg = <0x0 0x30000>;
76 read-only;
77 };
78
79 partition@30000 {
80 label = "u-boot-env";
81 reg = <0x30000 0x10000>;
82 read-only;
83 };
84
85 factory: partition@40000 {
86 label = "factory";
87 reg = <0x40000 0x10000>;
88 read-only;
89 };
90
91 partition@50000 {
92 compatible = "denx,uimage";
93 label = "firmware";
94 reg = <0x50000 0x7b0000>;
95 };
96 };
97 };
98 };
99
100 &pinctrl {
101 state_default: pinctrl0 {
102 gpio {
103 ralink,group = "i2c", "uart2", "uart3", "rgmii2";
104 ralink,function = "gpio";
105 };
106 };
107 };
108
109 &pcie {
110 status = "okay";
111 };
112
113 &pcie0 {
114 mt76@0,0 {
115 reg = <0x0000 0 0 0 0>;
116 mediatek,mtd-eeprom = <&factory 0x0000>;
117 ieee80211-freq-limit = <5000000 6000000>;
118 };
119 };
120
121 &pcie1 {
122 mt76@0,0 {
123 reg = <0x0000 0 0 0 0>;
124 mediatek,mtd-eeprom = <&factory 0x8000>;
125 ieee80211-freq-limit = <2400000 2500000>;
126 };
127 };
128
129 &ethernet {
130 mtd-mac-address = <&factory 0x2e>;
131 };
132
133 &xhci {
134 status = "disabled";
135 };