ramips: dts: Unify naming of gpio-led nodes
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / TL-WR902ACV3.dts
1 /dts-v1/;
2
3 #include "TPLINK-8M.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "tplink,tl-wr902ac-v3", "mediatek,mt7628an-soc";
10 model = "TP-Link TL-WR902AC v3";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 keys {
20 compatible = "gpio-keys-polled";
21 poll-interval = <20>;
22
23 reset {
24 label = "reset";
25 gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
27 };
28
29 sw1 {
30 label = "sw1";
31 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
32 linux,code = <BTN_0>;
33 };
34
35 sw2 {
36 label = "sw2";
37 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
38 linux,code = <BTN_1>;
39 };
40
41 wps {
42 label = "wps";
43 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_WPS_BUTTON>;
45 };
46 };
47
48 leds {
49 compatible = "gpio-leds";
50
51 lan {
52 label = "tl-wr902ac-v3:green:lan";
53 gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
54 };
55
56 led_power: power {
57 label = "tl-wr902ac-v3:green:power";
58 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
59 };
60
61 usb {
62 label = "tl-wr902ac-v3:green:usb";
63 gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
64 trigger-sources = <&ohci_port1>, <&ehci_port1>;
65 linux,default-trigger = "usbport";
66 };
67
68 wan {
69 label = "tl-wr902ac-v3:green:wan";
70 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
71 };
72
73 wlan {
74 label = "tl-wr902ac-v3:green:wlan";
75 gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
76 };
77
78 wps {
79 label = "tl-wr902ac-v3:green:wps";
80 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
81 };
82 };
83 };
84
85 &pinctrl {
86 state_default: pinctrl0 {
87 gpio {
88 ralink,group = "i2c", "i2s", "p0led_an", "p2led_an", "p4led_an", "uart1", "wdt", "wled_an";
89 ralink,function = "gpio";
90 };
91 };
92 };
93
94 &ehci {
95 status = "okay";
96 };
97
98 &ohci {
99 status = "okay";
100 };
101
102 &pcie {
103 status = "okay";
104 };
105
106 &pcie0 {
107 mt76@0,0 {
108 reg = <0x0000 0 0 0 0>;
109 mediatek,mtd-eeprom = <&factory 0x28000>;
110 ieee80211-freq-limit = <5000000 6000000>;
111 mtd-mac-address = <&factory 0xf100>;
112 mtd-mac-address-increment = <(-1)>;
113 };
114 };