add the dts files that describe the boards in future
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3352-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600 init=/init";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 palmbus@10000000 {
24 compatible = "palmbus";
25 reg = <0x10000000 0x200000>;
26 ranges = <0x0 0x10000000 0x1FFFFF>;
27
28 #address-cells = <1>;
29 #size-cells = <1>;
30
31 sysc@0 {
32 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
33 reg = <0x0 0x100>;
34 };
35
36 timer@100 {
37 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
38 reg = <0x100 0x20>;
39
40 interrupt-parent = <&intc>;
41 interrupts = <1>;
42 };
43
44 watchdog@120 {
45 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
46 reg = <0x120 0x10>;
47 };
48
49 intc: intc@200 {
50 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
51 reg = <0x200 0x100>;
52
53 interrupt-controller;
54 #interrupt-cells = <1>;
55
56 interrupt-parent = <&cpuintc>;
57 interrupts = <2>;
58 };
59
60 memc@300 {
61 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
62 reg = <0x300 0x100>;
63 };
64
65 gpio0: gpio@600 {
66 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
67 reg = <0x600 0x34>;
68
69 gpio-controller;
70 #gpio-cells = <2>;
71
72 ralink,num-gpios = <24>;
73 ralink,register-map = [ 00 04 08 0c
74 20 24 28 2c
75 30 34 ];
76
77 status = "disabled";
78 };
79
80 gpio1: gpio@638 {
81 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
82 reg = <0x638 0x24>;
83
84 gpio-controller;
85 #gpio-cells = <2>;
86
87 ralink,num-gpios = <16>;
88 ralink,register-map = [ 00 04 08 0c
89 10 14 18 1c
90 20 24 ];
91
92 status = "disabled";
93 };
94
95 gpio2: gpio@660 {
96 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
97 reg = <0x660 0x24>;
98
99 gpio-controller;
100 #gpio-cells = <2>;
101
102 ralink,num-gpios = <12>;
103 ralink,register-map = [ 00 04 08 0c
104 10 14 18 1c
105 20 24 ];
106
107 status = "disabled";
108 };
109
110 spi@b00 {
111 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
112 reg = <0xb00 0x100>;
113 #address-cells = <1>;
114 #size-cells = <1>;
115
116 status = "disabled";
117 };
118
119 uartlite@c00 {
120 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
121 reg = <0xc00 0x100>;
122
123 interrupt-parent = <&intc>;
124 interrupts = <12>;
125
126 reg-shift = <2>;
127 };
128 };
129
130 ethernet@10100000 {
131 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
132 reg = <0x10100000 10000>;
133
134 interrupt-parent = <&cpuintc>;
135 interrupts = <5>;
136
137 status = "disabled";
138 };
139
140 esw@10110000 {
141 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
142 reg = <0x10110000 8000>;
143
144 interrupt-parent = <&intc>;
145 interrupts = <17>;
146
147 status = "disabled";
148 };
149
150 wmac@10180000 {
151 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
152 reg = <0x10180000 40000>;
153
154 interrupt-parent = <&cpuintc>;
155 interrupts = <6>;
156
157 ralink,eeprom = "soc_wmac.eeprom";
158
159 status = "disabled";
160 };
161
162 ehci@101c0000 {
163 compatible = "ralink,rt3352-ehci", "ehci-platform";
164 reg = <0x101c0000 0x1000>;
165
166 interrupt-parent = <&intc>;
167 interrupts = <18>;
168
169 status = "disabled";
170 };
171
172 ohci@101c1000 {
173 compatible = "ralink,rt3352-ohci", "ohci-platform";
174 reg = <0x101c1000 0x1000>;
175
176 interrupt-parent = <&intc>;
177 interrupts = <18>;
178
179 status = "disabled";
180 };
181 };