target/linux/ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch

   1 From 35d017947401d9f449a7e55e52506744e0c62577 Mon Sep 17 00:00:00 2001
   2 From: Mathias Kresin <dev@kresin.me>
   3 Date: Wed, 22 Aug 2018 22:38:06 +0200
   4 Subject: [PATCH] MIPS: ralink: Add rt3352 SPI_CS1 pinmux
   5
   6 The rt3352 has a pin that can be used as second spi chip select,
   7 watchdog reset or GPIO. The pinmux setup was missing the definition of
   8 said pin.
   9
  10 The pin is configured via the same bit on rt5350, so reuse the existing
  11 macro.
  12
  13 Signed-off-by: Mathias Kresin <dev@kresin.me>
  14 Signed-off-by: Paul Burton <paul.burton@mips.com>
  15 Patchwork: https://patchwork.linux-mips.org/patch/20301/
  16 Cc: John Crispin <john@phrozen.org>
  17 Cc: Ralf Baechle <ralf@linux-mips.org>
  18 Cc: James Hogan <jhogan@kernel.org>
  19 Cc: linux-mips@linux-mips.org
  20 Cc: linux-kernel@vger.kernel.org
  21 ---
  22  arch/mips/ralink/rt305x.c | 5 +++++
  23  1 file changed, 5 insertions(+)
  24
  25 --- a/arch/mips/ralink/rt305x.c
  26 +++ b/arch/mips/ralink/rt305x.c
  27 @@ -49,6 +49,10 @@ static struct rt2880_pmx_func rgmii_func
  28  static struct rt2880_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) };
  29  static struct rt2880_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) };
  30  static struct rt2880_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) };
  31 +static struct rt2880_pmx_func rt3352_cs1_func[] = {
  32 +       FUNC("spi_cs1", 0, 45, 1),
  33 +       FUNC("wdg_cs1", 1, 45, 1),
  34 +};
  35
  36  static struct rt2880_pmx_group rt3050_pinmux_data[] = {
  37         GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
  38 @@ -75,6 +79,7 @@ static struct rt2880_pmx_group rt3352_pi
  39         GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA),
  40         GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA),
  41         GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
  42 +       GRP("spi_cs1", rt3352_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
  43         { 0 }
  44  };
  45