target/linux/ramips/patches-4.14/999-fix-pci-init-mt7620.patch

   1 --- a/arch/mips/pci/pci-mt7620.c
   2 +++ b/arch/mips/pci/pci-mt7620.c
   3 @@ -35,6 +35,7 @@
   4  #define PPLL_CFG1                      0x9c
   5
   6  #define PPLL_DRV                       0xa0
   7 +#define PPLL_LD                        (1<<23)
   8  #define PDRV_SW_SET                    (1<<31)
   9  #define LC_CKDRVPD                     (1<<19)
  10  #define LC_CKDRVOHZ                    (1<<18)
  11 @@ -242,8 +243,8 @@ static int mt7620_pci_hw_init(struct pla
  12         rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1);
  13         mdelay(100);
  14
  15 -       if (!(rt_sysc_r32(PPLL_CFG1) & PDRV_SW_SET)) {
  16 -               dev_err(&pdev->dev, "MT7620 PPLL unlock\n");
  17 +       if (!(rt_sysc_r32(PPLL_CFG1) & PPLL_LD)) {
  18 +               dev_err(&pdev->dev, "MT7620 PPLL is unlocked, aborting init\n");
  19                 reset_control_assert(rstpcie0);
  20                 rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
  21                 return -1;