ramips: fix MikroTik 750Gr3 ports MAC addresses
[openwrt/staging/wigyori.git] / target / linux / ramips / patches-5.4 / 991-at803x.patch
1 From 60ae82b0ea56c279be384b99cd2a42ae5ba7c5c7 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
3 Date: Mon, 4 Nov 2019 22:22:17 +0100
4 Subject: [PATCH] net: phy: at803x: add support for SFP module in
5 RGMII-to-x-base mode
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Signed-off-by: René van Dorst <opensource@vdorst.com>
11 ---
12 drivers/net/phy/at803x.c | 74 ++++++++++++++++++++++++++++++++++++++++
13 1 file changed, 74 insertions(+)
14
15 diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
16 index 481cf48c9b9e4..a6536ecf15db4 100644
17 --- a/drivers/net/phy/at803x.c
18 +++ b/drivers/net/phy/at803x.c
19 @@ -19,6 +19,7 @@
20 #include <linux/etherdevice.h>
21 #include <linux/of_gpio.h>
22 #include <linux/gpio/consumer.h>
23 +#include <linux/sfp.h>
24
25 #define AT803X_SPECIFIC_STATUS 0x11
26 #define AT803X_SS_SPEED_MASK (3 << 14)
27 @@ -57,9 +58,18 @@
28
29 #define AT803X_MODE_CFG_MASK 0x0F
30 #define AT803X_MODE_CFG_SGMII 0x01
31 +#define AT803X_MODE_CFG_BX1000_RGMII_50 0x02
32 +#define AT803X_MODE_CFG_BX1000_RGMII_75 0x03
33 +#define AT803X_MODE_FIBER 0x01
34 +#define AT803X_MODE_COPPER 0x00
35
36 #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
37 #define AT803X_PSSR_MR_AN_COMPLETE 0x0200
38 +#define PSSR_LINK BIT(10)
39 +#define PSSR_SYNC_STATUS BIT(8)
40 +#define PSSR_DUPLEX BIT(13)
41 +#define PSSR_SPEED_1000 BIT(15)
42 +#define PSSR_SPEED_100 BIT(14)
43
44 #define AT803X_DEBUG_REG_0 0x00
45 #define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15)
46 @@ -475,10 +485,56 @@ static int at803x_parse_dt(struct phy_device *phydev)
47 return 0;
48 }
49
50 +static int at803x_mode(struct phy_device *phydev)
51 +{
52 + int mode;
53 +
54 + mode = phy_read(phydev, AT803X_REG_CHIP_CONFIG) & AT803X_MODE_CFG_MASK;
55 +
56 + if (mode == AT803X_MODE_CFG_BX1000_RGMII_50 ||
57 + mode == AT803X_MODE_CFG_BX1000_RGMII_75)
58 + return AT803X_MODE_FIBER;
59 + return AT803X_MODE_COPPER;
60 +}
61 +
62 +static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
63 +{
64 + struct phy_device *phydev = upstream;
65 + __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
66 + phy_interface_t iface;
67 +
68 + sfp_parse_support(phydev->sfp_bus, id, support);
69 + iface = sfp_select_interface(phydev->sfp_bus, support);
70 +
71 + if (iface != PHY_INTERFACE_MODE_SGMII &&
72 + iface != PHY_INTERFACE_MODE_1000BASEX) {
73 + dev_info(&phydev->mdio.dev, "incompatible SFP module inserted;"
74 + "Only SGMII/1000BASEX are supported!\n");
75 + return -EINVAL;
76 + }
77 +
78 + dev_info(&phydev->mdio.dev, "SFP interface %s", phy_modes(iface));
79 +
80 + return 0;
81 +}
82 +
83 +static const struct sfp_upstream_ops at803x_sfp_ops = {
84 + .attach = phy_sfp_attach,
85 + .detach = phy_sfp_detach,
86 + .module_insert = at803x_sfp_insert,
87 +};
88 +
89 static int at803x_probe(struct phy_device *phydev)
90 {
91 struct device *dev = &phydev->mdio.dev;
92 struct at803x_priv *priv;
93 + int ret;
94 +
95 + if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
96 + ret = phy_sfp_probe(phydev, &at803x_sfp_ops);
97 + if (ret < 0)
98 + return ret;
99 + }
100
101 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
102 if (!priv)
103 @@ -658,6 +714,10 @@ static int at803x_read_status(struct phy_device *phydev)
104 {
105 int ss, err, old_link = phydev->link;
106
107 + /* Handle (Fiber) SGMII to RGMII mode */
108 + if (at803x_mode(phydev) == AT803X_MODE_FIBER)
109 + return genphy_c37_read_status(phydev);
110 +
111 /* Update the link, but return if there was an error */
112 err = genphy_update_link(phydev);
113 if (err)
114 @@ -712,6 +772,19 @@ static int at803x_read_status(struct phy_device *phydev)
115 return 0;
116 }
117
118 +static int at803x_config_aneg(struct phy_device *phydev)
119 +{
120 + /* Handle (Fiber) SerDes to RGMII mode */
121 + if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
122 + pr_warn("%s: fiber\n", __func__);
123 + return genphy_c37_config_aneg(phydev);
124 + }
125 +
126 + pr_warn("%s: enter\n", __func__);
127 +
128 + return genphy_config_aneg(phydev);
129 +}
130 +
131 static struct phy_driver at803x_driver[] = {
132 {
133 /* Qualcomm Atheros AR8035 */
134 @@ -758,6 +831,7 @@ static struct phy_driver at803x_driver[] = {
135 .suspend = at803x_suspend,
136 .resume = at803x_resume,
137 /* PHY_GBIT_FEATURES */
138 + .config_aneg = at803x_config_aneg,
139 .read_status = at803x_read_status,
140 .aneg_done = at803x_aneg_done,
141 .ack_interrupt = &at803x_ack_interrupt,