// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include #include "ath79.dtsi" / { compatible = "qca,ar9340"; #address-cells = <1>; #size-cells = <1>; chosen { bootargs = "console=ttyS0,115200"; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "mips,mips74Kc"; clocks = <&pll ATH79_CLK_CPU>; reg = <0>; }; }; clocks { #address-cells = <1>; #size-cells = <1>; ranges; ref: ref { #clock-cells = <0>; compatible = "fixed-clock"; clock-output-names = "ref"; }; }; ahb: ahb { compatible = "simple-bus"; ranges; #address-cells = <1>; #size-cells = <1>; apb: apb { compatible = "simple-bus"; ranges; #address-cells = <1>; #size-cells = <1>; ddr_ctrl: memory-controller@18000000 { compatible = "qca,ar9340-ddr-controller", "qca,ar7240-ddr-controller"; reg = <0x18000000 0x12c>; #qca,ddr-wb-channel-cells = <1>; }; uart: uart@18020000 { compatible = "ns16550a"; reg = <0x18020000 0x2c>; interrupts = <3>; clocks = <&pll ATH79_CLK_REF>; clock-names = "uart"; reg-io-width = <4>; reg-shift = <2>; no-loopback-test; status = "disabled"; }; gpio: gpio@18040000 { compatible = "qca,ar9340-gpio"; reg = <0x18040000 0x2c>; interrupts = <2>; ngpios = <23>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; pinmux: pinmux@1804002c { compatible = "pinctrl-single"; reg = <0x1804002c 0x44>; #size-cells = <0>; pinctrl-single,bit-per-mux; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x1>; #pinctrl-cells = <2>; jtag_disable_pins: pinmux_jtag_disable_pins { pinctrl-single,bits = <0x40 0x2 0x2>; }; }; pll: pll-controller@18050000 { compatible = "qca,ar9340-pll", "syscon"; reg = <0x18050000 0x4c>; #clock-cells = <1>; clocks = <&ref>; clock-names = "ref"; clock-output-names = "cpu", "ddr", "ahb"; }; wdt: wdt@18060008 { compatible = "qca,ar9340-wdt", "qca,ar7130-wdt"; reg = <0x18060008 0x8>; interrupts = <4>; clocks = <&pll ATH79_CLK_AHB>; clock-names = "wdt"; }; rst: reset-controller@1806001c { compatible = "qca,ar9340-reset", "qca,ar7100-reset"; reg = <0x1806001c 0x4>; #reset-cells = <1>; }; hs_uart: uart@18500000 { compatible = "qca,ar9330-uart"; reg = <0x18500000 0x14>; interrupts = <6>; interrupt-parent = <&miscintc>; clocks = <&pll ATH79_CLK_UART1>; clock-names = "uart"; status = "disabled"; }; }; nand: nand@1b000200 { compatible = "qca,ar934x-nand"; reg = <0x1b000200 0xb8>; interrupts = <21>; interrupt-parent = <&miscintc>; resets = <&rst 14>; reset-names = "nand"; nand-ecc-mode = "hw"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; gmac: gmac@18070000 { compatible = "qca,ar9340-gmac"; reg = <0x18070000 0x14>; }; wmac: wmac@18100000 { compatible = "qca,ar9340-wmac"; reg = <0x18100000 0x20000>; status = "disabled"; }; usb: usb@1b000000 { compatible = "generic-ehci"; reg = <0x1b000000 0x1d8>; interrupts = <3>; resets = <&rst 5>; reset-names = "usb-host"; has-transaction-translator; caps-offset = <0x100>; phy-names = "usb-phy"; phys = <&usb_phy>; status = "disabled"; }; spi: spi@1f000000 { compatible = "qca,ar934x-spi"; reg = <0x1f000000 0x1c>; clocks = <&pll ATH79_CLK_AHB>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; }; usb_phy: usb-phy { compatible = "qca,ar9340-usb-phy", "qca,ar7200-usb-phy"; reset-names = "usb-phy-analog", "usb-phy", "usb-suspend-override"; resets = <&rst 11>, <&rst 4>, <&rst 3>; #phy-cells = <0>; status = "disabled"; }; }; &mdio0 { compatible = "qca,ar9340-mdio"; }; ð0 { compatible = "qca,ar9340-eth", "syscon"; pll-data = <0x16000000 0x00000101 0x00001616>; pll-reg = <0x4 0x2c 17>; pll-handle = <&pll>; resets = <&rst 9>, <&rst 22>; reset-names = "mac", "mdio"; clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>; clock-names = "eth", "mdio"; }; &mdio1 { status = "okay"; compatible = "qca,ar9340-mdio"; resets = <&rst 23>; reset-names = "mdio"; builtin-switch; builtin_switch: switch0@1f { compatible = "qca,ar8229"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; phy-mode = "gmii"; qca,mib-poll-interval = <500>; qca,phy4-mii-enable; mdio-bus { #address-cells = <1>; #size-cells = <0>; swphy0: ethernet-phy@0 { reg = <0>; phy-mode = "mii"; }; swphy4: ethernet-phy@4 { reg = <4>; phy-mode = "mii"; }; }; }; }; ð1 { compatible = "qca,ar9340-eth", "syscon"; resets = <&rst 13>, <&rst 23>; reset-names = "mac", "mdio"; clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>; clock-names = "eth", "mdio"; phy-mode = "gmii"; fixed-link { speed = <1000>; full-duplex; }; };