// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "mt7620a.dtsi" #include #include / { compatible = "ralink,mt7620a-soc"; aliases { led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; led-upgrade = &led_power; }; chosen { bootargs = "console=ttyS0,57600"; }; keys { compatible = "gpio-keys"; reset_wps { label = "reset_wps"; gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; linux,code = ; }; switch_high { label = "switch high"; gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; linux,code = ; linux,input-type = ; }; switch_off { label = "switch off"; gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; linux,code = ; linux,input-type = ; }; }; }; &gpio1 { status = "okay"; }; &gpio2 { status = "okay"; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; factory: partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; }; partition@50000 { label = "cimage"; reg = <0x50000 0x20000>; read-only; }; partition@70000 { compatible = "edimax,uimage"; label = "firmware"; reg = <0x00070000 0x00790000>; }; }; }; }; &state_default { gpio { ralink,group = "i2c", "uartf", "nd_sd", "rgmii2"; ralink,function = "gpio"; }; }; &pinctrl { phy_reset_pins: phy-reset { gpio { ralink,group = "spi refclk"; ralink,function = "gpio"; }; }; }; ðernet { status = "okay"; mtd-mac-address = <&factory 0x4>; pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins &mdio_pins &phy_reset_pins>; mediatek,mdio-mode = <1>; phy-reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; phy-reset-duration = <30>; port@5 { status = "okay"; mediatek,fixed-link = <1000 1 1 1>; phy-mode = "rgmii"; }; mdio-bus { status = "okay"; phy0: ethernet-phy@0 { status = "disabled"; reg = <0>; phy-mode = "rgmii"; }; phy1: ethernet-phy@1 { status = "disabled"; reg = <1>; phy-mode = "rgmii"; }; phy2: ethernet-phy@2 { status = "disabled"; reg = <2>; phy-mode = "rgmii"; }; phy3: ethernet-phy@3 { status = "disabled"; reg = <3>; phy-mode = "rgmii"; }; phy4: ethernet-phy@4 { status = "disabled"; reg = <4>; phy-mode = "rgmii"; }; }; }; &gsw { mediatek,port5 = "gmac"; }; &wmac { ralink,mtd-eeprom = <&factory 0>; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x8000>; mediatek,2ghz = <0>; }; };