#include <linux/platform_device.h>
#include <linux/serial_8250.h>
-#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/platform.h>
/*
* OHCI (USB full speed host controller)
*/
-static struct resource ar71xx_usb_ohci_resources[] = {
+static struct resource ar71xx_ohci_resources[] = {
[0] = {
.start = AR71XX_OHCI_BASE,
.end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
};
static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
-static struct platform_device ar71xx_usb_ohci_device = {
+static struct platform_device ar71xx_ohci_device = {
.name = "ar71xx-ohci",
.id = -1,
- .resource = ar71xx_usb_ohci_resources,
- .num_resources = ARRAY_SIZE(ar71xx_usb_ohci_resources),
+ .resource = ar71xx_ohci_resources,
+ .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
.dev = {
.dma_mask = &ar71xx_ohci_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
/*
* EHCI (USB full speed host controller)
*/
-static struct resource ar71xx_usb_ehci_resources[] = {
+static struct resource ar71xx_ehci_resources[] = {
[0] = {
.start = AR71XX_EHCI_BASE,
.end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
},
};
+
static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
-static struct platform_device ar71xx_usb_ehci_device = {
+static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
+
+static struct platform_device ar71xx_ehci_device = {
.name = "ar71xx-ehci",
.id = -1,
- .resource = ar71xx_usb_ehci_resources,
- .num_resources = ARRAY_SIZE(ar71xx_usb_ehci_resources),
+ .resource = ar71xx_ehci_resources,
+ .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
.dev = {
.dma_mask = &ar71xx_ehci_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &ar71xx_ehci_data,
},
};
(RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
| RESET_MODULE_USB_OHCI_DLL)
-void __init ar71xx_add_device_usb(void)
+static void ar71xx_usb_setup(void)
{
ar71xx_device_stop(AR71XX_USB_RESET_MASK);
mdelay(1000);
ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
mdelay(900);
+}
+
+static void ar91xx_usb_setup(void)
+{
+ ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
+ mdelay(10);
+
+ ar71xx_device_start(RESET_MODULE_USB_HOST);
+ mdelay(10);
- platform_device_register(&ar71xx_usb_ohci_device);
- platform_device_register(&ar71xx_usb_ehci_device);
+ ar71xx_device_start(RESET_MODULE_USB_PHY);
+ mdelay(10);
}
-#ifdef CONFIG_AR71XX_EARLY_SERIAL
-static void __init ar71xx_add_device_uart(void) {};
-#else
+void __init ar71xx_add_device_usb(void)
+{
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ case AR71XX_SOC_AR7141:
+ case AR71XX_SOC_AR7161:
+ ar71xx_usb_setup();
+ platform_device_register(&ar71xx_ohci_device);
+ platform_device_register(&ar71xx_ehci_device);
+ break;
+
+ case AR71XX_SOC_AR9130:
+ case AR71XX_SOC_AR9132:
+ ar91xx_usb_setup();
+ ar71xx_ehci_data.is_ar91xx = 1;
+ platform_device_register(&ar71xx_ehci_device);
+ break;
+
+ default:
+ BUG();
+ }
+}
+
+#ifndef CONFIG_AR71XX_EARLY_SERIAL
static struct resource ar71xx_uart_resources[] = {
{
.start = AR71XX_UART_BASE,
},
};
-static void __init ar71xx_add_device_uart(void)
+void __init ar71xx_add_device_uart(void)
{
ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
platform_device_register(&ar71xx_uart_device);
platform_device_register(&ar71xx_mdio_device);
}
+static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
+{
+ void __iomem *base;
+ u32 t;
+
+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
+
+ t = __raw_readl(base + cfg_reg);
+ t &= ~(3 << shift);
+ t |= (2 << shift);
+ __raw_writel(t, base + cfg_reg);
+ udelay(100);
+
+ __raw_writel(pll_val, base + pll_reg);
+
+ t |= (3 << shift);
+ __raw_writel(t, base + cfg_reg);
+ udelay(100);
+
+ t &= ~(3 << shift);
+ __raw_writel(t, base + cfg_reg);
+ udelay(100);
+
+ printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
+ (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
+
+ iounmap(base);
+}
+
+static void ar71xx_set_pll_ge0(u32 val)
+{
+ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
+ val, AR71XX_ETH0_PLL_SHIFT);
+}
+
+static void ar71xx_set_pll_ge1(u32 val)
+{
+ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
+ val, AR71XX_ETH1_PLL_SHIFT);
+}
+
+static void ar91xx_set_pll_ge0(u32 val)
+{
+ ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
+ val, AR91XX_ETH0_PLL_SHIFT);
+}
+
+static void ar91xx_set_pll_ge1(u32 val)
+{
+ ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
+ val, AR91XX_ETH1_PLL_SHIFT);
+}
+
+static void ar71xx_ddr_flush_ge0(void)
+{
+ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
+}
+
+static void ar71xx_ddr_flush_ge1(void)
+{
+ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
+}
+
+static void ar91xx_ddr_flush_ge0(void)
+{
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
+}
+
+static void ar91xx_ddr_flush_ge1(void)
+{
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
+}
+
static struct resource ar71xx_eth0_resources[] = {
{
.name = "mac_base",
struct ag71xx_platform_data ar71xx_eth0_data = {
.reset_bit = RESET_MODULE_GE0_MAC,
- .flush_reg = DDR_REG_FLUSH_GE0,
};
static struct platform_device ar71xx_eth0_device = {
struct ag71xx_platform_data ar71xx_eth1_data = {
.reset_bit = RESET_MODULE_GE1_MAC,
- .flush_reg = DDR_REG_FLUSH_GE1,
};
static struct platform_device ar71xx_eth1_device = {
pdata = pdev->dev.platform_data;
switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
+ : ar71xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar71xx_set_pll_ge1
+ : ar71xx_set_pll_ge0;
+ break;
+
case AR71XX_SOC_AR7141:
case AR71XX_SOC_AR7161:
- case AR71XX_SOC_AR9132:
+ pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
+ : ar71xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar71xx_set_pll_ge1
+ : ar71xx_set_pll_ge0;
pdata->has_gbit = 1;
break;
- case AR71XX_SOC_AR7130:
case AR71XX_SOC_AR9130:
+ pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
+ : ar91xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar91xx_set_pll_ge1
+ : ar91xx_set_pll_ge0;
+ pdata->is_ar91xx = 1;
+ break;
+
+ case AR71XX_SOC_AR9132:
+ pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
+ : ar91xx_ddr_flush_ge0;
+ pdata->set_pll = id ? ar91xx_set_pll_ge1
+ : ar91xx_set_pll_ge0;
+ pdata->is_ar91xx = 1;
+ pdata->has_gbit = 1;
break;
default:
case PHY_INTERFACE_MODE_GMII:
case PHY_INTERFACE_MODE_RGMII:
if (!pdata->has_gbit) {
- printk(KERN_ERR "ar71xx: no gigabit available on eth%d\n",
+ printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
id);
return;
}
struct spi_board_info const *info,
unsigned n)
{
- ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
-
spi_register_board_info(info, n);
ar71xx_spi_device.dev.platform_data = pdata;
platform_device_register(&ar71xx_spi_device);
printk(KERN_DEBUG "ar71xx: failed to parse mac address "
"\"%s\"\n", mac_str);
}
-
-static int __init ar71xx_machine_setup(void)
-{
- ar71xx_gpio_init();
-
- ar71xx_add_device_uart();
- ar71xx_add_device_wdt();
-
- mips_machine_setup();
- return 0;
-}
-
-arch_initcall(ar71xx_machine_setup);
projects / openwrt / staging / wigyori.git / blobdiff