#include "mt7620a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
/ {
- compatible = "ralink,mt7620a-soc";
+ compatible = "tplink,c20i", "ralink,mt7620a-soc";
model = "TP-Link Archer C20i";
chosen {
bootargs = "console=ttyS0,115200";
};
- gpio-leds {
+ leds {
compatible = "gpio-leds";
+ lan {
+ label = "c20i:blue:lan";
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ };
+ usb {
+ label = "c20i:blue:usb";
+ gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ohci_port1>, <&ehci_port1>;
+ linux,default-trigger = "usbport";
+ };
+ wps {
+ label = "c20i:blue:wps";
+ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+ };
+ wan {
+ label = "c20i:blue:wan";
+ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ };
+ wlan {
+ label = "c20i:blue:wlan";
+ gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ };
};
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
+ keys {
+ compatible = "gpio-keys";
+
+ rfkill {
+ label = "rfkill";
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RFKILL>;
+ };
+ reset_wps {
+ label = "reset_wps";
+ gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
};
};
+&gpio1 {
+ status = "okay";
+};
+
&gpio2 {
status = "okay";
};
+&gpio3 {
+ status = "okay";
+};
+
&spi0 {
status = "okay";
m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "jedec,spi-nor";
- reg = <0 0>;
- linux,modalias = "m25p80", "mx25l6405d";
+ reg = <0>;
spi-max-frequency = <10000000>;
- partition@0 {
- label = "u-boot";
- reg = <0x0 0x20000>;
- read-only;
- };
-
- partition@20000 {
- label = "firmware";
- reg = <0x20000 0x7a0000>;
- };
-
- partition@7c0000 {
- label = "config";
- reg = <0x7c0000 0x10000>;
- };
-
- rom: partition@7d0000 {
- label = "rom";
- reg = <0x7d0000 0x10000>;
- };
-
- partition@7e0000 {
- label = "romfile";
- reg = <0x7e0000 0x10000>;
- };
-
- radio: partition@7f0000 {
- label = "radio";
- reg = <0x7f0000 0x10000>;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x20000>;
+ read-only;
+ };
+
+ partition@20000 {
+ compatible = "tplink,firmware";
+ label = "firmware";
+ reg = <0x20000 0x7a0000>;
+ };
+
+ partition@7c0000 {
+ label = "config";
+ reg = <0x7c0000 0x10000>;
+ };
+
+ rom: partition@7d0000 {
+ label = "rom";
+ reg = <0x7d0000 0x10000>;
+ };
+
+ partition@7e0000 {
+ label = "romfile";
+ reg = <0x7e0000 0x10000>;
+ };
+
+ radio: partition@7f0000 {
+ label = "radio";
+ reg = <0x7f0000 0x10000>;
+ };
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
- ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
+ ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
ralink,function = "gpio";
};
};
ðernet {
pinctrl-names = "default";
- pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&rom 0xf100>;
mediatek,portmap = "wllll";
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 32768>;
- mediatek,2ghz = <0>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 32768>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};