ramips: dts: Unify naming of gpio-led nodes

[openwrt/staging/wigyori.git] / target / linux / ramips / dts / Newifi-D1.dts

diff --git a/target/linux/ramips/dts/Newifi-D1.dts b/target/linux/ramips/dts/Newifi-D1.dts
index 4659f85278f764559b59e902ff7fd670a3b270b4..2c180585c92700cba48ada2e173be5e4990318fb 100644 (file)
--- a/target/linux/ramips/dts/Newifi-D1.dts
+++ b/target/linux/ramips/dts/Newifi-D1.dts
@@ -9,6 +9,13 @@
        compatible = "lenovo,newifi-d1", "mediatek,mt7621-soc";
        model = "Newifi-D1";
 
+       aliases {
+               led-boot = &led_blue;
+               led-failsafe = &led_blue;
+               led-running = &led_blue;
+               led-upgrade = &led_blue;
+       };
+
        memory@0 {
                device_type = "memory";
                reg = <0x0 0x10000000>;
@@ -18,7 +25,7 @@
                bootargs = "console=ttyS0,115200";
        };
 
-       gpio-leds {
+       leds {
                compatible = "gpio-leds";
 
                status-red {
@@ -31,16 +38,15 @@
                        gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
                };
 
-               statys-blue {
+               led_blue: status-blue {
                        label = "newifi-d1:blue:status";
                        gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+                       default-state = "on";
                };
        };
 
-       gpio-keys-polled {
+       keys {
                compatible = "gpio-keys-polled";
-               #address-cells = <1>;
-               #size-cells = <0>;
                poll-interval = <20>;
 
                reset {
@@ -70,61 +76,65 @@
 
 &sdhci {
        status = "okay";
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&sdhci_pins>;
 };
 
 &spi0 {
        status = "okay";
 
        m25p80@0 {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               compatible = "jedec,spi-nor";
+               compatible = "mx25l25635f", "jedec,spi-nor";
                reg = <0>;
-               spi-max-frequency = <10000000>;
-               m25p,chunked-io = <32>;
-
-               partition@0 {
-                       label = "u-boot";
-                       reg = <0x0 0x30000>;
-                       read-only;
-               };
-
-               partition@30000 {
-                       label = "u-boot-env";
-                       reg = <0x30000 0x10000>;
-                       read-only;
-               };
-
-               factory: partition@40000 {
-                       label = "factory";
-                       reg = <0x40000 0x10000>;
-                       read-only;
-               };
-
-               partition@50000 {
-                       label = "firmware";
-                       reg = <0x50000 0x2000000>;
+               spi-max-frequency = <25000000>;
+               m25p,fast-read;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x30000>;
+                               read-only;
+                       };
+
+                       partition@30000 {
+                               label = "u-boot-env";
+                               reg = <0x30000 0x10000>;
+                               read-only;
+                       };
+
+                       factory: partition@40000 {
+                               label = "factory";
+                               reg = <0x40000 0x10000>;
+                               read-only;
+                       };
+
+                       partition@50000 {
+                               compatible = "denx,uimage";
+                               label = "firmware";
+                               reg = <0x50000 0x1fb0000>;
+                       };
                };
        };
 };
 
 &pcie {
        status = "okay";
+};
 
-       pcie0 {
-               mt76@0,0 {
-                       mediatek,mtd-eeprom = <&factory 0x8000>;
-                       ieee80211-freq-limit = <5000000 6000000>;
-               };
+&pcie0 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x8000>;
+               ieee80211-freq-limit = <5000000 6000000>;
        };
+};
 
-       pcie1 {
-               mt76@1,0 {
-                       mediatek,mtd-eeprom = <&factory 0x0000>;
-               };
+&pcie1 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x0000>;
        };
 };