ramips: fix dtc warnings

[openwrt/staging/wigyori.git] / target / linux / ramips / dts / PSG1208.dts

diff --git a/target/linux/ramips/dts/PSG1208.dts b/target/linux/ramips/dts/PSG1208.dts
index 547da2fdfa7353d4e4874aa343a57e0be2a62ff7..16c60371fe10aa3bfc3483b2058b7044395ff7f7 100644 (file)
--- a/target/linux/ramips/dts/PSG1208.dts
+++ b/target/linux/ramips/dts/PSG1208.dts
@@ -2,35 +2,38 @@
 
 #include "mt7620a.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
-       compatible = "PSG1208", "ralink,mt7620a-soc";
+       compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
        model = "Phicomm PSG1208";
 
+       aliases {
+               led-status = &led_wps;
+       };
+
        gpio-leds {
                compatible = "gpio-leds";
 
-               wan {
+               led_wps: wps {
                        label = "psg1208:white:wps";
-                       gpios = <&gpio1 15 1>;
+                       gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
                };
 
                wlan {
                        label = "psg1208:white:wlan2g";
-                       gpios = <&gpio3 0 1>;
+                       gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
                };
        };
 
        gpio-keys-polled {
                compatible = "gpio-keys-polled";
-               #address-cells = <1>;
-               #size-cells = <0>;
                poll-interval = <20>;
 
                reset {
                        label = "reset";
-                       gpios = <&gpio0 1 1>;
+                       gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_RESTART>;
                };
        };
@@ -82,7 +85,7 @@
 &pinctrl {
        state_default: pinctrl0 {
                gpio {
-                       ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
+                       ralink,group = "i2c", "spi refclk", "wled";
                        ralink,function = "gpio";
                };
        };
@@ -97,14 +100,13 @@
 
 &pcie {
        status = "okay";
+};
 
-       pcie-bridge {
-               mt76@0,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x8000>;
-                       ieee80211-freq-limit = <5000000 6000000>;
-               };
+&pcie0 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x8000>;
+               ieee80211-freq-limit = <5000000 6000000>;
        };
 };