ramips: fix dtc warnings

[openwrt/staging/wigyori.git] / target / linux / ramips / dts / SAP-G3200U3.dts

diff --git a/target/linux/ramips/dts/SAP-G3200U3.dts b/target/linux/ramips/dts/SAP-G3200U3.dts
index dbaa6a31cf095a7a11965509c72bed4e96c4dfd2..1e829e5857497dca58a6a9f8ad6b6c8e0abc521f 100644 (file)
--- a/target/linux/ramips/dts/SAP-G3200U3.dts
+++ b/target/linux/ramips/dts/SAP-G3200U3.dts
@@ -2,11 +2,17 @@
 
 #include "mt7621.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
+       compatible = "storylink,sap-g3200u3", "mediatek,mt7621-soc";
        model = "STORYLiNK SAP-G3200U3";
 
+       aliases {
+               led-status = &led_usb;
+       };
+
        memory@0 {
                device_type = "memory";
                reg = <0x0 0x8000000>;
@@ -19,27 +25,25 @@
        gpio-leds {
                compatible = "gpio-leds";
 
-               usb {
+               led_usb: usb {
                        label = "sap-g3200u3:green:usb";
-                       gpios = <&gpio0 13 1>;
+                       gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
                };
        };
 
        gpio-keys-polled {
                compatible = "gpio-keys-polled";
-               #address-cells = <1>;
-               #size-cells = <0>;
                poll-interval = <20>;
 
                reset {
                        label = "reset";
-                       gpios = <&gpio0 16 1>;
+                       gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_RESTART>;
                };
 
                rfkill {
                        label = "rfkill";
-                       gpios = <&gpio0 14 1>;
+                       gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_RFKILL>;
                };
        };
@@ -89,23 +93,21 @@
 
 &pcie {
        status = "okay";
+};
 
-       pcie0 {
-               mt76@0,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x8000>;
-                       ieee80211-freq-limit = <5000000 6000000>;
-               };
+&pcie0 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x8000>;
+               ieee80211-freq-limit = <5000000 6000000>;
        };
+};
 
-       pcie1 {
-               mt76@1,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x0000>;
-                       ieee80211-freq-limit = <2400000 2500000>;
-               };
+&pcie1 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x0000>;
+               ieee80211-freq-limit = <2400000 2500000>;
        };
 };