ramips: move compatible for Ubiquiti Edgerouter X to DTS file

[openwrt/staging/wigyori.git] / target / linux / ramips / dts / mt7620a.dtsi

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 96966b464706edb963bff00e6365b7d643183493..150c0e14ca2d1c3f4bf8f5f2c995da70223a5bcb 100644 (file)
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -1,11 +1,15 @@
 / {
        #address-cells = <1>;
        #size-cells = <1>;
-       compatible = "ralink,mtk7620a-soc";
+       compatible = "ralink,mt7620a-soc";
 
        cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
                cpu@0 {
                        compatible = "mips,mips24KEc";
+                       reg = <0>;
                };
        };
 
@@ -13,7 +17,7 @@
                bootargs = "console=ttyS0,57600";
        };
 
-       cpuintc: cpuintc@0 {
+       cpuintc: cpuintc {
                #address-cells = <0>;
                #interrupt-cells = <1>;
                interrupt-controller;
@@ -35,7 +39,7 @@
                #size-cells = <1>;
 
                sysc: sysc@0 {
-                       compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
+                       compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
                        reg = <0x0 0x100>;
                };
 
@@ -112,7 +116,7 @@
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <0>;
-                       ralink,num-gpios = <24>;
+                       ralink,nr-gpio = <24>;
                        ralink,register-map = [ 00 04 08 0c
                                                20 24 28 2c
                                                30 34 ];
@@ -129,7 +133,7 @@
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <24>;
-                       ralink,num-gpios = <16>;
+                       ralink,nr-gpio = <16>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
@@ -148,7 +152,7 @@
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <40>;
-                       ralink,num-gpios = <32>;
+                       ralink,nr-gpio = <32>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
@@ -167,7 +171,7 @@
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <72>;
-                       ralink,num-gpios = <1>;
+                       ralink,nr-gpio = <1>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
@@ -330,8 +334,8 @@
                        };
                };
 
-               spi_pins: spi {
-                       spi {
+               spi_pins: spi_pins {
+                       spi_pins {
                                ralink,group = "spi";
                                ralink,function = "spi";
                        };
@@ -339,13 +343,13 @@
 
                spi_cs1: spi1 {
                        spi1 {
-                               ralink,group = "spi_cs1";
-                               ralink,function = "spi_cs1";
+                               ralink,group = "spi refclk";
+                               ralink,function = "spi refclk";
                        };
                };
 
-               i2c_pins: i2c {
-                       i2c {
+               i2c_pins: i2c_pins {
+                       i2c_pins {
                                ralink,group = "i2c";
                                ralink,function = "i2c";
                        };
@@ -365,6 +369,13 @@
                        };
                };
 
+               mdio_refclk_pins: mdio_refclk {
+                       mdio_refclk {
+                               ralink,group = "mdio";
+                               ralink,function = "refclk";
+                       };
+               };
+
                ephy_pins: ephy {
                        ephy {
                                ralink,group = "ephy";
@@ -399,6 +410,20 @@
                                ralink,function = "pcie rst";
                        };
                };
+
+               pa_pins: pa {
+                       pa {
+                               ralink,group = "pa";
+                               ralink,function = "pa";
+                       };
+               };
+
+               sdhci_pins: sdhci {
+                       sdhci {
+                               ralink,group = "nd_sd";
+                               ralink,function = "sd";
+                       };
+               };
        };
 
        rstctrl: rstctrl {
@@ -413,8 +438,9 @@
 
        usbphy: usbphy {
                compatible = "mediatek,mt7620-usbphy";
-               #phy-cells = <1>;
+               #phy-cells = <0>;
 
+               ralink,sysctl = <&sysc>;
                resets = <&rstctrl 22 &rstctrl 25>;
                reset-names = "host", "device";
 
@@ -477,33 +503,50 @@
                interrupt-parent = <&intc>;
                interrupts = <14>;
 
+               pinctrl-names = "default";
+               pinctrl-0 = <&sdhci_pins>;
+
                status = "disabled";
        };
 
        ehci: ehci@101c0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
                compatible = "generic-ehci";
                reg = <0x101c0000 0x1000>;
 
                interrupt-parent = <&intc>;
                interrupts = <18>;
 
-               phys = <&usbphy 1>;
+               phys = <&usbphy>;
                phy-names = "usb";
 
                status = "disabled";
+
+               ehci_port1: port@1 {
+                       reg = <1>;
+                       #trigger-source-cells = <0>;
+               };
        };
 
        ohci: ohci@101c1000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
                compatible = "generic-ohci";
                reg = <0x101c1000 0x1000>;
 
                interrupt-parent = <&intc>;
                interrupts = <18>;
 
-               phys = <&usbphy 1>;
+               phys = <&usbphy>;
                phy-names = "usb";
 
                status = "disabled";
+
+               ohci_port1: port@1 {
+                       reg = <1>;
+                       #trigger-source-cells = <0>;
+               };
        };
 
        pcie: pcie@10140000 {
@@ -536,13 +579,15 @@
 
                status = "disabled";
 
-               pcie-bridge {
+               pcie0: pcie@0,0 {
                        reg = <0x0000 0 0 0 0>;
 
                        #address-cells = <3>;
                        #size-cells = <2>;
 
                        device_type = "pci";
+
+                       ranges;
                };
        };