X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fwigyori.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2FDIR-860L-B1.dts;h=40b12709fe46cf414109ea87671c330c7ac4de78;hp=b6336d87d355aa4d097f162324263fa3c44c8219;hb=dd3ec40d3d07f9fb419936b27f386217a0c68fb0;hpb=021c8936584ded4feee82939f05098c6894f4c50

diff --git a/target/linux/ramips/dts/DIR-860L-B1.dts b/target/linux/ramips/dts/DIR-860L-B1.dts
index b6336d87d3..40b12709fe 100644
--- a/target/linux/ramips/dts/DIR-860L-B1.dts
+++ b/target/linux/ramips/dts/DIR-860L-B1.dts
@@ -2,10 +2,20 @@
 
 #include "mt7621.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
 / {
-	compatible = "ralink,mt7621-eval-board", "ralink,mt7621-soc";
+	compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
 	model = "D-Link DIR-860L B1";
 
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
 	memory@0 {
 		device_type = "memory";
 		reg = <0x0 0x8000000>;
@@ -15,35 +25,45 @@
 		bootargs = "console=ttyS0,57600";
 	};
 
-	gpio-leds {
+	leds {
 		compatible = "gpio-leds";
 
 		power {
 			label = "dir-860l-b1:orange:power";
-			gpios = <&gpio0 13 1>;
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
 
-		power2 {
+		led_power_green: power2 {
 			label = "dir-860l-b1:green:power";
-			gpios = <&gpio0 15 1>;
+			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
 		};
 
 		net {
 			label = "dir-860l-b1:orange:net";
-			gpios = <&gpio0 14 1>;
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 		};
 
 		net2 {
 			label = "dir-860l-b1:green:net";
-			gpios = <&gpio0 16 1>;
+			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
 		};
 	};
 
-	gpio-keys-polled {
+	keys {
 		compatible = "gpio-keys-polled";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
 	};
 };
 
@@ -51,69 +71,72 @@
 	status = "okay";
 
 	m25p80@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		linux,modalias = "m25p80";
 		spi-max-frequency = <10000000>;
-
-		partition@0 {
-			label = "u-boot";
-			reg = <0x0 0x30000>;
-			read-only;
-		};
-
-		partition@30000 {
-			label = "u-boot-env";
-			reg = <0x30000 0x4000>;
-			read-only;
-		};
-
-		radio: partition@34000 {
-			label = "radio";
-			reg = <0x34000 0x4000>;
-			read-only;
-		};
-
-		factory: partition@38000 {
-			label = "factory";
-			reg = <0x38000 0x8000>;
-			read-only;
-		};
-
-		partition@40000 {
-			label = "defaults";
-			reg = <0x40000 0x10000>;
-			read-only;
-		};
-
-		partition@50000 {
-			label = "firmware";
-			reg = <0x50000 0xfb0000>;
+		m25p,chunked-io = <32>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x4000>;
+				read-only;
+			};
+
+			radio: partition@34000 {
+				label = "radio";
+				reg = <0x34000 0x4000>;
+				read-only;
+			};
+
+			factory: partition@38000 {
+				label = "factory";
+				reg = <0x38000 0x8000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "defaults";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "seama";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
 		};
 	};
 };
 
 &pcie {
 	status = "okay";
+};
 
-	pcie0 {
-		mt76@0,0 {
-			reg = <0x0000 0 0 0 0>;
-			device_type = "pci";
-			mediatek,mtd-eeprom = <&radio 0x2000>;
-			mediatek,2ghz = <0>;
-		};
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x2000>;
+		ieee80211-freq-limit = <5000000 6000000>;
 	};
+};
 
-	pcie1 {
-		mt76@1,0 {
-			reg = <0x0000 0 0 0 0>;
-			device_type = "pci";
-			mediatek,mtd-eeprom = <&radio 0>;
-			mediatek,5ghz = <0>;
-		};
+&pcie1 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0>;
+		ieee80211-freq-limit = <2400000 2500000>;
 	};
 };