X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fwigyori.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2FZBT-WG2626.dts;h=469977bb4525dd63a0aa46375b14197906c79dd9;hp=31f0ffb37362a02f9a61f411d460b4c42bc559ce;hb=6031ab345df86c285ea55d6523d6888cc596f63d;hpb=021c8936584ded4feee82939f05098c6894f4c50

diff --git a/target/linux/ramips/dts/ZBT-WG2626.dts b/target/linux/ramips/dts/ZBT-WG2626.dts
index 31f0ffb373..469977bb45 100644
--- a/target/linux/ramips/dts/ZBT-WG2626.dts
+++ b/target/linux/ramips/dts/ZBT-WG2626.dts
@@ -2,10 +2,17 @@
 
 #include "mt7621.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
 / {
-	compatible = "mediatek,mt7621-eval-board", "mediatek,mt7621-soc";
+	compatible = "zbtlink,zbt-wg2626", "mediatek,mt7621-soc";
 	model = "ZBT-WG2626";
 
+	aliases {
+		led-status = &led_status;
+	};
+
 	memory@0 {
 		device_type = "memory";
 		reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
@@ -17,35 +24,27 @@
 
 	palmbus: palmbus@1E000000 {
 		i2c@900 {
-			compatible = "ralink,i2c-mt7621";
-			reg = <0x900 0x100>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&i2c_pins>;
 			status = "okay";
 		};
 	};
 
 	gpio-keys-polled {
 		compatible = "gpio-keys-polled";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		poll-interval = <20>;
 
 		reset {
 			label = "reset";
-			gpios = <&gpio0 18 1>;
-			linux,code = <0x198>;
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
 		};
 	};
 
 	gpio-leds {
 		compatible = "gpio-leds";
 
-		status {
+		led_status: status {
 			label = "zbt-wg2626:green:status";
-			gpios = <&gpio0 24 1>;
+			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
@@ -58,57 +57,59 @@
 	status = "okay";
 
 	m25p80@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		linux,modalias = "m25p80";
 		spi-max-frequency = <10000000>;
+		m25p,chunked-io = <32>;
 
-		partition@0 {
-			label = "u-boot";
-			reg = <0x0 0x30000>;
-			read-only;
-		};
-
-		partition@30000 {
-			label = "u-boot-env";
-			reg = <0x30000 0x10000>;
-			read-only;
-		};
-
-		factory: partition@40000 {
-			label = "factory";
-			reg = <0x40000 0x10000>;
-			read-only;
-		};
-
-		partition@50000 {
-			label = "firmware";
-			reg = <0x50000 0xfb0000>;
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
 		};
 	};
 };
 
 &pcie {
 	status = "okay";
+};
 
-	pcie0 {
-		mt76@0,0 {
-			reg = <0x0000 0 0 0 0>;
-			device_type = "pci";
-			mediatek,mtd-eeprom = <&factory 0x8000>;
-			mediatek,2ghz = <0>;
-		};
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
 	};
+};
 
-	pcie1 {
-		mt76@1,0 {
-			reg = <0x0000 0 0 0 0>;
-			device_type = "pci";
-			mediatek,mtd-eeprom = <&factory 0x0000>;
-			mediatek,5ghz = <0>;
-		};
+&pcie1 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
 	};
 };
 
@@ -119,7 +120,7 @@
 &pinctrl {
 	state_default: pinctrl0 {
 		gpio {
-			ralink,group = "wdt", "rgmii2", "wdt rst", "jtag", "mdio";
+			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
 			ralink,function = "gpio";
 		};
 	};