It isn't used any more.
Signed-off-by: Mathias Kresin <dev@kresin.me>
+++ /dev/null
-#
-# Copyright (C) 2011 OpenWrt.org
-# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-
-LZMA_TEXT_START := 0x80a00000
-LOADER := loader.bin
-LOADER_NAME := $(basename $(notdir $(LOADER)))
-LOADER_DATA :=
-TARGET_DIR :=
-FLASH_OFFS :=
-FLASH_MAX :=
-BOARD :=
-
-ifeq ($(TARGET_DIR),)
-TARGET_DIR := $(KDIR)
-endif
-
-LOADER_BIN := $(TARGET_DIR)/$(LOADER_NAME).bin
-LOADER_GZ := $(TARGET_DIR)/$(LOADER_NAME).gz
-LOADER_ELF := $(TARGET_DIR)/$(LOADER_NAME).elf
-
-PKG_NAME := lzma-loader
-PKG_BUILD_DIR := $(KDIR)/$(PKG_NAME)
-
-.PHONY : loader-compile loader.bin loader.elf loader.gz
-
-$(PKG_BUILD_DIR)/.prepared:
- mkdir $(PKG_BUILD_DIR)
- $(CP) ./src/* $(PKG_BUILD_DIR)/
- touch $@
-
-loader-compile: $(PKG_BUILD_DIR)/.prepared
- $(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
- LZMA_TEXT_START=$(LZMA_TEXT_START) \
- LOADER_DATA=$(LOADER_DATA) \
- FLASH_OFFS=$(FLASH_OFFS) \
- FLASH_MAX=$(FLASH_MAX) \
- BOARD="$(BOARD)" \
- PLATFORM="lantiq" \
- clean all
-
-loader.gz: $(PKG_BUILD_DIR)/loader.bin
- gzip -nc9 $< > $(LOADER_GZ)
-
-loader.elf: $(PKG_BUILD_DIR)/loader.elf
- $(CP) $< $(LOADER_ELF)
-
-loader.bin: $(PKG_BUILD_DIR)/loader.bin
- $(CP) $< $(LOADER_BIN)
-
-download:
-prepare: $(PKG_BUILD_DIR)/.prepared
-compile: loader-compile
-
-install:
-
-clean:
- rm -rf $(PKG_BUILD_DIR)
-
+++ /dev/null
-/*
- LzmaDecode.c
- LZMA Decoder (optimized for Speed version)
-
- LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this Code, expressly permits you to
- statically or dynamically link your Code (or bind by name) to the
- interfaces of this file without subjecting your linked Code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#include "LzmaDecode.h"
-
-#define kNumTopBits 24
-#define kTopValue ((UInt32)1 << kNumTopBits)
-
-#define kNumBitModelTotalBits 11
-#define kBitModelTotal (1 << kNumBitModelTotalBits)
-#define kNumMoveBits 5
-
-#define RC_READ_BYTE (*Buffer++)
-
-#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \
- { int i; for(i = 0; i < 5; i++) { RC_TEST; Code = (Code << 8) | RC_READ_BYTE; }}
-
-#ifdef _LZMA_IN_CB
-
-#define RC_TEST { if (Buffer == BufferLim) \
- { SizeT size; int result = InCallback->Read(InCallback, &Buffer, &size); if (result != LZMA_RESULT_OK) return result; \
- BufferLim = Buffer + size; if (size == 0) return LZMA_RESULT_DATA_ERROR; }}
-
-#define RC_INIT Buffer = BufferLim = 0; RC_INIT2
-
-#else
-
-#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
-
-#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
-
-#endif
-
-#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
-
-#define IfBit0(p) RC_NORMALIZE; bound = (Range >> kNumBitModelTotalBits) * *(p); if (Code < bound)
-#define UpdateBit0(p) Range = bound; *(p) += (kBitModelTotal - *(p)) >> kNumMoveBits;
-#define UpdateBit1(p) Range -= bound; Code -= bound; *(p) -= (*(p)) >> kNumMoveBits;
-
-#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
- { UpdateBit0(p); mi <<= 1; A0; } else \
- { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
-
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
-
-#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
- { int i = numLevels; res = 1; \
- do { CProb *p = probs + res; RC_GET_BIT(p, res) } while(--i != 0); \
- res -= (1 << numLevels); }
-
-
-#define kNumPosBitsMax 4
-#define kNumPosStatesMax (1 << kNumPosBitsMax)
-
-#define kLenNumLowBits 3
-#define kLenNumLowSymbols (1 << kLenNumLowBits)
-#define kLenNumMidBits 3
-#define kLenNumMidSymbols (1 << kLenNumMidBits)
-#define kLenNumHighBits 8
-#define kLenNumHighSymbols (1 << kLenNumHighBits)
-
-#define LenChoice 0
-#define LenChoice2 (LenChoice + 1)
-#define LenLow (LenChoice2 + 1)
-#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-
-
-#define kNumStates 12
-#define kNumLitStates 7
-
-#define kStartPosModelIndex 4
-#define kEndPosModelIndex 14
-#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-
-#define kNumPosSlotBits 6
-#define kNumLenToPosStates 4
-
-#define kNumAlignBits 4
-#define kAlignTableSize (1 << kNumAlignBits)
-
-#define kMatchMinLen 2
-
-#define IsMatch 0
-#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-#define IsRepG0 (IsRep + kNumStates)
-#define IsRepG1 (IsRepG0 + kNumStates)
-#define IsRepG2 (IsRepG1 + kNumStates)
-#define IsRep0Long (IsRepG2 + kNumStates)
-#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-#define LenCoder (Align + kAlignTableSize)
-#define RepLenCoder (LenCoder + kNumLenProbs)
-#define Literal (RepLenCoder + kNumLenProbs)
-
-#if Literal != LZMA_BASE_SIZE
-StopCompilingDueBUG
-#endif
-
-int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size)
-{
- unsigned char prop0;
- if (size < LZMA_PROPERTIES_SIZE)
- return LZMA_RESULT_DATA_ERROR;
- prop0 = propsData[0];
- if (prop0 >= (9 * 5 * 5))
- return LZMA_RESULT_DATA_ERROR;
- {
- for (propsRes->pb = 0; prop0 >= (9 * 5); propsRes->pb++, prop0 -= (9 * 5));
- for (propsRes->lp = 0; prop0 >= 9; propsRes->lp++, prop0 -= 9);
- propsRes->lc = prop0;
- /*
- unsigned char remainder = (unsigned char)(prop0 / 9);
- propsRes->lc = prop0 % 9;
- propsRes->pb = remainder / 5;
- propsRes->lp = remainder % 5;
- */
- }
-
- #ifdef _LZMA_OUT_READ
- {
- int i;
- propsRes->DictionarySize = 0;
- for (i = 0; i < 4; i++)
- propsRes->DictionarySize += (UInt32)(propsData[1 + i]) << (i * 8);
- if (propsRes->DictionarySize == 0)
- propsRes->DictionarySize = 1;
- }
- #endif
- return LZMA_RESULT_OK;
-}
-
-#define kLzmaStreamWasFinishedId (-1)
-
-int LzmaDecode(CLzmaDecoderState *vs,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *InCallback,
- #else
- const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
- #endif
- unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed)
-{
- CProb *p = vs->Probs;
- SizeT nowPos = 0;
- Byte previousByte = 0;
- UInt32 posStateMask = (1 << (vs->Properties.pb)) - 1;
- UInt32 literalPosMask = (1 << (vs->Properties.lp)) - 1;
- int lc = vs->Properties.lc;
-
- #ifdef _LZMA_OUT_READ
-
- UInt32 Range = vs->Range;
- UInt32 Code = vs->Code;
- #ifdef _LZMA_IN_CB
- const Byte *Buffer = vs->Buffer;
- const Byte *BufferLim = vs->BufferLim;
- #else
- const Byte *Buffer = inStream;
- const Byte *BufferLim = inStream + inSize;
- #endif
- int state = vs->State;
- UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
- int len = vs->RemainLen;
- UInt32 globalPos = vs->GlobalPos;
- UInt32 distanceLimit = vs->DistanceLimit;
-
- Byte *dictionary = vs->Dictionary;
- UInt32 dictionarySize = vs->Properties.DictionarySize;
- UInt32 dictionaryPos = vs->DictionaryPos;
-
- Byte tempDictionary[4];
-
- #ifndef _LZMA_IN_CB
- *inSizeProcessed = 0;
- #endif
- *outSizeProcessed = 0;
- if (len == kLzmaStreamWasFinishedId)
- return LZMA_RESULT_OK;
-
- if (dictionarySize == 0)
- {
- dictionary = tempDictionary;
- dictionarySize = 1;
- tempDictionary[0] = vs->TempDictionary[0];
- }
-
- if (len == kLzmaNeedInitId)
- {
- {
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
- UInt32 i;
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- rep0 = rep1 = rep2 = rep3 = 1;
- state = 0;
- globalPos = 0;
- distanceLimit = 0;
- dictionaryPos = 0;
- dictionary[dictionarySize - 1] = 0;
- #ifdef _LZMA_IN_CB
- RC_INIT;
- #else
- RC_INIT(inStream, inSize);
- #endif
- }
- len = 0;
- }
- while(len != 0 && nowPos < outSize)
- {
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- len--;
- }
- if (dictionaryPos == 0)
- previousByte = dictionary[dictionarySize - 1];
- else
- previousByte = dictionary[dictionaryPos - 1];
-
- #else /* if !_LZMA_OUT_READ */
-
- int state = 0;
- UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
- int len = 0;
- const Byte *Buffer;
- const Byte *BufferLim;
- UInt32 Range;
- UInt32 Code;
-
- #ifndef _LZMA_IN_CB
- *inSizeProcessed = 0;
- #endif
- *outSizeProcessed = 0;
-
- {
- UInt32 i;
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- }
-
- #ifdef _LZMA_IN_CB
- RC_INIT;
- #else
- RC_INIT(inStream, inSize);
- #endif
-
- #endif /* _LZMA_OUT_READ */
-
- while(nowPos < outSize)
- {
- CProb *prob;
- UInt32 bound;
- int posState = (int)(
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & posStateMask);
-
- prob = p + IsMatch + (state << kNumPosBitsMax) + posState;
- IfBit0(prob)
- {
- int symbol = 1;
- UpdateBit0(prob)
- prob = p + Literal + (LZMA_LIT_SIZE *
- (((
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & literalPosMask) << lc) + (previousByte >> (8 - lc))));
-
- if (state >= kNumLitStates)
- {
- int matchByte;
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- matchByte = dictionary[pos];
- #else
- matchByte = outStream[nowPos - rep0];
- #endif
- do
- {
- int bit;
- CProb *probLit;
- matchByte <<= 1;
- bit = (matchByte & 0x100);
- probLit = prob + 0x100 + bit + symbol;
- RC_GET_BIT2(probLit, symbol, if (bit != 0) break, if (bit == 0) break)
- }
- while (symbol < 0x100);
- }
- while (symbol < 0x100)
- {
- CProb *probLit = prob + symbol;
- RC_GET_BIT(probLit, symbol)
- }
- previousByte = (Byte)symbol;
-
- outStream[nowPos++] = previousByte;
- #ifdef _LZMA_OUT_READ
- if (distanceLimit < dictionarySize)
- distanceLimit++;
-
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #endif
- if (state < 4) state = 0;
- else if (state < 10) state -= 3;
- else state -= 6;
- }
- else
- {
- UpdateBit1(prob);
- prob = p + IsRep + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- rep3 = rep2;
- rep2 = rep1;
- rep1 = rep0;
- state = state < kNumLitStates ? 0 : 3;
- prob = p + LenCoder;
- }
- else
- {
- UpdateBit1(prob);
- prob = p + IsRepG0 + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- prob = p + IsRep0Long + (state << kNumPosBitsMax) + posState;
- IfBit0(prob)
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos;
- #endif
- UpdateBit0(prob);
-
- #ifdef _LZMA_OUT_READ
- if (distanceLimit == 0)
- #else
- if (nowPos == 0)
- #endif
- return LZMA_RESULT_DATA_ERROR;
-
- state = state < kNumLitStates ? 9 : 11;
- #ifdef _LZMA_OUT_READ
- pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- outStream[nowPos++] = previousByte;
- #ifdef _LZMA_OUT_READ
- if (distanceLimit < dictionarySize)
- distanceLimit++;
- #endif
-
- continue;
- }
- else
- {
- UpdateBit1(prob);
- }
- }
- else
- {
- UInt32 distance;
- UpdateBit1(prob);
- prob = p + IsRepG1 + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- distance = rep1;
- }
- else
- {
- UpdateBit1(prob);
- prob = p + IsRepG2 + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- distance = rep2;
- }
- else
- {
- UpdateBit1(prob);
- distance = rep3;
- rep3 = rep2;
- }
- rep2 = rep1;
- }
- rep1 = rep0;
- rep0 = distance;
- }
- state = state < kNumLitStates ? 8 : 11;
- prob = p + RepLenCoder;
- }
- {
- int numBits, offset;
- CProb *probLen = prob + LenChoice;
- IfBit0(probLen)
- {
- UpdateBit0(probLen);
- probLen = prob + LenLow + (posState << kLenNumLowBits);
- offset = 0;
- numBits = kLenNumLowBits;
- }
- else
- {
- UpdateBit1(probLen);
- probLen = prob + LenChoice2;
- IfBit0(probLen)
- {
- UpdateBit0(probLen);
- probLen = prob + LenMid + (posState << kLenNumMidBits);
- offset = kLenNumLowSymbols;
- numBits = kLenNumMidBits;
- }
- else
- {
- UpdateBit1(probLen);
- probLen = prob + LenHigh;
- offset = kLenNumLowSymbols + kLenNumMidSymbols;
- numBits = kLenNumHighBits;
- }
- }
- RangeDecoderBitTreeDecode(probLen, numBits, len);
- len += offset;
- }
-
- if (state < 4)
- {
- int posSlot;
- state += kNumLitStates;
- prob = p + PosSlot +
- ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
- kNumPosSlotBits);
- RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
- if (posSlot >= kStartPosModelIndex)
- {
- int numDirectBits = ((posSlot >> 1) - 1);
- rep0 = (2 | ((UInt32)posSlot & 1));
- if (posSlot < kEndPosModelIndex)
- {
- rep0 <<= numDirectBits;
- prob = p + SpecPos + rep0 - posSlot - 1;
- }
- else
- {
- numDirectBits -= kNumAlignBits;
- do
- {
- RC_NORMALIZE
- Range >>= 1;
- rep0 <<= 1;
- if (Code >= Range)
- {
- Code -= Range;
- rep0 |= 1;
- }
- }
- while (--numDirectBits != 0);
- prob = p + Align;
- rep0 <<= kNumAlignBits;
- numDirectBits = kNumAlignBits;
- }
- {
- int i = 1;
- int mi = 1;
- do
- {
- CProb *prob3 = prob + mi;
- RC_GET_BIT2(prob3, mi, ; , rep0 |= i);
- i <<= 1;
- }
- while(--numDirectBits != 0);
- }
- }
- else
- rep0 = posSlot;
- if (++rep0 == (UInt32)(0))
- {
- /* it's for stream version */
- len = kLzmaStreamWasFinishedId;
- break;
- }
- }
-
- len += kMatchMinLen;
- #ifdef _LZMA_OUT_READ
- if (rep0 > distanceLimit)
- #else
- if (rep0 > nowPos)
- #endif
- return LZMA_RESULT_DATA_ERROR;
-
- #ifdef _LZMA_OUT_READ
- if (dictionarySize - distanceLimit > (UInt32)len)
- distanceLimit += len;
- else
- distanceLimit = dictionarySize;
- #endif
-
- do
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- len--;
- outStream[nowPos++] = previousByte;
- }
- while(len != 0 && nowPos < outSize);
- }
- }
- RC_NORMALIZE;
-
- #ifdef _LZMA_OUT_READ
- vs->Range = Range;
- vs->Code = Code;
- vs->DictionaryPos = dictionaryPos;
- vs->GlobalPos = globalPos + (UInt32)nowPos;
- vs->DistanceLimit = distanceLimit;
- vs->Reps[0] = rep0;
- vs->Reps[1] = rep1;
- vs->Reps[2] = rep2;
- vs->Reps[3] = rep3;
- vs->State = state;
- vs->RemainLen = len;
- vs->TempDictionary[0] = tempDictionary[0];
- #endif
-
- #ifdef _LZMA_IN_CB
- vs->Buffer = Buffer;
- vs->BufferLim = BufferLim;
- #else
- *inSizeProcessed = (SizeT)(Buffer - inStream);
- #endif
- *outSizeProcessed = nowPos;
- return LZMA_RESULT_OK;
-}
+++ /dev/null
-/*
- LzmaDecode.h
- LZMA Decoder interface
-
- LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this code, expressly permits you to
- statically or dynamically link your code (or bind by name) to the
- interfaces of this file without subjecting your linked code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#ifndef __LZMADECODE_H
-#define __LZMADECODE_H
-
-#include "LzmaTypes.h"
-
-/* #define _LZMA_IN_CB */
-/* Use callback for input data */
-
-/* #define _LZMA_OUT_READ */
-/* Use read function for output data */
-
-/* #define _LZMA_PROB32 */
-/* It can increase speed on some 32-bit CPUs,
- but memory usage will be doubled in that case */
-
-/* #define _LZMA_LOC_OPT */
-/* Enable local speed optimizations inside code */
-
-#ifdef _LZMA_PROB32
-#define CProb UInt32
-#else
-#define CProb UInt16
-#endif
-
-#define LZMA_RESULT_OK 0
-#define LZMA_RESULT_DATA_ERROR 1
-
-#ifdef _LZMA_IN_CB
-typedef struct _ILzmaInCallback
-{
- int (*Read)(void *object, const unsigned char **buffer, SizeT *bufferSize);
-} ILzmaInCallback;
-#endif
-
-#define LZMA_BASE_SIZE 1846
-#define LZMA_LIT_SIZE 768
-
-#define LZMA_PROPERTIES_SIZE 5
-
-typedef struct _CLzmaProperties
-{
- int lc;
- int lp;
- int pb;
- #ifdef _LZMA_OUT_READ
- UInt32 DictionarySize;
- #endif
-}CLzmaProperties;
-
-int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size);
-
-#define LzmaGetNumProbs(Properties) (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((Properties)->lc + (Properties)->lp)))
-
-#define kLzmaNeedInitId (-2)
-
-typedef struct _CLzmaDecoderState
-{
- CLzmaProperties Properties;
- CProb *Probs;
-
- #ifdef _LZMA_IN_CB
- const unsigned char *Buffer;
- const unsigned char *BufferLim;
- #endif
-
- #ifdef _LZMA_OUT_READ
- unsigned char *Dictionary;
- UInt32 Range;
- UInt32 Code;
- UInt32 DictionaryPos;
- UInt32 GlobalPos;
- UInt32 DistanceLimit;
- UInt32 Reps[4];
- int State;
- int RemainLen;
- unsigned char TempDictionary[4];
- #endif
-} CLzmaDecoderState;
-
-#ifdef _LZMA_OUT_READ
-#define LzmaDecoderInit(vs) { (vs)->RemainLen = kLzmaNeedInitId; }
-#endif
-
-int LzmaDecode(CLzmaDecoderState *vs,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback,
- #else
- const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
- #endif
- unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed);
-
-#endif
+++ /dev/null
-/*
-LzmaTypes.h
-
-Types for LZMA Decoder
-
-This file written and distributed to public domain by Igor Pavlov.
-This file is part of LZMA SDK 4.40 (2006-05-01)
-*/
-
-#ifndef __LZMATYPES_H
-#define __LZMATYPES_H
-
-#ifndef _7ZIP_BYTE_DEFINED
-#define _7ZIP_BYTE_DEFINED
-typedef unsigned char Byte;
-#endif
-
-#ifndef _7ZIP_UINT16_DEFINED
-#define _7ZIP_UINT16_DEFINED
-typedef unsigned short UInt16;
-#endif
-
-#ifndef _7ZIP_UINT32_DEFINED
-#define _7ZIP_UINT32_DEFINED
-#ifdef _LZMA_UINT32_IS_ULONG
-typedef unsigned long UInt32;
-#else
-typedef unsigned int UInt32;
-#endif
-#endif
-
-/* #define _LZMA_NO_SYSTEM_SIZE_T */
-/* You can use it, if you don't want <stddef.h> */
-
-#ifndef _7ZIP_SIZET_DEFINED
-#define _7ZIP_SIZET_DEFINED
-#ifdef _LZMA_NO_SYSTEM_SIZE_T
-typedef UInt32 SizeT;
-#else
-#include <stddef.h>
-typedef size_t SizeT;
-#endif
-#endif
-
-#endif
+++ /dev/null
-#
-# Makefile for the LZMA compressed kernel loader for
-# Atheros AR7XXX/AR9XXX based boards
-#
-# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
-#
-# Some parts of this file was based on the OpenWrt specific lzma-loader
-# for the BCM47xx and ADM5120 based boards:
-# Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
-# Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
-# Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 as published
-# by the Free Software Foundation.
-#
-
-LOADADDR :=
-LZMA_TEXT_START := 0x80a00000
-LOADER_DATA :=
-BOARD :=
-FLASH_OFFS :=
-FLASH_MAX :=
-PLATFORM :=
-
-CC := $(CROSS_COMPILE)gcc
-LD := $(CROSS_COMPILE)ld
-OBJCOPY := $(CROSS_COMPILE)objcopy
-OBJDUMP := $(CROSS_COMPILE)objdump
-
-BIN_FLAGS := -O binary -R .reginfo -R .note -R .comment -R .mdebug -R .MIPS.abiflags -S
-
-CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
- -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 \
- -mno-abicalls -fno-pic -ffunction-sections -pipe -mlong-calls \
- -fno-common -ffreestanding -fhonour-copts \
- -mabi=32 -march=mips32r2 \
- -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap
-CFLAGS += -D_LZMA_PROB32 -DARCH=$(PLATFORM)
-
-ASFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-LDFLAGS = -static --gc-sections -no-warn-mismatch
-LDFLAGS += -e startup -T loader.lds -Ttext $(LZMA_TEXT_START)
-
-O_FORMAT = $(shell $(OBJDUMP) -i | head -2 | grep elf32)
-
-OBJECTS := head.o loader.o cache.o board-$(PLATFORM).o printf.o LzmaDecode.o
-
-include $(PLATFORM).mk
-CFLAGS+=$(CACHE_FLAGS)
-ASFLAGS+=$(CACHE_FLAGS)
-
-ifneq ($(strip $(LOADER_DATA)),)
-OBJECTS += data.o
-CFLAGS += -DLZMA_WRAPPER=1 -DLOADADDR=$(LOADADDR)
-endif
-
-ifneq ($(strip $(KERNEL_CMDLINE)),)
-CFLAGS += -DCONFIG_KERNEL_CMDLINE='"$(KERNEL_CMDLINE)"'
-endif
-
-ifneq ($(strip $(FLASH_OFFS)),)
-CFLAGS += -DCONFIG_FLASH_OFFS=$(FLASH_OFFS)
-endif
-
-ifneq ($(strip $(FLASH_MAX)),)
-CFLAGS += -DCONFIG_FLASH_MAX=$(FLASH_MAX)
-endif
-
-BOARD_DEF := $(shell echo $(strip $(BOARD)) | tr a-z A-Z | tr - _)
-ifneq ($(BOARD_DEF),)
-CFLAGS += -DCONFIG_BOARD_$(BOARD_DEF)
-endif
-
-all: loader.elf
-
-# Don't build dependencies, this may die if $(CC) isn't gcc
-dep:
-
-install:
-
-%.o : %.c
- $(CC) $(CFLAGS) -c -o $@ $<
-
-%.o : %.S
- $(CC) $(ASFLAGS) -c -o $@ $<
-
-data.o: $(LOADER_DATA)
- $(LD) -r -b binary --oformat $(O_FORMAT) -T lzma-data.lds -o $@ $<
-
-loader: $(OBJECTS)
- $(LD) $(LDFLAGS) -o $@ $(OBJECTS)
-
-loader.bin: loader
- $(OBJCOPY) $(BIN_FLAGS) $< $@
-
-loader2.o: loader.bin
- $(LD) -r -b binary --oformat $(O_FORMAT) -o $@ $<
-
-loader.elf: loader2.o
- $(LD) -e startup -T loader2.lds -Ttext $(LOADADDR) -o $@ $<
-
-mrproper: clean
-
-clean:
- rm -f loader *.elf *.bin *.o
-
-
-
+++ /dev/null
-CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(64 * 1024)" -DCONFIG_CACHELINE_SIZE=32
+++ /dev/null
-/*
- * Atheros AR71XX/AR724X/AR913X SoC register definitions
- *
- * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
- *
- * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_AR71XX_REGS_H
-#define __ASM_MACH_AR71XX_REGS_H
-
-#define BIT(_x) (1UL << (_x))
-
-#define AR71XX_APB_BASE 0x18000000
-#define AR71XX_GE0_BASE 0x19000000
-#define AR71XX_GE0_SIZE 0x10000
-#define AR71XX_GE1_BASE 0x1a000000
-#define AR71XX_GE1_SIZE 0x10000
-#define AR71XX_EHCI_BASE 0x1b000000
-#define AR71XX_EHCI_SIZE 0x1000
-#define AR71XX_OHCI_BASE 0x1c000000
-#define AR71XX_OHCI_SIZE 0x1000
-#define AR71XX_SPI_BASE 0x1f000000
-#define AR71XX_SPI_SIZE 0x01000000
-
-#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
-#define AR71XX_DDR_CTRL_SIZE 0x100
-#define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000)
-#define AR71XX_UART_SIZE 0x100
-#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
-#define AR71XX_USB_CTRL_SIZE 0x100
-#define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000)
-#define AR71XX_GPIO_SIZE 0x100
-#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
-#define AR71XX_PLL_SIZE 0x100
-#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
-#define AR71XX_RESET_SIZE 0x100
-#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000)
-#define AR71XX_MII_SIZE 0x100
-
-#define AR71XX_PCI_MEM_BASE 0x10000000
-#define AR71XX_PCI_MEM_SIZE 0x07000000
-
-#define AR71XX_PCI_WIN0_OFFS 0x10000000
-#define AR71XX_PCI_WIN1_OFFS 0x11000000
-#define AR71XX_PCI_WIN2_OFFS 0x12000000
-#define AR71XX_PCI_WIN3_OFFS 0x13000000
-#define AR71XX_PCI_WIN4_OFFS 0x14000000
-#define AR71XX_PCI_WIN5_OFFS 0x15000000
-#define AR71XX_PCI_WIN6_OFFS 0x16000000
-#define AR71XX_PCI_WIN7_OFFS 0x07000000
-
-#define AR71XX_PCI_CFG_BASE \
- (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
-#define AR71XX_PCI_CFG_SIZE 0x100
-
-#define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
-#define AR7240_USB_CTRL_SIZE 0x100
-#define AR7240_OHCI_BASE 0x1b000000
-#define AR7240_OHCI_SIZE 0x1000
-
-#define AR724X_PCI_MEM_BASE 0x10000000
-#define AR724X_PCI_MEM_SIZE 0x04000000
-
-#define AR724X_PCI_CFG_BASE 0x14000000
-#define AR724X_PCI_CFG_SIZE 0x1000
-#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000c0000)
-#define AR724X_PCI_CRP_SIZE 0x1000
-#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
-#define AR724X_PCI_CTRL_SIZE 0x100
-
-#define AR724X_EHCI_BASE 0x1b000000
-#define AR724X_EHCI_SIZE 0x1000
-
-#define AR913X_EHCI_BASE 0x1b000000
-#define AR913X_EHCI_SIZE 0x1000
-#define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
-#define AR913X_WMAC_SIZE 0x30000
-
-#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
-#define AR933X_UART_SIZE 0x14
-#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
-#define AR933X_GMAC_SIZE 0x04
-#define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
-#define AR933X_WMAC_SIZE 0x20000
-#define AR933X_EHCI_BASE 0x1b000000
-#define AR933X_EHCI_SIZE 0x1000
-
-#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
-#define AR934X_GMAC_SIZE 0x14
-#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
-#define AR934X_WMAC_SIZE 0x20000
-#define AR934X_EHCI_BASE 0x1b000000
-#define AR934X_EHCI_SIZE 0x200
-
-#define QCA955X_PCI_MEM_BASE0 0x10000000
-#define QCA955X_PCI_MEM_BASE1 0x12000000
-#define QCA955X_PCI_MEM_SIZE 0x02000000
-#define QCA955X_PCI_CFG_BASE0 0x14000000
-#define QCA955X_PCI_CFG_BASE1 0x16000000
-#define QCA955X_PCI_CFG_SIZE 0x1000
-#define QCA955X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000)
-#define QCA955X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000)
-#define QCA955X_PCI_CRP_SIZE 0x1000
-#define QCA955X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000)
-#define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000)
-#define QCA955X_PCI_CTRL_SIZE 0x100
-
-#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
-#define QCA955X_WMAC_SIZE 0x20000
-#define QCA955X_EHCI0_BASE 0x1b000000
-#define QCA955X_EHCI1_BASE 0x1b400000
-#define QCA955X_EHCI_SIZE 0x1000
-#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
-#define QCA955X_GMAC_SIZE 0x40
-
-#define AR9300_OTP_BASE 0x14000
-#define AR9300_OTP_STATUS 0x15f18
-#define AR9300_OTP_STATUS_TYPE 0x7
-#define AR9300_OTP_STATUS_VALID 0x4
-#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2
-#define AR9300_OTP_STATUS_SM_BUSY 0x1
-#define AR9300_OTP_READ_DATA 0x15f1c
-
-/*
- * DDR_CTRL block
- */
-#define AR71XX_DDR_REG_PCI_WIN0 0x7c
-#define AR71XX_DDR_REG_PCI_WIN1 0x80
-#define AR71XX_DDR_REG_PCI_WIN2 0x84
-#define AR71XX_DDR_REG_PCI_WIN3 0x88
-#define AR71XX_DDR_REG_PCI_WIN4 0x8c
-#define AR71XX_DDR_REG_PCI_WIN5 0x90
-#define AR71XX_DDR_REG_PCI_WIN6 0x94
-#define AR71XX_DDR_REG_PCI_WIN7 0x98
-#define AR71XX_DDR_REG_FLUSH_GE0 0x9c
-#define AR71XX_DDR_REG_FLUSH_GE1 0xa0
-#define AR71XX_DDR_REG_FLUSH_USB 0xa4
-#define AR71XX_DDR_REG_FLUSH_PCI 0xa8
-
-#define AR724X_DDR_REG_FLUSH_GE0 0x7c
-#define AR724X_DDR_REG_FLUSH_GE1 0x80
-#define AR724X_DDR_REG_FLUSH_USB 0x84
-#define AR724X_DDR_REG_FLUSH_PCIE 0x88
-
-#define AR913X_DDR_REG_FLUSH_GE0 0x7c
-#define AR913X_DDR_REG_FLUSH_GE1 0x80
-#define AR913X_DDR_REG_FLUSH_USB 0x84
-#define AR913X_DDR_REG_FLUSH_WMAC 0x88
-
-#define AR933X_DDR_REG_FLUSH_GE0 0x7c
-#define AR933X_DDR_REG_FLUSH_GE1 0x80
-#define AR933X_DDR_REG_FLUSH_USB 0x84
-#define AR933X_DDR_REG_FLUSH_WMAC 0x88
-
-#define AR934X_DDR_REG_FLUSH_GE0 0x9c
-#define AR934X_DDR_REG_FLUSH_GE1 0xa0
-#define AR934X_DDR_REG_FLUSH_USB 0xa4
-#define AR934X_DDR_REG_FLUSH_PCIE 0xa8
-#define AR934X_DDR_REG_FLUSH_WMAC 0xac
-
-/*
- * PLL block
- */
-#define AR71XX_PLL_REG_CPU_CONFIG 0x00
-#define AR71XX_PLL_REG_SEC_CONFIG 0x04
-#define AR71XX_PLL_REG_ETH0_INT_CLOCK 0x10
-#define AR71XX_PLL_REG_ETH1_INT_CLOCK 0x14
-
-#define AR71XX_PLL_DIV_SHIFT 3
-#define AR71XX_PLL_DIV_MASK 0x1f
-#define AR71XX_CPU_DIV_SHIFT 16
-#define AR71XX_CPU_DIV_MASK 0x3
-#define AR71XX_DDR_DIV_SHIFT 18
-#define AR71XX_DDR_DIV_MASK 0x3
-#define AR71XX_AHB_DIV_SHIFT 20
-#define AR71XX_AHB_DIV_MASK 0x7
-
-#define AR71XX_ETH0_PLL_SHIFT 17
-#define AR71XX_ETH1_PLL_SHIFT 19
-
-#define AR724X_PLL_REG_CPU_CONFIG 0x00
-#define AR724X_PLL_REG_PCIE_CONFIG 0x18
-
-#define AR724X_PLL_DIV_SHIFT 0
-#define AR724X_PLL_DIV_MASK 0x3ff
-#define AR724X_PLL_REF_DIV_SHIFT 10
-#define AR724X_PLL_REF_DIV_MASK 0xf
-#define AR724X_AHB_DIV_SHIFT 19
-#define AR724X_AHB_DIV_MASK 0x1
-#define AR724X_DDR_DIV_SHIFT 22
-#define AR724X_DDR_DIV_MASK 0x3
-
-#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c
-
-#define AR913X_PLL_REG_CPU_CONFIG 0x00
-#define AR913X_PLL_REG_ETH_CONFIG 0x04
-#define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14
-#define AR913X_PLL_REG_ETH1_INT_CLOCK 0x18
-
-#define AR913X_PLL_DIV_SHIFT 0
-#define AR913X_PLL_DIV_MASK 0x3ff
-#define AR913X_DDR_DIV_SHIFT 22
-#define AR913X_DDR_DIV_MASK 0x3
-#define AR913X_AHB_DIV_SHIFT 19
-#define AR913X_AHB_DIV_MASK 0x1
-
-#define AR913X_ETH0_PLL_SHIFT 20
-#define AR913X_ETH1_PLL_SHIFT 22
-
-#define AR933X_PLL_CPU_CONFIG_REG 0x00
-#define AR933X_PLL_CLOCK_CTRL_REG 0x08
-
-#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT 10
-#define AR933X_PLL_CPU_CONFIG_NINT_MASK 0x3f
-#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT 16
-#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
-#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23
-#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7
-
-#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2)
-#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5
-#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK 0x3
-#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT 10
-#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK 0x3
-#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15
-#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7
-
-#define AR934X_PLL_CPU_CONFIG_REG 0x00
-#define AR934X_PLL_DDR_CONFIG_REG 0x04
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08
-#define AR934X_PLL_ETH_XMII_CONTROL_REG 0x2c
-
-#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0
-#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f
-#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT 6
-#define AR934X_PLL_CPU_CONFIG_NINT_MASK 0x3f
-#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT 12
-#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
-#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19
-#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3
-
-#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT 0
-#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff
-#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT 10
-#define AR934X_PLL_DDR_CONFIG_NINT_MASK 0x3f
-#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT 16
-#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f
-#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23
-#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7
-
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS BIT(2)
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS BIT(3)
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS BIT(4)
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT 5
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x1f
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT 10
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x1f
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT 15
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x1f
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20)
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21)
-#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
-
-#define QCA955X_PLL_CPU_CONFIG_REG 0x00
-#define QCA955X_PLL_DDR_CONFIG_REG 0x04
-#define QCA955X_PLL_CLK_CTRL_REG 0x08
-
-#define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0
-#define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f
-#define QCA955X_PLL_CPU_CONFIG_NINT_SHIFT 6
-#define QCA955X_PLL_CPU_CONFIG_NINT_MASK 0x3f
-#define QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT 12
-#define QCA955X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
-#define QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19
-#define QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3
-
-#define QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT 0
-#define QCA955X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff
-#define QCA955X_PLL_DDR_CONFIG_NINT_SHIFT 10
-#define QCA955X_PLL_DDR_CONFIG_NINT_MASK 0x3f
-#define QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT 16
-#define QCA955X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f
-#define QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23
-#define QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7
-
-#define QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2)
-#define QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3)
-#define QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4)
-#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5
-#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f
-#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10
-#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f
-#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15
-#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f
-#define QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20)
-#define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21)
-#define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
-
-/*
- * USB_CONFIG block
- */
-#define AR71XX_USB_CTRL_REG_FLADJ 0x00
-#define AR71XX_USB_CTRL_REG_CONFIG 0x04
-
-/*
- * RESET block
- */
-#define AR71XX_RESET_REG_TIMER 0x00
-#define AR71XX_RESET_REG_TIMER_RELOAD 0x04
-#define AR71XX_RESET_REG_WDOG_CTRL 0x08
-#define AR71XX_RESET_REG_WDOG 0x0c
-#define AR71XX_RESET_REG_MISC_INT_STATUS 0x10
-#define AR71XX_RESET_REG_MISC_INT_ENABLE 0x14
-#define AR71XX_RESET_REG_PCI_INT_STATUS 0x18
-#define AR71XX_RESET_REG_PCI_INT_ENABLE 0x1c
-#define AR71XX_RESET_REG_GLOBAL_INT_STATUS 0x20
-#define AR71XX_RESET_REG_RESET_MODULE 0x24
-#define AR71XX_RESET_REG_PERFC_CTRL 0x2c
-#define AR71XX_RESET_REG_PERFC0 0x30
-#define AR71XX_RESET_REG_PERFC1 0x34
-#define AR71XX_RESET_REG_REV_ID 0x90
-
-#define AR913X_RESET_REG_GLOBAL_INT_STATUS 0x18
-#define AR913X_RESET_REG_RESET_MODULE 0x1c
-#define AR913X_RESET_REG_PERF_CTRL 0x20
-#define AR913X_RESET_REG_PERFC0 0x24
-#define AR913X_RESET_REG_PERFC1 0x28
-
-#define AR724X_RESET_REG_RESET_MODULE 0x1c
-
-#define AR933X_RESET_REG_RESET_MODULE 0x1c
-#define AR933X_RESET_REG_BOOTSTRAP 0xac
-
-#define AR934X_RESET_REG_RESET_MODULE 0x1c
-#define AR934X_RESET_REG_BOOTSTRAP 0xb0
-#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
-
-#define QCA955X_RESET_REG_BOOTSTRAP 0xb0
-#define QCA955X_RESET_REG_EXT_INT_STATUS 0xac
-
-#define MISC_INT_ETHSW BIT(12)
-#define MISC_INT_TIMER4 BIT(10)
-#define MISC_INT_TIMER3 BIT(9)
-#define MISC_INT_TIMER2 BIT(8)
-#define MISC_INT_DMA BIT(7)
-#define MISC_INT_OHCI BIT(6)
-#define MISC_INT_PERFC BIT(5)
-#define MISC_INT_WDOG BIT(4)
-#define MISC_INT_UART BIT(3)
-#define MISC_INT_GPIO BIT(2)
-#define MISC_INT_ERROR BIT(1)
-#define MISC_INT_TIMER BIT(0)
-
-#define AR71XX_RESET_EXTERNAL BIT(28)
-#define AR71XX_RESET_FULL_CHIP BIT(24)
-#define AR71XX_RESET_CPU_NMI BIT(21)
-#define AR71XX_RESET_CPU_COLD BIT(20)
-#define AR71XX_RESET_DMA BIT(19)
-#define AR71XX_RESET_SLIC BIT(18)
-#define AR71XX_RESET_STEREO BIT(17)
-#define AR71XX_RESET_DDR BIT(16)
-#define AR71XX_RESET_GE1_MAC BIT(13)
-#define AR71XX_RESET_GE1_PHY BIT(12)
-#define AR71XX_RESET_USBSUS_OVERRIDE BIT(10)
-#define AR71XX_RESET_GE0_MAC BIT(9)
-#define AR71XX_RESET_GE0_PHY BIT(8)
-#define AR71XX_RESET_USB_OHCI_DLL BIT(6)
-#define AR71XX_RESET_USB_HOST BIT(5)
-#define AR71XX_RESET_USB_PHY BIT(4)
-#define AR71XX_RESET_PCI_BUS BIT(1)
-#define AR71XX_RESET_PCI_CORE BIT(0)
-
-#define AR7240_RESET_USB_HOST BIT(5)
-#define AR7240_RESET_OHCI_DLL BIT(3)
-
-#define AR724X_RESET_GE1_MDIO BIT(23)
-#define AR724X_RESET_GE0_MDIO BIT(22)
-#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10)
-#define AR724X_RESET_PCIE_PHY BIT(7)
-#define AR724X_RESET_PCIE BIT(6)
-#define AR724X_RESET_USB_HOST BIT(5)
-#define AR724X_RESET_USB_PHY BIT(4)
-#define AR724X_RESET_USBSUS_OVERRIDE BIT(3)
-
-#define AR913X_RESET_AMBA2WMAC BIT(22)
-#define AR913X_RESET_USBSUS_OVERRIDE BIT(10)
-#define AR913X_RESET_USB_HOST BIT(5)
-#define AR913X_RESET_USB_PHY BIT(4)
-
-#define AR933X_RESET_GE1_MDIO BIT(23)
-#define AR933X_RESET_GE0_MDIO BIT(22)
-#define AR933X_RESET_GE1_MAC BIT(13)
-#define AR933X_RESET_WMAC BIT(11)
-#define AR933X_RESET_GE0_MAC BIT(9)
-#define AR933X_RESET_USB_HOST BIT(5)
-#define AR933X_RESET_USB_PHY BIT(4)
-#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
-
-#define AR934X_RESET_HOST BIT(31)
-#define AR934X_RESET_SLIC BIT(30)
-#define AR934X_RESET_HDMA BIT(29)
-#define AR934X_RESET_EXTERNAL BIT(28)
-#define AR934X_RESET_RTC BIT(27)
-#define AR934X_RESET_PCIE_EP_INT BIT(26)
-#define AR934X_RESET_CHKSUM_ACC BIT(25)
-#define AR934X_RESET_FULL_CHIP BIT(24)
-#define AR934X_RESET_GE1_MDIO BIT(23)
-#define AR934X_RESET_GE0_MDIO BIT(22)
-#define AR934X_RESET_CPU_NMI BIT(21)
-#define AR934X_RESET_CPU_COLD BIT(20)
-#define AR934X_RESET_HOST_RESET_INT BIT(19)
-#define AR934X_RESET_PCIE_EP BIT(18)
-#define AR934X_RESET_UART1 BIT(17)
-#define AR934X_RESET_DDR BIT(16)
-#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15)
-#define AR934X_RESET_NANDF BIT(14)
-#define AR934X_RESET_GE1_MAC BIT(13)
-#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12)
-#define AR934X_RESET_USB_PHY_ANALOG BIT(11)
-#define AR934X_RESET_HOST_DMA_INT BIT(10)
-#define AR934X_RESET_GE0_MAC BIT(9)
-#define AR934X_RESET_ETH_SWITCH BIT(8)
-#define AR934X_RESET_PCIE_PHY BIT(7)
-#define AR934X_RESET_PCIE BIT(6)
-#define AR934X_RESET_USB_HOST BIT(5)
-#define AR934X_RESET_USB_PHY BIT(4)
-#define AR934X_RESET_USBSUS_OVERRIDE BIT(3)
-#define AR934X_RESET_LUT BIT(2)
-#define AR934X_RESET_MBOX BIT(1)
-#define AR934X_RESET_I2S BIT(0)
-
-#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
-#define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
-#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
-
-#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
-#define AR934X_BOOTSTRAP_SW_OPTION7 BIT(22)
-#define AR934X_BOOTSTRAP_SW_OPTION6 BIT(21)
-#define AR934X_BOOTSTRAP_SW_OPTION5 BIT(20)
-#define AR934X_BOOTSTRAP_SW_OPTION4 BIT(19)
-#define AR934X_BOOTSTRAP_SW_OPTION3 BIT(18)
-#define AR934X_BOOTSTRAP_SW_OPTION2 BIT(17)
-#define AR934X_BOOTSTRAP_SW_OPTION1 BIT(16)
-#define AR934X_BOOTSTRAP_USB_MODE_DEVICE BIT(7)
-#define AR934X_BOOTSTRAP_PCIE_RC BIT(6)
-#define AR934X_BOOTSTRAP_EJTAG_MODE BIT(5)
-#define AR934X_BOOTSTRAP_REF_CLK_40 BIT(4)
-#define AR934X_BOOTSTRAP_BOOT_FROM_SPI BIT(2)
-#define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1)
-#define AR934X_BOOTSTRAP_DDR1 BIT(0)
-
-#define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4)
-
-#define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0)
-#define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1)
-#define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2)
-#define AR934X_PCIE_WMAC_INT_WMAC_RXHP BIT(3)
-#define AR934X_PCIE_WMAC_INT_PCIE_RC BIT(4)
-#define AR934X_PCIE_WMAC_INT_PCIE_RC0 BIT(5)
-#define AR934X_PCIE_WMAC_INT_PCIE_RC1 BIT(6)
-#define AR934X_PCIE_WMAC_INT_PCIE_RC2 BIT(7)
-#define AR934X_PCIE_WMAC_INT_PCIE_RC3 BIT(8)
-#define AR934X_PCIE_WMAC_INT_WMAC_ALL \
- (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \
- AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP)
-
-#define AR934X_PCIE_WMAC_INT_PCIE_ALL \
- (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \
- AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \
- AR934X_PCIE_WMAC_INT_PCIE_RC3)
-
-#define QCA955X_EXT_INT_WMAC_MISC BIT(0)
-#define QCA955X_EXT_INT_WMAC_TX BIT(1)
-#define QCA955X_EXT_INT_WMAC_RXLP BIT(2)
-#define QCA955X_EXT_INT_WMAC_RXHP BIT(3)
-#define QCA955X_EXT_INT_PCIE_RC1 BIT(4)
-#define QCA955X_EXT_INT_PCIE_RC1_INT0 BIT(5)
-#define QCA955X_EXT_INT_PCIE_RC1_INT1 BIT(6)
-#define QCA955X_EXT_INT_PCIE_RC1_INT2 BIT(7)
-#define QCA955X_EXT_INT_PCIE_RC1_INT3 BIT(8)
-#define QCA955X_EXT_INT_PCIE_RC2 BIT(12)
-#define QCA955X_EXT_INT_PCIE_RC2_INT0 BIT(13)
-#define QCA955X_EXT_INT_PCIE_RC2_INT1 BIT(14)
-#define QCA955X_EXT_INT_PCIE_RC2_INT2 BIT(15)
-#define QCA955X_EXT_INT_PCIE_RC2_INT3 BIT(16)
-#define QCA955X_EXT_INT_USB1 BIT(24)
-#define QCA955X_EXT_INT_USB2 BIT(28)
-
-#define QCA955X_EXT_INT_WMAC_ALL \
- (QCA955X_EXT_INT_WMAC_MISC | QCA955X_EXT_INT_WMAC_TX | \
- QCA955X_EXT_INT_WMAC_RXLP | QCA955X_EXT_INT_WMAC_RXHP)
-
-#define QCA955X_EXT_INT_PCIE_RC1_ALL \
- (QCA955X_EXT_INT_PCIE_RC1 | QCA955X_EXT_INT_PCIE_RC1_INT0 | \
- QCA955X_EXT_INT_PCIE_RC1_INT1 | QCA955X_EXT_INT_PCIE_RC1_INT2 | \
- QCA955X_EXT_INT_PCIE_RC1_INT3)
-
-#define QCA955X_EXT_INT_PCIE_RC2_ALL \
- (QCA955X_EXT_INT_PCIE_RC2 | QCA955X_EXT_INT_PCIE_RC2_INT0 | \
- QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \
- QCA955X_EXT_INT_PCIE_RC2_INT3)
-
-#define REV_ID_MAJOR_MASK 0xfff0
-#define REV_ID_MAJOR_AR71XX 0x00a0
-#define REV_ID_MAJOR_AR913X 0x00b0
-#define REV_ID_MAJOR_AR7240 0x00c0
-#define REV_ID_MAJOR_AR7241 0x0100
-#define REV_ID_MAJOR_AR7242 0x1100
-#define REV_ID_MAJOR_AR9330 0x0110
-#define REV_ID_MAJOR_AR9331 0x1110
-#define REV_ID_MAJOR_AR9341 0x0120
-#define REV_ID_MAJOR_AR9342 0x1120
-#define REV_ID_MAJOR_AR9344 0x2120
-#define REV_ID_MAJOR_QCA9558 0x1130
-
-#define AR71XX_REV_ID_MINOR_MASK 0x3
-#define AR71XX_REV_ID_MINOR_AR7130 0x0
-#define AR71XX_REV_ID_MINOR_AR7141 0x1
-#define AR71XX_REV_ID_MINOR_AR7161 0x2
-#define AR71XX_REV_ID_REVISION_MASK 0x3
-#define AR71XX_REV_ID_REVISION_SHIFT 2
-
-#define AR913X_REV_ID_MINOR_MASK 0x3
-#define AR913X_REV_ID_MINOR_AR9130 0x0
-#define AR913X_REV_ID_MINOR_AR9132 0x1
-#define AR913X_REV_ID_REVISION_MASK 0x3
-#define AR913X_REV_ID_REVISION_SHIFT 2
-
-#define AR933X_REV_ID_REVISION_MASK 0x3
-
-#define AR724X_REV_ID_REVISION_MASK 0x3
-
-#define AR934X_REV_ID_REVISION_MASK 0xf
-
-#define AR944X_REV_ID_REVISION_MASK 0xf
-
-/*
- * SPI block
- */
-#define AR71XX_SPI_REG_FS 0x00 /* Function Select */
-#define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */
-#define AR71XX_SPI_REG_IOC 0x08 /* SPI I/O Control */
-#define AR71XX_SPI_REG_RDS 0x0c /* Read Data Shift */
-
-#define AR71XX_SPI_FS_GPIO BIT(0) /* Enable GPIO mode */
-
-#define AR71XX_SPI_CTRL_RD BIT(6) /* Remap Disable */
-#define AR71XX_SPI_CTRL_DIV_MASK 0x3f
-
-#define AR71XX_SPI_IOC_DO BIT(0) /* Data Out pin */
-#define AR71XX_SPI_IOC_CLK BIT(8) /* CLK pin */
-#define AR71XX_SPI_IOC_CS(n) BIT(16 + (n))
-#define AR71XX_SPI_IOC_CS0 AR71XX_SPI_IOC_CS(0)
-#define AR71XX_SPI_IOC_CS1 AR71XX_SPI_IOC_CS(1)
-#define AR71XX_SPI_IOC_CS2 AR71XX_SPI_IOC_CS(2)
-#define AR71XX_SPI_IOC_CS_ALL (AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1 | \
- AR71XX_SPI_IOC_CS2)
-
-/*
- * GPIO block
- */
-#define AR71XX_GPIO_REG_OE 0x00
-#define AR71XX_GPIO_REG_IN 0x04
-#define AR71XX_GPIO_REG_OUT 0x08
-#define AR71XX_GPIO_REG_SET 0x0c
-#define AR71XX_GPIO_REG_CLEAR 0x10
-#define AR71XX_GPIO_REG_INT_MODE 0x14
-#define AR71XX_GPIO_REG_INT_TYPE 0x18
-#define AR71XX_GPIO_REG_INT_POLARITY 0x1c
-#define AR71XX_GPIO_REG_INT_PENDING 0x20
-#define AR71XX_GPIO_REG_INT_ENABLE 0x24
-#define AR71XX_GPIO_REG_FUNC 0x28
-
-#define AR934X_GPIO_REG_OUT_FUNC0 0x2c
-#define AR934X_GPIO_REG_OUT_FUNC1 0x30
-#define AR934X_GPIO_REG_OUT_FUNC2 0x34
-#define AR934X_GPIO_REG_OUT_FUNC3 0x38
-#define AR934X_GPIO_REG_OUT_FUNC4 0x3c
-#define AR934X_GPIO_REG_OUT_FUNC5 0x40
-#define AR934X_GPIO_REG_FUNC 0x6c
-
-#define AR71XX_GPIO_COUNT 16
-#define AR724X_GPIO_COUNT 18
-#define AR913X_GPIO_COUNT 22
-#define AR933X_GPIO_COUNT 30
-#define AR934X_GPIO_COUNT 23
-#define QCA955X_GPIO_COUNT 24
-
-#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
-#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
-#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)
-#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12)
-#define AR71XX_GPIO_FUNC_UART_EN BIT(8)
-#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4)
-#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0)
-
-#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19)
-#define AR724X_GPIO_FUNC_SPI_EN BIT(18)
-#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14)
-#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13)
-#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12)
-#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11)
-#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10)
-#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9)
-#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8)
-#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7)
-#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6)
-#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5)
-#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4)
-#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3)
-#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2)
-#define AR724X_GPIO_FUNC_UART_EN BIT(1)
-#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
-
-#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22)
-#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
-#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20)
-#define AR913X_GPIO_FUNC_I2S_MCKEN BIT(19)
-#define AR913X_GPIO_FUNC_I2S1_EN BIT(18)
-#define AR913X_GPIO_FUNC_I2S0_EN BIT(17)
-#define AR913X_GPIO_FUNC_SLIC_EN BIT(16)
-#define AR913X_GPIO_FUNC_UART_RTSCTS_EN BIT(9)
-#define AR913X_GPIO_FUNC_UART_EN BIT(8)
-#define AR913X_GPIO_FUNC_USB_CLK_EN BIT(4)
-
-#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31)
-#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30)
-#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29)
-#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27)
-#define AR933X_GPIO_FUNC_I2SO_EN BIT(26)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23)
-#define AR933X_GPIO_FUNC_SPI_EN BIT(18)
-#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14)
-#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4)
-#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3)
-#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2)
-#define AR933X_GPIO_FUNC_UART_EN BIT(1)
-#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0)
-
-#define AR934X_GPIO_FUNC_DDR_DQOE_EN BIT(17)
-#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14)
-#define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13)
-
-#define AR934X_GPIO_OUT_GPIO 0x00
-
-/*
- * MII_CTRL block
- */
-#define AR71XX_MII_REG_MII0_CTRL 0x00
-#define AR71XX_MII_REG_MII1_CTRL 0x04
-
-#define AR71XX_MII_CTRL_IF_MASK 3
-#define AR71XX_MII_CTRL_SPEED_SHIFT 4
-#define AR71XX_MII_CTRL_SPEED_MASK 3
-#define AR71XX_MII_CTRL_SPEED_10 0
-#define AR71XX_MII_CTRL_SPEED_100 1
-#define AR71XX_MII_CTRL_SPEED_1000 2
-
-#define AR71XX_MII0_CTRL_IF_GMII 0
-#define AR71XX_MII0_CTRL_IF_MII 1
-#define AR71XX_MII0_CTRL_IF_RGMII 2
-#define AR71XX_MII0_CTRL_IF_RMII 3
-
-#define AR71XX_MII1_CTRL_IF_RGMII 0
-#define AR71XX_MII1_CTRL_IF_RMII 1
-
-/*
- * AR933X GMAC interface
- */
-#define AR933X_GMAC_REG_ETH_CFG 0x00
-
-#define AR933X_ETH_CFG_RGMII_GE0 BIT(0)
-#define AR933X_ETH_CFG_MII_GE0 BIT(1)
-#define AR933X_ETH_CFG_GMII_GE0 BIT(2)
-#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3)
-#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4)
-#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5)
-#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7)
-#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8)
-#define AR933X_ETH_CFG_RMII_GE0 BIT(9)
-#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0
-#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10)
-
-/*
- * AR934X GMAC Interface
- */
-#define AR934X_GMAC_REG_ETH_CFG 0x00
-
-#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0)
-#define AR934X_ETH_CFG_MII_GMAC0 BIT(1)
-#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2)
-#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3)
-#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4)
-#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5)
-#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6)
-#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7)
-#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9)
-#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10)
-#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11)
-#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12)
-#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13)
-
-/*
- * QCA955X GMAC Interface
- */
-
-#define QCA955X_GMAC_REG_ETH_CFG 0x00
-
-#define QCA955X_ETH_CFG_RGMII_GMAC0 BIT(0)
-#define QCA955X_ETH_CFG_SGMII_GMAC0 BIT(6)
-
-#endif /* __ASM_MACH_AR71XX_REGS_H */
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include "config.h"
-#include "ar71xx_regs.h"
-
-#define READREG(r) *(volatile unsigned int *)(r)
-#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
-
-#define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
-
-#define UART_BASE 0xb8020000
-
-#define UART_TX 0
-#define UART_LSR 5
-
-#define UART_LSR_THRE 0x20
-
-#define UART_READ(r) READREG(UART_BASE + 4 * (r))
-#define UART_WRITE(r,v) WRITEREG(UART_BASE + 4 * (r), (v))
-
-void board_putc(int ch)
-{
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
- UART_WRITE(UART_TX, ch);
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
-}
-
-#ifdef CONFIG_BOARD_TL_WR1043ND_V1
-static void tlwr1043nd_init(void)
-{
- unsigned int reg = KSEG1ADDR(AR71XX_RESET_BASE);
- unsigned int t;
-
- t = READREG(reg + AR913X_RESET_REG_RESET_MODULE);
- t |= AR71XX_RESET_GE0_PHY;
- WRITEREG(reg + AR913X_RESET_REG_RESET_MODULE, t);
- /* flush write */
- t = READREG(reg + AR913X_RESET_REG_RESET_MODULE);
-}
-#else
-static inline void tlwr1043nd_init(void) {}
-#endif
-
-void board_init(void)
-{
- tlwr1043nd_init();
-}
+++ /dev/null
-/*
- * Arch specific code for Lantiq based boards
- *
- * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include "config.h"
-
-#define READREG(r) *(volatile unsigned int *)(r)
-#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
-
-#define UART_BASE 0xbe100c00
-#define ASC_TBUF (UART_BASE | 0x20)
-#define ASC_FSTAT (UART_BASE | 0x48)
-
-#define TXMASK 0x3F00
-#define TXOFFSET 8
-
-void board_putc(char c)
-{
- while ((READREG(ASC_FSTAT) & TXMASK) >> TXOFFSET);
-
- WRITEREG(ASC_TBUF, c);
-}
-
-void board_init(void)
-{
-}
+++ /dev/null
-/*
- * Arch specific code for Ralink based boards
- *
- * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include "config.h"
-
-#define READREG(r) *(volatile unsigned int *)(r)
-#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
-
-#define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
-
-#ifdef CONFIG_SOC_RT288X
-#define UART_BASE 0xb0300c00
-#else
-#define UART_BASE 0xb0000c00
-#endif
-
-#define UART_TX 1
-#define UART_LSR 7
-
-#define UART_LSR_THRE 0x20
-
-#define UART_READ(r) READREG(UART_BASE + 4 * (r))
-#define UART_WRITE(r,v) WRITEREG(UART_BASE + 4 * (r), (v))
-
-void board_putc(int ch)
-{
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
- UART_WRITE(UART_TX, ch);
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
-}
-
-void board_init(void)
-{
-}
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * The cache manipulation routine has been taken from the U-Boot project.
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#include "cache.h"
-#include "cacheops.h"
-#include "config.h"
-
-#define cache_op(op,addr) \
- __asm__ __volatile__( \
- " .set push \n" \
- " .set noreorder \n" \
- " .set mips3\n\t \n" \
- " cache %0, %1 \n" \
- " .set pop \n" \
- : \
- : "i" (op), "R" (*(unsigned char *)(addr)))
-
-void flush_cache(unsigned long start_addr, unsigned long size)
-{
- unsigned long lsize = CONFIG_CACHELINE_SIZE;
- unsigned long addr = start_addr & ~(lsize - 1);
- unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
-
- while (1) {
- cache_op(Hit_Writeback_Inv_D, addr);
- cache_op(Hit_Invalidate_I, addr);
- if (addr == aend)
- break;
- addr += lsize;
- }
-}
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#ifndef __CACHE_H
-#define __CACHE_H
-
-void flush_cache(unsigned long start_addr, unsigned long size);
-
-#endif /* __CACHE_H */
+++ /dev/null
-/*
- * Cache operations for the cache instruction.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
- * (C) Copyright 1999 Silicon Graphics, Inc.
- */
-#ifndef __ASM_CACHEOPS_H
-#define __ASM_CACHEOPS_H
-
-/*
- * Cache Operations available on all MIPS processors with R4000-style caches
- */
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-#define Index_Load_Tag_I 0x04
-#define Index_Load_Tag_D 0x05
-#define Index_Store_Tag_I 0x08
-#define Index_Store_Tag_D 0x09
-#if defined(CONFIG_CPU_LOONGSON2)
-#define Hit_Invalidate_I 0x00
-#else
-#define Hit_Invalidate_I 0x10
-#endif
-#define Hit_Invalidate_D 0x11
-#define Hit_Writeback_Inv_D 0x15
-
-/*
- * R4000-specific cacheops
- */
-#define Create_Dirty_Excl_D 0x0d
-#define Fill 0x14
-#define Hit_Writeback_I 0x18
-#define Hit_Writeback_D 0x19
-
-/*
- * R4000SC and R4400SC-specific cacheops
- */
-#define Index_Invalidate_SI 0x02
-#define Index_Writeback_Inv_SD 0x03
-#define Index_Load_Tag_SI 0x06
-#define Index_Load_Tag_SD 0x07
-#define Index_Store_Tag_SI 0x0A
-#define Index_Store_Tag_SD 0x0B
-#define Create_Dirty_Excl_SD 0x0f
-#define Hit_Invalidate_SI 0x12
-#define Hit_Invalidate_SD 0x13
-#define Hit_Writeback_Inv_SD 0x17
-#define Hit_Writeback_SD 0x1b
-#define Hit_Set_Virtual_SI 0x1e
-#define Hit_Set_Virtual_SD 0x1f
-
-/*
- * R5000-specific cacheops
- */
-#define R5K_Page_Invalidate_S 0x17
-
-/*
- * RM7000-specific cacheops
- */
-#define Page_Invalidate_T 0x16
-
-/*
- * R10000-specific cacheops
- *
- * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
- * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
- */
-#define Index_Writeback_Inv_S 0x03
-#define Index_Load_Tag_S 0x07
-#define Index_Store_Tag_S 0x0B
-#define Hit_Invalidate_S 0x13
-#define Cache_Barrier 0x14
-#define Hit_Writeback_Inv_S 0x17
-#define Index_Load_Data_I 0x18
-#define Index_Load_Data_D 0x19
-#define Index_Load_Data_S 0x1b
-#define Index_Store_Data_I 0x1c
-#define Index_Store_Data_D 0x1d
-#define Index_Store_Data_S 0x1f
-
-#endif /* __ASM_CACHEOPS_H */
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#ifndef _CONFIG_H_
-#define _CONFIG_H_
-
-#ifndef CONFIG_FLASH_OFFS
-#define CONFIG_FLASH_OFFS 0
-#endif
-
-#ifndef CONFIG_FLASH_MAX
-#define CONFIG_FLASH_MAX 0
-#endif
-
-#ifndef CONFIG_FLASH_STEP
-#define CONFIG_FLASH_STEP 0x1000
-#endif
-
-#endif /* _CONFIG_H_ */
+++ /dev/null
-/*
- * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
- *
- * Copyright (C) 2001, Monta Vista Software
- * Author: jsun@mvista.com or jsun@junsun.net
- */
-#ifndef _cp0regdef_h_
-#define _cp0regdef_h_
-
-#define CP0_INDEX $0
-#define CP0_RANDOM $1
-#define CP0_ENTRYLO0 $2
-#define CP0_ENTRYLO1 $3
-#define CP0_CONTEXT $4
-#define CP0_PAGEMASK $5
-#define CP0_WIRED $6
-#define CP0_BADVADDR $8
-#define CP0_COUNT $9
-#define CP0_ENTRYHI $10
-#define CP0_COMPARE $11
-#define CP0_STATUS $12
-#define CP0_CAUSE $13
-#define CP0_EPC $14
-#define CP0_PRID $15
-#define CP0_CONFIG $16
-#define CP0_LLADDR $17
-#define CP0_WATCHLO $18
-#define CP0_WATCHHI $19
-#define CP0_XCONTEXT $20
-#define CP0_FRAMEMASK $21
-#define CP0_DIAGNOSTIC $22
-#define CP0_PERFORMANCE $25
-#define CP0_ECC $26
-#define CP0_CACHEERR $27
-#define CP0_TAGLO $28
-#define CP0_TAGHI $29
-#define CP0_ERROREPC $30
-
-#endif
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * Some parts of this code was based on the OpenWrt specific lzma-loader
- * for the BCM47xx and ADM5120 based boards:
- * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include "cp0regdef.h"
-#include "cacheops.h"
-#include "config.h"
-
-#define KSEG0 0x80000000
-
- .macro ehb
- sll zero, 3
- .endm
-
- .text
-
-LEAF(startup)
- .set noreorder
- .set mips32
-
- mtc0 zero, CP0_WATCHLO # clear watch registers
- mtc0 zero, CP0_WATCHHI
- mtc0 zero, CP0_CAUSE # clear before writing status register
-
- mfc0 t0, CP0_STATUS
- li t1, 0x1000001f
- or t0, t1
- xori t0, 0x1f
- mtc0 t0, CP0_STATUS
- ehb
-
- mtc0 zero, CP0_COUNT
- mtc0 zero, CP0_COMPARE
- ehb
-
- la t0, __reloc_label # get linked address of label
- bal __reloc_label # branch and link to label to
- nop # get actual address
-__reloc_label:
- subu t0, ra, t0 # get reloc_delta
-
- beqz t0, __reloc_done # if delta is 0 we are in the right place
- nop
-
- /* Copy our code to the right place */
- la t1, _code_start # get linked address of _code_start
- la t2, _code_end # get linked address of _code_end
- addu t0, t0, t1 # calculate actual address of _code_start
-
-__reloc_copy:
- lw t3, 0(t0)
- sw t3, 0(t1)
- add t1, 4
- blt t1, t2, __reloc_copy
- add t0, 4
-
- /* flush cache */
- la t0, _code_start
- la t1, _code_end
-
- li t2, ~(CONFIG_CACHELINE_SIZE - 1)
- and t0, t2
- and t1, t2
- li t2, CONFIG_CACHELINE_SIZE
-
- b __flush_check
- nop
-
-__flush_line:
- cache Hit_Writeback_Inv_D, 0(t0)
- cache Hit_Invalidate_I, 0(t0)
- add t0, t2
-
-__flush_check:
- bne t0, t1, __flush_line
- nop
-
- sync
-
-__reloc_done:
-
- /* clear bss */
- la t0, _bss_start
- la t1, _bss_end
- b __bss_check
- nop
-
-__bss_fill:
- sw zero, 0(t0)
- addi t0, 4
-
-__bss_check:
- bne t0, t1, __bss_fill
- nop
-
- /* Setup new "C" stack */
- la sp, _stack
-
- /* reserve stack space for a0-a3 registers */
- subu sp, 16
-
- /* jump to the decompressor routine */
- la t0, loader_main
- jr t0
- nop
-
- .set reorder
-END(startup)
+++ /dev/null
-CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(32 * 1024)" -DCONFIG_CACHELINE_SIZE=32
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * Some parts of this code was based on the OpenWrt specific lzma-loader
- * for the BCM47xx and ADM5120 based boards:
- * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
- * Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * The image_header structure has been taken from the U-Boot project.
- * (C) Copyright 2008 Semihalf
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "config.h"
-#include "cache.h"
-#include "printf.h"
-#include "LzmaDecode.h"
-
-#define AR71XX_FLASH_START 0x1f000000
-#define AR71XX_FLASH_END 0x1fe00000
-
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-
-#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
-
-#undef LZMA_DEBUG
-
-#ifdef LZMA_DEBUG
-# define DBG(f, a...) printf(f, ## a)
-#else
-# define DBG(f, a...) do {} while (0)
-#endif
-
-#define IH_MAGIC_OKLI 0x4f4b4c49 /* 'OKLI' */
-
-#define IH_NMLEN 32 /* Image Name Length */
-
-typedef struct image_header {
- uint32_t ih_magic; /* Image Header Magic Number */
- uint32_t ih_hcrc; /* Image Header CRC Checksum */
- uint32_t ih_time; /* Image Creation Timestamp */
- uint32_t ih_size; /* Image Data Size */
- uint32_t ih_load; /* Data Load Address */
- uint32_t ih_ep; /* Entry Point Address */
- uint32_t ih_dcrc; /* Image Data CRC Checksum */
- uint8_t ih_os; /* Operating System */
- uint8_t ih_arch; /* CPU architecture */
- uint8_t ih_type; /* Image Type */
- uint8_t ih_comp; /* Compression Type */
- uint8_t ih_name[IH_NMLEN]; /* Image Name */
-} image_header_t;
-
-/* beyond the image end, size not known in advance */
-extern unsigned char workspace[];
-extern void board_init(void);
-
-static CLzmaDecoderState lzma_state;
-static unsigned char *lzma_data;
-static unsigned long lzma_datasize;
-static unsigned long lzma_outsize;
-static unsigned long kernel_la;
-
-#ifdef CONFIG_KERNEL_CMDLINE
-#define kernel_argc 1
-static const char kernel_cmdline[] = CONFIG_KERNEL_CMDLINE;
-static const char *kernel_argv[] = {
- kernel_cmdline,
- NULL,
-};
-#endif /* CONFIG_KERNEL_CMDLINE */
-
-static void halt(void)
-{
- printf("\nSystem halted!\n");
- for(;;);
-}
-
-static __inline__ unsigned long get_be32(void *buf)
-{
- unsigned char *p = buf;
-
- return (((unsigned long) p[0] << 24) +
- ((unsigned long) p[1] << 16) +
- ((unsigned long) p[2] << 8) +
- (unsigned long) p[3]);
-}
-
-static __inline__ unsigned char lzma_get_byte(void)
-{
- unsigned char c;
-
- lzma_datasize--;
- c = *lzma_data++;
-
- return c;
-}
-
-static int lzma_init_props(void)
-{
- unsigned char props[LZMA_PROPERTIES_SIZE];
- int res;
- int i;
-
- /* read lzma properties */
- for (i = 0; i < LZMA_PROPERTIES_SIZE; i++)
- props[i] = lzma_get_byte();
-
- /* read the lower half of uncompressed size in the header */
- lzma_outsize = ((SizeT) lzma_get_byte()) +
- ((SizeT) lzma_get_byte() << 8) +
- ((SizeT) lzma_get_byte() << 16) +
- ((SizeT) lzma_get_byte() << 24);
-
- /* skip rest of the header (upper half of uncompressed size) */
- for (i = 0; i < 4; i++)
- lzma_get_byte();
-
- res = LzmaDecodeProperties(&lzma_state.Properties, props,
- LZMA_PROPERTIES_SIZE);
- return res;
-}
-
-static int lzma_decompress(unsigned char *outStream)
-{
- SizeT ip, op;
- int ret;
-
- lzma_state.Probs = (CProb *) workspace;
-
- ret = LzmaDecode(&lzma_state, lzma_data, lzma_datasize, &ip, outStream,
- lzma_outsize, &op);
-
- if (ret != LZMA_RESULT_OK) {
- int i;
-
- DBG("LzmaDecode error %d at %08x, osize:%d ip:%d op:%d\n",
- ret, lzma_data + ip, lzma_outsize, ip, op);
-
- for (i = 0; i < 16; i++)
- DBG("%02x ", lzma_data[ip + i]);
-
- DBG("\n");
- }
-
- return ret;
-}
-
-#if (LZMA_WRAPPER)
-static void lzma_init_data(void)
-{
- extern unsigned char _lzma_data_start[];
- extern unsigned char _lzma_data_end[];
-
- kernel_la = LOADADDR;
- lzma_data = _lzma_data_start;
- lzma_datasize = _lzma_data_end - _lzma_data_start;
-}
-#else
-static void lzma_init_data(void)
-{
- struct image_header *hdr = NULL;
- unsigned char *flash_base;
- unsigned long flash_ofs;
- unsigned long kernel_ofs;
- unsigned long kernel_size;
-
- flash_base = (unsigned char *) KSEG1ADDR(AR71XX_FLASH_START);
-
- printf("Looking for OpenWrt image... ");
-
- for (flash_ofs = CONFIG_FLASH_OFFS;
- flash_ofs <= (CONFIG_FLASH_OFFS + CONFIG_FLASH_MAX);
- flash_ofs += CONFIG_FLASH_STEP) {
- unsigned long magic;
- unsigned char *p;
-
- p = flash_base + flash_ofs;
- magic = get_be32(p);
- if (magic == IH_MAGIC_OKLI) {
- hdr = (struct image_header *) p;
- break;
- }
- }
-
- if (hdr == NULL) {
- printf("not found!\n");
- halt();
- }
-
- printf("found at 0x%08x\n", flash_base + flash_ofs);
-
- kernel_ofs = sizeof(struct image_header);
- kernel_size = get_be32(&hdr->ih_size);
- kernel_la = get_be32(&hdr->ih_load);
-
- lzma_data = flash_base + flash_ofs + kernel_ofs;
- lzma_datasize = kernel_size;
-}
-#endif /* (LZMA_WRAPPER) */
-
-void loader_main(unsigned long reg_a0, unsigned long reg_a1,
- unsigned long reg_a2, unsigned long reg_a3)
-{
- void (*kernel_entry) (unsigned long, unsigned long, unsigned long,
- unsigned long);
- int res;
-
- board_init();
-
- printf("\n\nOpenWrt kernel loader for MIPS based SoC\n");
- printf("Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>\n");
-
- lzma_init_data();
-
- res = lzma_init_props();
- if (res != LZMA_RESULT_OK) {
- printf("Incorrect LZMA stream properties!\n");
- halt();
- }
-
- printf("Decompressing kernel... ");
-
- res = lzma_decompress((unsigned char *) kernel_la);
- if (res != LZMA_RESULT_OK) {
- printf("failed, ");
- switch (res) {
- case LZMA_RESULT_DATA_ERROR:
- printf("data error!\n");
- break;
- default:
- printf("unknown error %d!\n", res);
- }
- halt();
- } else {
- printf("done!\n");
- }
-
- flush_cache(kernel_la, lzma_outsize);
-
- printf("Starting kernel at %08x...\n\n", kernel_la);
-
-#ifdef CONFIG_KERNEL_CMDLINE
- reg_a0 = kernel_argc;
- reg_a1 = (unsigned long) kernel_argv;
- reg_a2 = 0;
- reg_a3 = 0;
-#endif
-
- kernel_entry = (void *) kernel_la;
- kernel_entry(reg_a0, reg_a1, reg_a2, reg_a3);
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .text : {
- _code_start = .;
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.data.lzma)
- }
-
- . = ALIGN(32);
- .data : {
- *(.data)
- *(.data.*)
- . = . + 524288; /* workaround for buggy bootloaders */
- }
-
- . = ALIGN(32);
- _code_end = .;
-
- _bss_start = .;
- .bss : {
- *(.bss)
- *(.bss.*)
- }
-
- . = ALIGN(32);
- _bss_end = .;
-
- . = . + 8192;
- _stack = .;
-
- workspace = .;
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .text : {
- startup = .;
- *(.text)
- *(.text.*)
- *(.data)
- *(.data.*)
- }
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .data.lzma : {
- _lzma_data_start = .;
- *(.data)
- _lzma_data_end = .;
- }
-}
+++ /dev/null
-/*
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include "printf.h"
-
-extern void board_putc(int ch);
-
-/* this is the maximum width for a variable */
-#define LP_MAX_BUF 256
-
-/* macros */
-#define IsDigit(x) ( ((x) >= '0') && ((x) <= '9') )
-#define Ctod(x) ( (x) - '0')
-
-/* forward declaration */
-static int PrintChar(char *, char, int, int);
-static int PrintString(char *, char *, int, int);
-static int PrintNum(char *, unsigned long, int, int, int, int, char, int);
-
-/* private variable */
-static const char theFatalMsg[] = "fatal error in lp_Print!";
-
-/* -*-
- * A low level printf() function.
- */
-static void
-lp_Print(void (*output)(void *, char *, int),
- void * arg,
- char *fmt,
- va_list ap)
-{
-
-#define OUTPUT(arg, s, l) \
- { if (((l) < 0) || ((l) > LP_MAX_BUF)) { \
- (*output)(arg, (char*)theFatalMsg, sizeof(theFatalMsg)-1); for(;;); \
- } else { \
- (*output)(arg, s, l); \
- } \
- }
-
- char buf[LP_MAX_BUF];
-
- char c;
- char *s;
- long int num;
-
- int longFlag;
- int negFlag;
- int width;
- int prec;
- int ladjust;
- char padc;
-
- int length;
-
- for(;;) {
- {
- /* scan for the next '%' */
- char *fmtStart = fmt;
- while ( (*fmt != '\0') && (*fmt != '%')) {
- fmt ++;
- }
-
- /* flush the string found so far */
- OUTPUT(arg, fmtStart, fmt-fmtStart);
-
- /* are we hitting the end? */
- if (*fmt == '\0') break;
- }
-
- /* we found a '%' */
- fmt ++;
-
- /* check for long */
- if (*fmt == 'l') {
- longFlag = 1;
- fmt ++;
- } else {
- longFlag = 0;
- }
-
- /* check for other prefixes */
- width = 0;
- prec = -1;
- ladjust = 0;
- padc = ' ';
-
- if (*fmt == '-') {
- ladjust = 1;
- fmt ++;
- }
-
- if (*fmt == '0') {
- padc = '0';
- fmt++;
- }
-
- if (IsDigit(*fmt)) {
- while (IsDigit(*fmt)) {
- width = 10 * width + Ctod(*fmt++);
- }
- }
-
- if (*fmt == '.') {
- fmt ++;
- if (IsDigit(*fmt)) {
- prec = 0;
- while (IsDigit(*fmt)) {
- prec = prec*10 + Ctod(*fmt++);
- }
- }
- }
-
-
- /* check format flag */
- negFlag = 0;
- switch (*fmt) {
- case 'b':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 2, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'd':
- case 'D':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- if (num < 0) {
- num = - num;
- negFlag = 1;
- }
- length = PrintNum(buf, num, 10, negFlag, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'o':
- case 'O':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 8, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'u':
- case 'U':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 10, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'x':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'X':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 1);
- OUTPUT(arg, buf, length);
- break;
-
- case 'c':
- c = (char)va_arg(ap, int);
- length = PrintChar(buf, c, width, ladjust);
- OUTPUT(arg, buf, length);
- break;
-
- case 's':
- s = (char*)va_arg(ap, char *);
- length = PrintString(buf, s, width, ladjust);
- OUTPUT(arg, buf, length);
- break;
-
- case '\0':
- fmt --;
- break;
-
- default:
- /* output this char as it is */
- OUTPUT(arg, fmt, 1);
- } /* switch (*fmt) */
-
- fmt ++;
- } /* for(;;) */
-
- /* special termination call */
- OUTPUT(arg, "\0", 1);
-}
-
-
-/* --------------- local help functions --------------------- */
-static int
-PrintChar(char * buf, char c, int length, int ladjust)
-{
- int i;
-
- if (length < 1) length = 1;
- if (ladjust) {
- *buf = c;
- for (i=1; i< length; i++) buf[i] = ' ';
- } else {
- for (i=0; i< length-1; i++) buf[i] = ' ';
- buf[length - 1] = c;
- }
- return length;
-}
-
-static int
-PrintString(char * buf, char* s, int length, int ladjust)
-{
- int i;
- int len=0;
- char* s1 = s;
- while (*s1++) len++;
- if (length < len) length = len;
-
- if (ladjust) {
- for (i=0; i< len; i++) buf[i] = s[i];
- for (i=len; i< length; i++) buf[i] = ' ';
- } else {
- for (i=0; i< length-len; i++) buf[i] = ' ';
- for (i=length-len; i < length; i++) buf[i] = s[i-length+len];
- }
- return length;
-}
-
-static int
-PrintNum(char * buf, unsigned long u, int base, int negFlag,
- int length, int ladjust, char padc, int upcase)
-{
- /* algorithm :
- * 1. prints the number from left to right in reverse form.
- * 2. fill the remaining spaces with padc if length is longer than
- * the actual length
- * TRICKY : if left adjusted, no "0" padding.
- * if negtive, insert "0" padding between "0" and number.
- * 3. if (!ladjust) we reverse the whole string including paddings
- * 4. otherwise we only reverse the actual string representing the num.
- */
-
- int actualLength =0;
- char *p = buf;
- int i;
-
- do {
- int tmp = u %base;
- if (tmp <= 9) {
- *p++ = '0' + tmp;
- } else if (upcase) {
- *p++ = 'A' + tmp - 10;
- } else {
- *p++ = 'a' + tmp - 10;
- }
- u /= base;
- } while (u != 0);
-
- if (negFlag) {
- *p++ = '-';
- }
-
- /* figure out actual length and adjust the maximum length */
- actualLength = p - buf;
- if (length < actualLength) length = actualLength;
-
- /* add padding */
- if (ladjust) {
- padc = ' ';
- }
- if (negFlag && !ladjust && (padc == '0')) {
- for (i = actualLength-1; i< length-1; i++) buf[i] = padc;
- buf[length -1] = '-';
- } else {
- for (i = actualLength; i< length; i++) buf[i] = padc;
- }
-
-
- /* prepare to reverse the string */
- {
- int begin = 0;
- int end;
- if (ladjust) {
- end = actualLength - 1;
- } else {
- end = length -1;
- }
-
- while (end > begin) {
- char tmp = buf[begin];
- buf[begin] = buf[end];
- buf[end] = tmp;
- begin ++;
- end --;
- }
- }
-
- /* adjust the string pointer */
- return length;
-}
-
-static void printf_output(void *arg, char *s, int l)
-{
- int i;
-
- // special termination call
- if ((l==1) && (s[0] == '\0')) return;
-
- for (i=0; i< l; i++) {
- board_putc(s[i]);
- if (s[i] == '\n') board_putc('\r');
- }
-}
-
-void printf(char *fmt, ...)
-{
- va_list ap;
- va_start(ap, fmt);
- lp_Print(printf_output, 0, fmt, ap);
- va_end(ap);
-}
+++ /dev/null
-/*
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef _printf_h_
-#define _printf_h_
-
-#include <stdarg.h>
-void printf(char *fmt, ...);
-
-#endif /* _printf_h_ */
+++ /dev/null
-CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(16 * 1024)" -DCONFIG_CACHELINE_SIZE=32
projects / openwrt / staging / wigyori.git / commitdiff