ath79: initial gl-ar300m support
authorMarty E. Plummer <hanetzer@startmail.com>
Sun, 27 May 2018 05:37:22 +0000 (00:37 -0500)
committerJohn Crispin <john@phrozen.org>
Mon, 18 Jun 2018 18:29:38 +0000 (20:29 +0200)
Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
target/linux/ath79/base-files/etc/board.d/02_network
target/linux/ath79/dts/qca9533.dtsi [new file with mode: 0644]
target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi [new file with mode: 0644]
target/linux/ath79/dts/qca9533_glinet_ar300m_nor.dts [new file with mode: 0644]
target/linux/ath79/image/generic.mk

index 88cdd4f..bfea621 100755 (executable)
@@ -28,6 +28,11 @@ ath79_setup_interfaces()
        "glinet,ar150")
                ucidef_set_interfaces_lan_wan "eth1" "eth0"
                ;;
+
+       "glinet,ar300m")
+               ucidef_set_interfaces_lan_wan "eth1" "eth0"
+               ;;
+
        "tplink,tl-mr3020-v1")
                ucidef_set_interface_lan "eth0.1"
                ucidef_add_switch "switch0" "0@eth0" "1:lan"
diff --git a/target/linux/ath79/dts/qca9533.dtsi b/target/linux/ath79/dts/qca9533.dtsi
new file mode 100644 (file)
index 0000000..ff1e77e
--- /dev/null
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+       compatible = "qca,qca9533";
+
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "mips,mips24Kc";
+                       clocks = <&pll ATH79_CLK_CPU>;
+                       reg = <0>;
+               };
+       };
+
+       ref: ref {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+       };
+
+       ahb {
+               apb {
+                       ddr_ctrl: memory-controller@18000000 {
+                               compatible = "qca,ar9530-ddr-controller",
+                                               "qca,ar7240-ddr-controller";
+                               reg = <0x18000000 0x128>;
+
+                               #qca,ddr-wb-channel-cells = <1>;
+                       };
+
+                       uart: uart@18020000 {
+                               compatible = "ns16550a";
+                               reg = <0x18020000 0x20>;
+
+                               interrupts = <3>;
+
+                               clocks = <&pll ATH79_CLK_REF>;
+                               clock-names = "uart";
+
+                               reg-io-width = <4>;
+                               reg-shift = <2>;
+                               no-loopback-test;
+
+                               status = "disabled";
+                       };
+
+                       usb_phy: usb-phy@18030000 {
+                               compatible = "qca,ar7200-usb-phy";
+                               reg = <0x18030000 0x100>;
+                               #phy-cells = <0>;
+
+                               reset-names = "usb-phy", "usb-suspend-override";
+                               resets = <&rst 4>, <&rst 3>;
+
+                               status = "disabled";
+                       };
+
+                       gpio: gpio@18040000 {
+                               compatible = "qca,ar9530-gpio",
+                                               "qca,ar9340-gpio";
+                               reg = <0x18040000 0x28>;
+
+                               interrupts = <2>;
+                               ngpios = <20>;
+
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                       };
+
+                       pinmux: pinmux@1804002c {
+                               compatible = "pinctrl-single";
+
+                               reg = <0x1804002c 0x48>;
+
+                               #size-cells = <0>;
+
+                               pinctrl-single,bit-per-mux;
+                               pinctrl-single,register-width = <32>;
+                               pinctrl-single,function-mask = <0x1>;
+                               #pinctrl-cells = <2>;
+
+                               jtag_disable_pins: pinmux_jtag_disable_pins {
+                                       pinctrl-single,bits = <
+                                               0x40 0x2 0x2
+                                               >;
+                               };
+                       };
+
+                       pll: pll-controller@18050000 {
+                               compatible = "qca,qca9530-pll", "syscon";
+                               reg = <0x18050000 0x48>;
+
+                               #clock-cells = <1>;
+                               clocks = <&ref>;
+                               clock-names = "ref";
+                               clock-output-names = "cpu", "ddr", "ahb";
+                       };
+
+                       wdt: wdt@18060008 {
+                               compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
+                               reg = <0x18060008 0x8>;
+
+                               interrupts = <4>;
+
+                               clocks = <&pll ATH79_CLK_AHB>;
+                               clock-names = "wdt";
+                       };
+
+                       rst: reset-controller@1806001c {
+                               compatible = "qca,qca9530-reset",
+                                               "qca,ar7100-reset";
+                               reg = <0x1806001c 0xac>;
+
+                               #reset-cells = <1>;
+
+                               intc2: interrupt-controller@2 {
+                                       compatible = "qcom,qca9556-intc";
+
+                                       interrupts = <2>;
+
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+
+                                       qcom,pending-bits = <0x1f0>,    /* pcie rc1 */
+                                                           <0xf>;      /* wmac */
+                               };
+                       };
+
+                       pcie0: pcie-controller@180c0000 {
+                               compatible = "qcom,ar7240-pci";
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               bus-range = <0x0 0x0>;
+                               reg = <0x180c0000 0x1000>, /* CRP */
+                                     <0x180f0000 0x100>,  /* CTRL */
+                                     <0x14000000 0x1000>; /* CFG */
+                               reg-names = "crp_base", "ctrl_base", "cfg_base";
+                               ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000        /* pci memory */
+                                         0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
+                               interrupt-parent = <&intc2>;
+                               interrupts = <0>;
+
+                               interrupt-controller;
+                               #interrupt-cells = <1>;
+
+                               interrupt-map-mask = <0 0 0 1>;
+                               interrupt-map = <0 0 0 0 &pcie0 0>;
+                               status = "disabled";
+                       };
+
+                       wmac: gmac@18100000 {
+                               compatible = "qca,qca9530-wmac";
+                               reg = <0x18100000 0x230000>;
+
+                               interrupt-parent = <&cpuintc>;
+                               interrupts = <2>;
+
+                               status = "disabled";
+                       };
+               };
+
+               usb0: usb@1b000000 {
+                       compatible = "generic-ehci";
+                       reg = <0x1b000000 0x1000>;
+
+                       interrupts = <3>;
+                       resets = <&rst 5>;
+                       reset-names = "usb-host";
+                       dr_mode = "host";
+
+                       has-transaction-translator;
+                       caps-offset = <0x100>;
+
+                       phy-names = "usb-phy";
+                       phys = <&usb_phy>;
+
+                       status = "disabled";
+               };
+
+               spi: spi@1f000000 {
+                       compatible = "qca,ar9530-spi", "qca,ar7100-spi";
+                       reg = <0x1f000000 0x10>;
+
+                       clocks = <&pll ATH79_CLK_AHB>;
+                       clock-names = "ahb";
+
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+       };
+
+};
+
+&mdio0 {
+       resets = <&rst 22>;
+       reset-names = "mdio";
+};
+
+&eth0 {
+       compatible = "qca,qca9530-eth", "syscon";
+       pll-data = <0x82000101 0x80000101 0x80001313>;
+       reg = <0x19000000 0x200
+               0x18070000 0x4>;
+       pll-reg = <0x4 0x2c 17>;
+       pll-handle = <&pll>;
+
+       reset-names = "mac";
+       resets = <&rst 9>;
+};
+
+
+&mdio1 {
+       resets = <&rst 23>;
+       reset-names = "mdio";
+       builtin-switch;
+};
+
+&eth1 {
+       compatible = "qca,qca9530-eth", "syscon";
+       resets = <&rst 13>;
+       reset-names = "mac";
+};
diff --git a/target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi b/target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi
new file mode 100644 (file)
index 0000000..351d313
--- /dev/null
@@ -0,0 +1,141 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca9533.dtsi"
+
+/ {
+       compatible = "glinet,ar300m", "qca,qca9533";
+       model = "GL.iNet GL-AR300M";
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x8000000>;
+       };
+
+       extosc: ref {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-output-names = "ref";
+               clock-frequency = <25000000>;
+       };
+
+       keys {
+               compatible = "gpio-keys-polled";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               poll-interval = <20>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&jtag_disable_pins>;
+
+               button@0 {
+                       label = "reset";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+               };
+
+               button@1 {
+                       label = "button right";
+                       linux,code = <BTN_0>;
+                       gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+               };
+
+               button@3 {
+                       label = "button left";
+                       linux,code = <BTN_1>;
+                       gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               usb {
+                       label = "gl-ar300m:green:usb";
+                       gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+                       trigger-sources = <&hub_port>;
+                       linux,default-trigger = "usbport";
+               };
+
+               wlan {
+                       label = "gl-ar300m:green:wlan";
+                       gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "phy0tpt";
+               };
+
+               lan {
+                       label = "gl-ar300m:green:lan";
+                       gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+               };
+
+               status {
+                       label = "gl-ar300m:green:status";
+                       gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&uart {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+
+       hub_port: port@1 {
+               reg = <1>;
+               #trigger-soruce-cells = <0>;
+       };
+};
+
+&usb_phy {
+       status = "okay";
+};
+
+&pll {
+       clocks = <&extosc>;
+};
+
+&mdio0 {
+       status = "okay";
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+               phy-mode = "mii";
+       };
+};
+
+&mdio1 {
+       status = "okay";
+};
+
+&eth0 {
+       status = "okay";
+
+       mtd-mac-address = <&art 0x0>;
+       phy-handle = <&phy4>;
+       phy-mode = "mii";
+};
+
+&eth1 {
+       status = "okay";
+
+       mtd-mac-address = <&art 0x6>;
+       phy-mode = "gmii";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&wmac {
+       status = "okay";
+       mtd-cal-data = <&art 0x1000>;
+       mtd-mac-address = <&art 0x1002>;
+};
diff --git a/target/linux/ath79/dts/qca9533_glinet_ar300m_nor.dts b/target/linux/ath79/dts/qca9533_glinet_ar300m_nor.dts
new file mode 100644 (file)
index 0000000..59793dc
--- /dev/null
@@ -0,0 +1,46 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca9533_glinet_ar300m.dtsi"
+
+&spi {
+       status = "okay";
+       num-cs = <0>;
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "winbond,w25q128", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <25000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x000000 0x040000>;
+                               read-only;
+                       };
+
+                       partition@1 {
+                               label = "u-boot-env";
+                               reg = <0x040000 0x010000>;
+                       };
+
+                       partition@2 {
+                               label = "firmware";
+                               reg = <0x050000 0xfa0000>;
+                       };
+
+                       art: partition@3 {
+                               label = "art";
+                               reg = <0xff0000 0x010000>;
+                       };
+               };
+       };
+};
index 16a3c8e..f4ed7b3 100644 (file)
@@ -40,6 +40,15 @@ define Device/glinet_ar150
 endef
 TARGET_DEVICES += glinet_ar150
 
+define Device/glinet_ar300m_nor
+  ATH_SOC := qca9533
+  DEVICE_TITLE := GL.iNet GL-AR300M
+  DEVICE_PACKAGES := kmod-usb-core kmod-usb2
+  IMAGE_SIZE := 16000k
+  SUPPORTED_DEVICES += gl-ar300m
+endef
+TARGET_DEVICES += glinet_ar300m_nor
+
 define Device/openmesh_om5p-ac-v2
   ATH_SOC := qca9558
   DEVICE_TITLE := OpenMesh OM5P-AC v2