From: Daniel Golle <daniel@makrotopia.org>
Date: Tue, 26 Sep 2017 18:05:31 +0000 (+0200)
Subject: sunxi: kernel: add patches for NanoPi NEO
X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fwigyori.git;a=commitdiff_plain;h=333f90347e76e6c0c121c1c7df917780eef8b59e

sunxi: kernel: add patches for NanoPi NEO

Enable dwmac-sun8i Ethernet core to use the built-in FastEthernet port.
Enable exposed UART, USB and I2C pins.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---

diff --git a/target/linux/sunxi/patches-4.9/0080-ARM-dts-sunxi-nanopi-neo-Enable-dwmac-sun8i.patch b/target/linux/sunxi/patches-4.9/0080-ARM-dts-sunxi-nanopi-neo-Enable-dwmac-sun8i.patch
new file mode 100644
index 0000000000..ef65719fe4
--- /dev/null
+++ b/target/linux/sunxi/patches-4.9/0080-ARM-dts-sunxi-nanopi-neo-Enable-dwmac-sun8i.patch
@@ -0,0 +1,26 @@
+Index: linux-4.9.51/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+===================================================================
+--- linux-4.9.51.orig/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
++++ linux-4.9.51/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+@@ -53,6 +53,7 @@
+ 
+ 	aliases {
+ 		serial0 = &uart0;
++		ethernet0 = &emac;
+ 	};
+ 
+ 	chosen {
+@@ -81,6 +82,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/target/linux/sunxi/patches-4.9/0081-ARM-dts-sun8i-nanopi-neo-enable-UART-USB-and-I2C-pin.patch b/target/linux/sunxi/patches-4.9/0081-ARM-dts-sun8i-nanopi-neo-enable-UART-USB-and-I2C-pin.patch
new file mode 100644
index 0000000000..7b57b8a77d
--- /dev/null
+++ b/target/linux/sunxi/patches-4.9/0081-ARM-dts-sun8i-nanopi-neo-enable-UART-USB-and-I2C-pin.patch
@@ -0,0 +1,82 @@
+From e036def69972b9db9d2695f45cbf4e84c707b3c5 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Fri, 23 Dec 2016 07:28:51 +0100
+Subject: [PATCH] ARM: dts: sun8i: nanopi-neo: enable UART, USB and I2C pins
+
+---
+ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 43 ++++++++++++++++++++++++++++---
+ 1 file changed, 40 insertions(+), 3 deletions(-)
+
+Index: linux-4.9.51/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+===================================================================
+--- linux-4.9.51.orig/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
++++ linux-4.9.51/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+@@ -78,10 +78,30 @@
+ 	};
+ };
+ 
++&ehci1 {
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++&ehci2 {
++	status = "okay";
++};
++
++&ohci2 {
++	status = "okay";
++};
++
+ &ehci3 {
+ 	status = "okay";
+ };
+ 
++&ohci3 {
++	status = "okay";
++};
++
+ &emac {
+ 	phy-handle = <&int_mii_phy>;
+ 	phy-mode = "mii";
+@@ -99,9 +119,6 @@
+ 	status = "okay";
+ };
+ 
+-&ohci3 {
+-	status = "okay";
+-};
+ 
+ &pio {
+ 	leds_opc: led-pins {
+@@ -127,7 +144,27 @@
+ 	status = "okay";
+ };
+ 
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_pins>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart2_pins>;
++	status = "okay";
++};
++
+ &usbphy {
+ 	/* USB VBUS is always on */
+ 	status = "okay";
+ };
++
++&i2c0 {
++	status = "okay";
++};
++
++&i2c1 {
++	status = "okay";
++};