package/devel/valgrind/patches/120-mips_fix_soft_float.patch

   1 --- a/VEX/priv/guest_mips_helpers.c
   2 +++ b/VEX/priv/guest_mips_helpers.c
   3 @@ -1201,6 +1201,7 @@ extern UInt mips_dirtyhelper_calculate_F
   4                                                     flt_op inst )
   5  {
   6     UInt ret = 0;
   7 +#ifndef __mips_soft_float
   8  #if defined(__mips__)
   9     VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
  10     UInt loFsVal, hiFsVal, loFtVal, hiFtVal;
  11 @@ -1320,6 +1321,7 @@ extern UInt mips_dirtyhelper_calculate_F
  12           break;
  13     }
  14  #endif
  15 +#endif
  16     return ret;
  17  }
  18
  19 @@ -1329,6 +1331,7 @@ extern UInt mips_dirtyhelper_calculate_F
  20                                                     flt_op inst )
  21  {
  22     UInt ret = 0;
  23 +#ifndef __mips_soft_float
  24  #if defined(__mips__)
  25  #if defined(VGA_mips32)
  26     VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
  27 @@ -1439,6 +1442,7 @@ extern UInt mips_dirtyhelper_calculate_F
  28           break;
  29     }
  30  #endif
  31 +#endif
  32     return ret;
  33  }
  34
  35 --- a/coregrind/m_machine.c
  36 +++ b/coregrind/m_machine.c
  37 @@ -1652,6 +1652,7 @@ Bool VG_(machine_get_hwcaps)( void )
  38          }
  39       }
  40
  41 +#ifndef __mips_soft_float
  42       /* Check if CPU has FPU and 32 dbl. prec. FP registers */
  43       int FIR = 0;
  44       __asm__ __volatile__(
  45 @@ -1661,6 +1662,7 @@ Bool VG_(machine_get_hwcaps)( void )
  46       if (FIR & (1 << FP64)) {
  47          vai.hwcaps |= VEX_PRID_CPU_32FPR;
  48       }
  49 +#endif
  50
  51       VG_(convert_sigaction_fromK_to_toK)(&saved_sigill_act, &tmp_sigill_act);
  52       VG_(sigaction)(VKI_SIGILL, &tmp_sigill_act, NULL);