package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_fw_regs_vr9.h

   1 /******************************************************************************
   2 **
   3 ** FILE NAME    : ifxmips_ptm_fw_regs_vr9.h
   4 ** PROJECT      : UEIP
   5 ** MODULES      : PTM
   6 **
   7 ** DATE         : 7 Jul 2009
   8 ** AUTHOR       : Xu Liang
   9 ** DESCRIPTION  : PTM driver header file (firmware register for VR9)
  10 ** COPYRIGHT    :       Copyright (c) 2006
  11 **                      Infineon Technologies AG
  12 **                      Am Campeon 1-12, 85579 Neubiberg, Germany
  13 **
  14 **    This program is free software; you can redistribute it and/or modify
  15 **    it under the terms of the GNU General Public License as published by
  16 **    the Free Software Foundation; either version 2 of the License, or
  17 **    (at your option) any later version.
  18 **
  19 ** HISTORY
  20 ** $Date        $Author         $Comment
  21 ** 07 JUL 2009  Xu Liang        Init Version
  22 *******************************************************************************/
  23
  24
  25
  26 #ifndef IFXMIPS_PTM_FW_REGS_VR9_H
  27 #define IFXMIPS_PTM_FW_REGS_VR9_H
  28
  29
  30
  31 /*
  32  *  Host-PPE Communication Data Address Mapping
  33  */
  34 #define FW_VER_ID                               ((volatile struct fw_ver_id *)              SB_BUFFER(0x2001))
  35 #define CFG_STD_DATA_LEN                        ((volatile struct cfg_std_data_len *)       SB_BUFFER(0x2011))
  36 #define TX_QOS_CFG                              ((volatile struct tx_qos_cfg *)             SB_BUFFER(0x2012))
  37 #define EG_BWCTRL_CFG                           ((volatile struct eg_bwctrl_cfg *)          SB_BUFFER(0x2013))
  38 #define PSAVE_CFG                               ((volatile struct psave_cfg *)              SB_BUFFER(0x2014))
  39 #define GPIO_ADDR                               SB_BUFFER(0x2019)
  40 #define GPIO_MODE                               ((volatile struct gpio_mode *)              SB_BUFFER(0x201C))
  41 #define GPIO_WM_CFG                             ((volatile struct gpio_wm_cfg *)            SB_BUFFER(0x201D))
  42 #define TEST_MODE                               ((volatile struct test_mode *)              SB_BUFFER(0x201F))
  43 #define WTX_QOS_Q_DESC_CFG(i)                   ((volatile struct wtx_qos_q_desc_cfg *)     SB_BUFFER(0x2FF0 + (i) * 2))    /*  i < 8   */
  44 #define WTX_EG_Q_PORT_SHAPING_CFG(i)            ((volatile struct wtx_eg_q_shaping_cfg *)   SB_BUFFER(0x2680 + (i) * 4))    /*  i < 1   */
  45 #define WTX_EG_Q_SHAPING_CFG(i)                 ((volatile struct wtx_eg_q_shaping_cfg *)   SB_BUFFER(0x2684 + (i) * 4))    /*  i < 8   */
  46 #define TX_QUEUE_CFG(i)                         WTX_EG_Q_PORT_SHAPING_CFG(i)    //  i < 9
  47 #define RX_BC_CFG(i)                            ((volatile struct rx_bc_cfg *)              SB_BUFFER(0x3E80 + (i) * 0x20)) //  i < 2
  48 #define TX_BC_CFG(i)                            ((volatile struct tx_bc_cfg *)              SB_BUFFER(0x3EC0 + (i) * 0x20)) //  i < 2
  49 #define RX_GAMMA_ITF_CFG(i)                     ((volatile struct rx_gamma_itf_cfg *)       SB_BUFFER(0x3D80 + (i) * 0x20)) //  i < 4
  50 #define TX_GAMMA_ITF_CFG(i)                     ((volatile struct tx_gamma_itf_cfg *)       SB_BUFFER(0x3E00 + (i) * 0x20)) //  i < 4
  51 #define WAN_RX_MIB_TABLE(i)                     ((volatile struct wan_rx_mib_table *)       SB_BUFFER(0x5B00 + (i) * 8))    //  i < 4
  52 #define WAN_TX_MIB_TABLE(i)                     ((volatile struct wan_tx_mib_table *)       SB_BUFFER(0x5B20 + (i) * 8))    //  i < 8
  53 #define TX_CTRL_K_TABLE(i)                      SB_BUFFER(0x47F0 + (i)) //  i < 16
  54 //  following MIB for debugging purpose
  55 #define RECEIVE_NON_IDLE_CELL_CNT(i)            SB_BUFFER(5020 + (i))
  56 #define RECEIVE_IDLE_CELL_CNT(i)                SB_BUFFER(5022 + (i))
  57 #define TRANSMIT_CELL_CNT(i)                    SB_BUFFER(5024 + (i))
  58 #define FP_RECEIVE_PKT_CNT                      SB_BUFFER(5026)
  59
  60 #define UTP_CFG                                 SB_BUFFER(0x2018)   //  bit 0~3 - 0x0F: in showtime, 0x00: not in showtime
  61
  62 /*
  63  *  Descriptor Base Address
  64  */
  65 #define CPU_TO_WAN_TX_DESC_BASE                 ((volatile struct tx_descriptor *)SB_BUFFER(0x3D00))
  66 #define __ETH_WAN_TX_QUEUE_NUM                  g_wanqos_en
  67 #define __ETH_WAN_TX_QUEUE_LEN                  ((WAN_TX_DESC_NUM_TOTAL / __ETH_WAN_TX_QUEUE_NUM) < 256 ? (WAN_TX_DESC_NUM_TOTAL / __ETH_WAN_TX_QUEUE_NUM) : 255)
  68 #define __ETH_WAN_TX_DESC_BASE(i)               (0x5C00 + (i) * 2 * __ETH_WAN_TX_QUEUE_LEN)
  69 #define WAN_TX_DESC_BASE(i)                     ((volatile struct tx_descriptor *)SB_BUFFER(__ETH_WAN_TX_DESC_BASE(i))) //  i < __ETH_WAN_TX_QUEUE_NUM, __ETH_WAN_TX_QUEUE_LEN each queue
  70 #define WAN_SWAP_DESC_BASE                      ((volatile struct tx_descriptor *)SB_BUFFER(0x2E80))
  71 #define FASTPATH_TO_WAN_TX_DESC_BASE            ((volatile struct tx_descriptor *)SB_BUFFER(0x2580))
  72 #define DMA_RX_CH1_DESC_BASE                    FASTPATH_TO_WAN_TX_DESC_BASE
  73 #define WAN_RX_DESC_BASE                        ((volatile struct rx_descriptor *)SB_BUFFER(0x2600))
  74 #define DMA_TX_CH1_DESC_BASE                    WAN_RX_DESC_BASE
  75
  76 /*
  77  *  Descriptor Number
  78  */
  79 #define CPU_TO_WAN_TX_DESC_NUM                  64
  80 #define WAN_TX_DESC_NUM                         __ETH_WAN_TX_QUEUE_LEN
  81 #define WAN_SWAP_DESC_NUM                       64
  82 #define WAN_TX_DESC_NUM_TOTAL                   512
  83 #define FASTPATH_TO_WAN_TX_DESC_NUM             64
  84 #define DMA_RX_CH1_DESC_NUM                     FASTPATH_TO_WAN_TX_DESC_NUM
  85 #define WAN_RX_DESC_NUM                         64
  86 #define DMA_TX_CH1_DESC_NUM                     WAN_RX_DESC_NUM
  87
  88
  89
  90 #endif  //  IFXMIPS_PTM_FW_REGS_VR9_H