1ca151412b7677ddef96eb70a0e12690661bc63d
[openwrt/staging/yousong.git] / target / linux / adm5120 / files / arch / mips / adm5120 / boards / mikrotik.c
1 /*
2 * $Id$
3 *
4 * Mikrotik RouterBOARD 1xx series
5 *
6 * Copyright (C) 2007 OpenWrt.org
7 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
8 *
9 * NAND initialization code was based on a driver for Linux 2.6.19+ which
10 * was derived from the driver for Linux 2.4.xx published by Mikrotik for
11 * their RouterBoard 1xx and 5xx series boards.
12 * Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
13 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
14 * The original Mikrotik code seems not to have a license.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version 2
19 * of the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the
28 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
29 * Boston, MA 02110-1301, USA.
30 *
31 */
32
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
36
37 #include <asm/bootinfo.h>
38 #include <asm/gpio.h>
39
40 #include <adm5120_defs.h>
41 #include <adm5120_irq.h>
42 #include <adm5120_nand.h>
43 #include <adm5120_board.h>
44 #include <adm5120_platform.h>
45 #include <adm5120_cf.h>
46 #include <adm5120_info.h>
47 #include <prom/routerboot.h>
48
49 #define RB1XX_NAND_CHIP_DELAY 25
50
51 #define RB150_NAND_BASE 0x1FC80000
52 #define RB150_NAND_SIZE 1
53
54 #define RB150_GPIO_NAND_READY ADM5120_GPIO_PIN0
55 #define RB150_GPIO_NAND_NCE ADM5120_GPIO_PIN1
56 #define RB150_GPIO_NAND_CLE ADM5120_GPIO_P2L2
57 #define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2
58
59 #define RB150_NAND_DELAY 100
60
61 #define RB150_NAND_WRITE(v) \
62 writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
63
64 #define RB153_GPIO_CF_RDY ADM5120_GPIO_P1L1
65 #define RB153_GPIO_CF_WT ADM5120_GPIO_P0L0
66
67 extern struct rb_hard_settings rb_hs;
68
69 /*--------------------------------------------------------------------------*/
70
71 static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
72 PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
73 PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
74 PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
75 };
76
77 static struct mtd_partition rb1xx_nor_parts[] = {
78 {
79 .name = "booter",
80 .offset = 0,
81 .size = 64*1024,
82 .mask_flags = MTD_WRITEABLE,
83 } , {
84 .name = "firmware",
85 .offset = MTDPART_OFS_APPEND,
86 .size = MTDPART_SIZ_FULL,
87 }
88 };
89
90 static struct mtd_partition rb1xx_nand_parts[] = {
91 {
92 .name = "kernel",
93 .offset = 0,
94 .size = 4 * 1024 * 1024,
95 } , {
96 .name = "rootfs",
97 .offset = MTDPART_OFS_NXTBLK,
98 .size = MTDPART_SIZ_FULL
99 }
100 };
101
102 static struct platform_device *rb1xx_devices[] __initdata = {
103 &adm5120_flash0_device,
104 &adm5120_nand_device,
105 };
106
107 /*
108 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
109 * will not be able to find the kernel that we load. So set the oobinfo
110 * when creating the partitions
111 */
112 static struct nand_ecclayout rb1xx_nand_ecclayout = {
113 .eccbytes = 6,
114 .eccpos = { 8, 9, 10, 13, 14, 15 },
115 .oobavail = 9,
116 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
117 };
118
119 static struct resource rb150_nand_resource[] = {
120 [0] = {
121 .start = RB150_NAND_BASE,
122 .end = RB150_NAND_BASE + RB150_NAND_SIZE-1,
123 .flags = IORESOURCE_MEM,
124 },
125 };
126
127 static struct resource rb153_cf_resources[] = {
128 {
129 .name = "cf_membase",
130 .start = ADM5120_EXTIO0_BASE,
131 .end = ADM5120_EXTIO0_BASE + ADM5120_MPMC_SIZE-1 ,
132 .flags = IORESOURCE_MEM
133 }, {
134 .name = "cf_irq",
135 .start = ADM5120_IRQ_GPIO4,
136 .end = ADM5120_IRQ_GPIO4,
137 .flags = IORESOURCE_IRQ
138 }
139 };
140
141 static struct cf_device rb153_cf_data = {
142 .gpio_pin = ADM5120_GPIO_PIN4
143 };
144
145 static struct platform_device rb153_cf_device = {
146 .name = "rb153-cf",
147 .id = -1,
148 .resource = rb153_cf_resources,
149 .num_resources = ARRAY_SIZE(rb153_cf_resources),
150 .dev.platform_data = &rb153_cf_data,
151 };
152
153 static struct platform_device *rb153_devices[] __initdata = {
154 &adm5120_flash0_device,
155 &adm5120_nand_device,
156 &rb153_cf_device,
157 };
158
159 #if 0
160 /*
161 * RB1xx boards have bad network performance with the default VLAN matrixes.
162 * Disable it while the ethernet driver gets fixed.
163 */
164 static unsigned char rb11x_vlans[6] __initdata = {
165 /* FIXME: untested */
166 0x41, 0x00, 0x00, 0x00, 0x00, 0x00
167 };
168
169 static unsigned char rb133_vlans[6] __initdata = {
170 /* FIXME: untested */
171 0x44, 0x42, 0x41, 0x00, 0x00, 0x00
172 };
173
174 static unsigned char rb133c_vlans[6] __initdata = {
175 /* FIXME: untested */
176 0x44, 0x00, 0x00, 0x00, 0x00, 0x00
177 };
178
179 static unsigned char rb15x_vlans[6] __initdata = {
180 /* FIXME: untested */
181 0x41, 0x42, 0x44, 0x48, 0x50, 0x00
182 };
183
184 static unsigned char rb192_vlans[6] __initdata = {
185 /* FIXME: untested */
186 0x41, 0x50, 0x48, 0x44, 0x42, 0x00
187 };
188 #else
189 static unsigned char rb_vlans[6] __initdata = {
190 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
191 };
192 #define rb11x_vlans rb_vlans
193 #define rb133_vlans rb_vlans
194 #define rb133c_vlans rb_vlans
195 #define rb15x_vlans rb_vlans
196 #define rb192_vlans rb_vlans
197 #endif
198
199 /*--------------------------------------------------------------------------*/
200
201 static int rb150_nand_ready(struct mtd_info *mtd)
202 {
203 return gpio_get_value(RB150_GPIO_NAND_READY);
204 }
205
206 static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
207 unsigned int ctrl)
208 {
209 if (ctrl & NAND_CTRL_CHANGE) {
210 gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
211 gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
212 gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
213 }
214
215 udelay(RB150_NAND_DELAY);
216
217 if (cmd != NAND_CMD_NONE)
218 RB150_NAND_WRITE(cmd);
219 }
220
221 /*--------------------------------------------------------------------------*/
222
223 static void __init rb1xx_mac_setup(void)
224 {
225 int i, j;
226
227 for (i = 0; i < rb_hs.mac_count; i++) {
228 for (j = 0; j < RB_MAC_SIZE; j++)
229 adm5120_eth_macs[i][j] = rb_hs.macs[i][j];
230 }
231 }
232
233 static void __init rb1xx_flash_setup(void)
234 {
235 /* setup data for flash0 device */
236 adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
237 adm5120_flash0_data.parts = rb1xx_nor_parts;
238
239 /* setup data for NAND device */
240 adm5120_nand_data.chip.nr_chips = 1;
241 adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_parts);
242 adm5120_nand_data.chip.partitions = rb1xx_nand_parts;
243 adm5120_nand_data.chip.ecclayout = &rb1xx_nand_ecclayout;
244 adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY;
245 adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
246 }
247
248 static void __init rb153_cf_setup(void)
249 {
250 gpio_request(RB153_GPIO_CF_RDY, "cf-ready");
251 gpio_direction_input(RB153_GPIO_CF_RDY);
252 gpio_request(RB153_GPIO_CF_WT, "cf-wait");
253 gpio_direction_output(RB153_GPIO_CF_WT, 1);
254 gpio_direction_input(RB153_GPIO_CF_WT);
255 }
256
257 static void __init rb1xx_setup(void)
258 {
259 /* enable NAND flash interface */
260 adm5120_nand_enable();
261
262 /* initialize NAND chip */
263 adm5120_nand_set_spn(1);
264 adm5120_nand_set_wpn(0);
265
266 rb1xx_flash_setup();
267 rb1xx_mac_setup();
268 }
269
270 static void __init rb150_setup(void)
271 {
272 /* setup GPIO pins for NAND flash chip */
273 gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
274 gpio_direction_input(RB150_GPIO_NAND_READY);
275 gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
276 gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
277 gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
278 gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
279 gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
280 gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
281
282 adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource);
283 adm5120_nand_device.resource = rb150_nand_resource;
284 adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
285 adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready;
286
287 adm5120_flash0_data.window_size = 512*1024;
288
289 rb1xx_flash_setup();
290 rb1xx_mac_setup();
291 }
292
293 static void __init rb153_setup(void)
294 {
295 rb153_cf_setup();
296 rb1xx_setup();
297 }
298
299 /*--------------------------------------------------------------------------*/
300
301 ADM5120_BOARD_START(RB_111, "Mikrotik RouterBOARD 111")
302 .board_setup = rb1xx_setup,
303 .eth_num_ports = 1,
304 .eth_vlans = rb11x_vlans,
305 .num_devices = ARRAY_SIZE(rb1xx_devices),
306 .devices = rb1xx_devices,
307 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
308 .pci_irq_map = rb1xx_pci_irqs,
309 ADM5120_BOARD_END
310
311 ADM5120_BOARD_START(RB_112, "Mikrotik RouterBOARD 112")
312 .board_setup = rb1xx_setup,
313 .eth_num_ports = 1,
314 .eth_vlans = rb11x_vlans,
315 .num_devices = ARRAY_SIZE(rb1xx_devices),
316 .devices = rb1xx_devices,
317 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
318 .pci_irq_map = rb1xx_pci_irqs,
319 ADM5120_BOARD_END
320
321 ADM5120_BOARD_START(RB_133, "Mikrotik RouterBOARD 133")
322 .board_setup = rb1xx_setup,
323 .eth_num_ports = 3,
324 .eth_vlans = rb133_vlans,
325 .num_devices = ARRAY_SIZE(rb1xx_devices),
326 .devices = rb1xx_devices,
327 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
328 .pci_irq_map = rb1xx_pci_irqs,
329 ADM5120_BOARD_END
330
331 ADM5120_BOARD_START(RB_133C, "Mikrotik RouterBOARD 133C")
332 .board_setup = rb1xx_setup,
333 .eth_num_ports = 1,
334 .eth_vlans = rb133c_vlans,
335 .num_devices = ARRAY_SIZE(rb1xx_devices),
336 .devices = rb1xx_devices,
337 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
338 .pci_irq_map = rb1xx_pci_irqs,
339 ADM5120_BOARD_END
340
341 ADM5120_BOARD_START(RB_150, "Mikrotik RouterBOARD 150")
342 .board_setup = rb150_setup,
343 .eth_num_ports = 5,
344 .eth_vlans = rb15x_vlans,
345 .num_devices = ARRAY_SIZE(rb1xx_devices),
346 .devices = rb1xx_devices,
347 ADM5120_BOARD_END
348
349 ADM5120_BOARD_START(RB_153, "Mikrotik RouterBOARD 153")
350 .board_setup = rb153_setup,
351 .eth_num_ports = 5,
352 .eth_vlans = rb15x_vlans,
353 .num_devices = ARRAY_SIZE(rb153_devices),
354 .devices = rb153_devices,
355 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
356 .pci_irq_map = rb1xx_pci_irqs,
357 ADM5120_BOARD_END
358
359 ADM5120_BOARD_START(RB_192, "Mikrotik RouterBOARD 192")
360 .board_setup = rb1xx_setup,
361 .eth_num_ports = 5,
362 .eth_vlans = rb192_vlans,
363 .num_devices = ARRAY_SIZE(rb1xx_devices),
364 .devices = rb1xx_devices,
365 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
366 .pci_irq_map = rb1xx_pci_irqs,
367 ADM5120_BOARD_END