ar71xx: add support for YunCore CPE870
[openwrt/staging/yousong.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-cpe870.c
1 /*
2 * YunCore CPE870 board support
3 *
4 * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/gpio.h>
12 #include <linux/platform_device.h>
13
14 #include <asm/mach-ath79/ath79.h>
15 #include <asm/mach-ath79/ar71xx_regs.h>
16
17 #include "common.h"
18 #include "dev-eth.h"
19 #include "dev-gpio-buttons.h"
20 #include "dev-leds-gpio.h"
21 #include "dev-m25p80.h"
22 #include "dev-usb.h"
23 #include "dev-wmac.h"
24 #include "machtypes.h"
25
26 #define CPE870_GPIO_LED_LINK1 0
27 #define CPE870_GPIO_LED_LINK2 1
28 #define CPE870_GPIO_LED_LINK3 2
29 #define CPE870_GPIO_LED_LINK4 3
30 #define CPE870_GPIO_LED_WLAN 13
31 #define CPE870_GPIO_LED_WAN 19
32 #define CPE870_GPIO_LED_LAN 20
33
34 #define CPE870_GPIO_BTN_RESET 16
35
36 #define CPE870_KEYS_POLL_INTERVAL 20
37 #define CPE870_KEYS_DEBOUNCE_INTERVAL (3 * CPE870_KEYS_POLL_INTERVAL)
38
39 static struct gpio_led cpe870_leds_gpio[] __initdata = {
40 {
41 .name = "cpe870:green:lan",
42 .gpio = CPE870_GPIO_LED_LAN,
43 .active_low = 1,
44 },
45 {
46 .name = "cpe870:green:wan",
47 .gpio = CPE870_GPIO_LED_WAN,
48 .active_low = 1,
49 },
50 {
51 .name = "cpe870:green:wlan",
52 .gpio = CPE870_GPIO_LED_WLAN,
53 .active_low = 1,
54 },
55 {
56 .name = "cpe870:green:link1",
57 .gpio = CPE870_GPIO_LED_LINK1,
58 .active_low = 1,
59 },
60 {
61 .name = "cpe870:green:link2",
62 .gpio = CPE870_GPIO_LED_LINK2,
63 .active_low = 1,
64 },
65 {
66 .name = "cpe870:green:link3",
67 .gpio = CPE870_GPIO_LED_LINK3,
68 .active_low = 1,
69 },
70 {
71 .name = "cpe870:green:link4",
72 .gpio = CPE870_GPIO_LED_LINK4,
73 .active_low = 1,
74 },
75 };
76
77 static struct gpio_keys_button cpe870_gpio_keys[] __initdata = {
78 {
79 .desc = "reset",
80 .type = EV_KEY,
81 .code = KEY_RESTART,
82 .debounce_interval = CPE870_KEYS_DEBOUNCE_INTERVAL,
83 .gpio = CPE870_GPIO_BTN_RESET,
84 .active_low = 1,
85 },
86 };
87
88 static void __init cpe870_gpio_setup(void)
89 {
90 /* Disable JTAG (enables GPIO0-3) */
91 ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
92
93 ath79_gpio_direction_select(CPE870_GPIO_LED_LINK1, true);
94 ath79_gpio_direction_select(CPE870_GPIO_LED_LINK2, true);
95 ath79_gpio_direction_select(CPE870_GPIO_LED_LINK3, true);
96 ath79_gpio_direction_select(CPE870_GPIO_LED_LINK4, true);
97
98 /* Mute LEDs on boot */
99 gpio_set_value(CPE870_GPIO_LED_LAN, 1);
100 gpio_set_value(CPE870_GPIO_LED_WAN, 1);
101 gpio_set_value(CPE870_GPIO_LED_LINK1, 1);
102 gpio_set_value(CPE870_GPIO_LED_LINK2, 1);
103 gpio_set_value(CPE870_GPIO_LED_LINK3, 1);
104 gpio_set_value(CPE870_GPIO_LED_LINK4, 1);
105
106 ath79_gpio_output_select(CPE870_GPIO_LED_LINK1, 0);
107 ath79_gpio_output_select(CPE870_GPIO_LED_LINK2, 0);
108 ath79_gpio_output_select(CPE870_GPIO_LED_LINK3, 0);
109 ath79_gpio_output_select(CPE870_GPIO_LED_LINK4, 0);
110
111 ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe870_leds_gpio),
112 cpe870_leds_gpio);
113
114 ath79_register_gpio_keys_polled(-1, CPE870_KEYS_POLL_INTERVAL,
115 ARRAY_SIZE(cpe870_gpio_keys),
116 cpe870_gpio_keys);
117 }
118
119 static void __init cpe870_setup(void)
120 {
121 u8 *art = (u8 *) KSEG1ADDR(0x1fff1000);
122 u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
123
124 ath79_register_m25p80(NULL);
125
126 cpe870_gpio_setup();
127
128 ath79_register_mdio(1, 0x0);
129
130 ath79_switch_data.phy4_mii_en = 1;
131 ath79_switch_data.phy_poll_mask = BIT(4);
132
133 /* LAN */
134 ath79_eth1_data.duplex = DUPLEX_FULL;
135 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
136 ath79_eth1_data.speed = SPEED_1000;
137 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
138 ath79_register_eth(1);
139
140 /* WAN */
141 ath79_eth0_data.duplex = DUPLEX_FULL;
142 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
143 ath79_eth0_data.speed = SPEED_100;
144 ath79_eth0_data.phy_mask = BIT(4);
145 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
146 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
147 ath79_register_eth(0);
148
149 ath79_register_wmac(art, NULL);
150 }
151
152 MIPS_MACHINE(ATH79_MACH_CPE870, "CPE870", "YunCore CPE870", cpe870_setup);