target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c

   1 /*
   2  *  MikroTik SPI-NOR RouterBOARDs support
   3  *
   4  *  - MikroTik RouterBOARD mAP L-2nD
   5  *
   6  *  Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License version 2 as published
  10  *  by the Free Software Foundation.
  11  */
  12
  13 #include <linux/platform_device.h>
  14 #include <linux/phy.h>
  15 #include <linux/routerboot.h>
  16 #include <linux/gpio.h>
  17
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/partitions.h>
  20
  21 #include <asm/prom.h>
  22 #include <asm/mach-ath79/ar71xx_regs.h>
  23 #include <asm/mach-ath79/ath79.h>
  24
  25 #include "common.h"
  26 #include "dev-eth.h"
  27 #include "dev-spi.h"
  28 #include "dev-gpio-buttons.h"
  29 #include "dev-leds-gpio.h"
  30 #include "dev-m25p80.h"
  31 #include "dev-usb.h"
  32 #include "dev-wmac.h"
  33 #include "machtypes.h"
  34 #include "routerboot.h"
  35
  36 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
  37 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
  38
  39 #define RBSPI_HAS_USB           BIT(0)
  40 #define RBSPI_HAS_WLAN          BIT(1)
  41 #define RBSPI_HAS_WAN4          BIT(2)  /* has WAN port on PHY4 */
  42
  43 #define RB_ROUTERBOOT_OFFSET    0x0000
  44 #define RB_BIOS_SIZE            0x1000
  45 #define RB_SOFT_CFG_SIZE        0x1000
  46 #define RB_KERNEL_SIZE          (2 * 1024 * 1024)       /* 2MB kernel */
  47
  48 /* Flash partitions indexes */
  49 enum {
  50         RBSPI_PART_RBOOT,
  51         RBSPI_PART_HCONF,
  52         RBSPI_PART_BIOS,
  53         RBSPI_PART_RBOOT2,
  54         RBSPI_PART_SCONF,
  55         RBSPI_PART_KERN,
  56         RBSPI_PART_ROOT,
  57         RBSPI_PARTS
  58 };
  59
  60 static struct mtd_partition rbspi_spi_partitions[RBSPI_PARTS];
  61
  62 /*
  63  * Setup the SPI flash partition table based on initial parsing.
  64  * The kernel can be at any aligned position and have any size.
  65  * The size of the kernel partition is the desired RB_KERNEL_SIZE
  66  * minus the size of the preceding partitions (128KB).
  67  */
  68 static void __init rbspi_init_partitions(const struct rb_info *info)
  69 {
  70         struct mtd_partition *parts = rbspi_spi_partitions;
  71         memset(parts, 0x0, sizeof(*parts));
  72
  73         parts[RBSPI_PART_RBOOT].name = "routerboot";
  74         parts[RBSPI_PART_RBOOT].offset = RB_ROUTERBOOT_OFFSET;
  75         parts[RBSPI_PART_RBOOT].size = info->hard_cfg_offs;
  76         parts[RBSPI_PART_RBOOT].mask_flags = MTD_WRITEABLE;
  77
  78         parts[RBSPI_PART_HCONF].name = "hard_config";
  79         parts[RBSPI_PART_HCONF].offset = info->hard_cfg_offs;
  80         parts[RBSPI_PART_HCONF].size = info->hard_cfg_size;
  81         parts[RBSPI_PART_HCONF].mask_flags = MTD_WRITEABLE;
  82
  83         parts[RBSPI_PART_BIOS].name = "bios";
  84         parts[RBSPI_PART_BIOS].offset = info->hard_cfg_offs
  85                                         + info->hard_cfg_size;
  86         parts[RBSPI_PART_BIOS].size = RB_BIOS_SIZE;
  87         parts[RBSPI_PART_BIOS].mask_flags = MTD_WRITEABLE;
  88
  89         parts[RBSPI_PART_RBOOT2].name = "routerboot2";
  90         parts[RBSPI_PART_RBOOT2].offset = parts[RBSPI_PART_BIOS].offset
  91                                         + RB_BIOS_SIZE;
  92         parts[RBSPI_PART_RBOOT2].size = info->soft_cfg_offs
  93                                         - parts[RBSPI_PART_RBOOT2].offset;
  94         parts[RBSPI_PART_RBOOT2].mask_flags = MTD_WRITEABLE;
  95
  96         parts[RBSPI_PART_SCONF].name = "soft_config";
  97         parts[RBSPI_PART_SCONF].offset = info->soft_cfg_offs;
  98         parts[RBSPI_PART_SCONF].size = RB_SOFT_CFG_SIZE;
  99
 100         parts[RBSPI_PART_KERN].name = "kernel";
 101         parts[RBSPI_PART_KERN].offset = parts[RBSPI_PART_SCONF].offset
 102                                         + parts[RBSPI_PART_SCONF].size;
 103         parts[RBSPI_PART_KERN].size = RB_KERNEL_SIZE
 104                                         - parts[RBSPI_PART_KERN].offset;
 105
 106         parts[RBSPI_PART_ROOT].name = "rootfs";
 107         parts[RBSPI_PART_ROOT].offset = parts[RBSPI_PART_KERN].offset
 108                                         + parts[RBSPI_PART_KERN].size;
 109         parts[RBSPI_PART_ROOT].size = MTDPART_SIZ_FULL;
 110 }
 111
 112 static struct flash_platform_data rbspi_spi_flash_data = {
 113         .parts = rbspi_spi_partitions,
 114         .nr_parts = ARRAY_SIZE(rbspi_spi_partitions),
 115 };
 116
 117 /* Several boards only have a single reset button wired to GPIO 16 */
 118 #define RBSPI_GPIO_BTN_RESET16  16
 119
 120 static struct gpio_keys_button rbspi_gpio_keys_reset16[] __initdata = {
 121         {
 122                 .desc = "Reset button",
 123                 .type = EV_KEY,
 124                 .code = KEY_RESTART,
 125                 .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL,
 126                 .gpio = RBSPI_GPIO_BTN_RESET16,
 127                 .active_low = 1,
 128         },
 129 };
 130
 131 /* RB mAP L-2nD gpios */
 132 #define RBMAPL_GPIO_LED_POWER   17
 133 #define RBMAPL_GPIO_LED_USER    14
 134 #define RBMAPL_GPIO_LED_ETH     4
 135 #define RBMAPL_GPIO_LED_WLAN    11
 136
 137 static struct gpio_led rbmapl_leds[] __initdata = {
 138         {
 139                 .name = "rb:green:power",
 140                 .gpio = RBMAPL_GPIO_LED_POWER,
 141                 .active_low = 0,
 142                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 143         }, {
 144                 .name = "rb:green:user",
 145                 .gpio = RBMAPL_GPIO_LED_USER,
 146                 .active_low = 0,
 147         }, {
 148                 .name = "rb:green:eth",
 149                 .gpio = RBMAPL_GPIO_LED_ETH,
 150                 .active_low = 0,
 151         }, {
 152                 .name = "rb:green:wlan",
 153                 .gpio = RBMAPL_GPIO_LED_WLAN,
 154                 .active_low = 0,
 155         },
 156 };
 157
 158 void __init rbspi_wlan_init(int wmac_offset)
 159 {
 160         char *art_buf;
 161         u8 wlan_mac[ETH_ALEN];
 162
 163         art_buf = rb_get_wlan_data();
 164         if (!art_buf)
 165                 return;
 166
 167         ath79_init_mac(wlan_mac, ath79_mac_base, wmac_offset);
 168         ath79_register_wmac(art_buf + 0x1000, wlan_mac);
 169
 170         kfree(art_buf);
 171 }
 172
 173 /*
 174  * Common platform init routine for all SPI NOR devices.
 175  */
 176 static int __init rbspi_platform_setup(void)
 177 {
 178         const struct rb_info *info;
 179         char buf[64];
 180
 181         info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x20000);
 182         if (!info)
 183                 return -ENODEV;
 184
 185         scnprintf(buf, sizeof(buf), "MikroTik %s",
 186                 (info->board_name) ? info->board_name : "");
 187         mips_set_machine_name(buf);
 188
 189         /* fix partitions based on flash parsing */
 190         rbspi_init_partitions(info);
 191
 192         return 0;
 193 }
 194
 195 /*
 196  * Common peripherals init routine for all SPI NOR devices.
 197  * Sets SPI and USB.
 198  */
 199 static void __init rbspi_peripherals_setup(u32 flags)
 200 {
 201         ath79_register_m25p80(&rbspi_spi_flash_data);
 202
 203         if (flags & RBSPI_HAS_USB)
 204                 ath79_register_usb();
 205 }
 206
 207 /*
 208  * Common network init routine for all SPI NOR devices.
 209  * Sets LAN/WAN/WLAN.
 210  */
 211 static void __init rbspi_network_setup(u32 flags, int gmac1_offset,
 212                                         int wmac_offset)
 213 {
 214         /* for QCA953x that will init mdio1_device/data */
 215         ath79_register_mdio(0, 0x0);
 216
 217         if (flags & RBSPI_HAS_WAN4) {
 218                 ath79_setup_ar934x_eth_cfg(0);
 219
 220                 /* set switch to oper mode 1, PHY4 connected to CPU */
 221                 ath79_switch_data.phy4_mii_en = 1;
 222                 ath79_switch_data.phy_poll_mask |= BIT(4);
 223
 224                 /* init GMAC0 connected to PHY4 at 100M */
 225                 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 226                 ath79_eth0_data.phy_mask = BIT(4);
 227                 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 228                 ath79_register_eth(0);
 229         } else {
 230                 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
 231                  * to the internal switch.
 232                  * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
 233                  * the QCA953x, this works because this configuration bit is
 234                  * the same as the AR934x. There's no equivalent function for
 235                  * QCA953x for now. */
 236                 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
 237         }
 238
 239         /* init GMAC1 */
 240         ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, gmac1_offset);
 241         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 242         ath79_register_eth(1);
 243
 244         if (flags & RBSPI_HAS_WLAN)
 245                 rbspi_wlan_init(wmac_offset);
 246 }
 247
 248 /*
 249  * Init the mAP lite hardware.
 250  * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
 251  * Trying to use GMAC0 in direct mode was unsucessful, so we're
 252  * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
 253  * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
 254  */
 255 static void __init rbmapl_setup(void)
 256 {
 257         u32 flags = RBSPI_HAS_WLAN;
 258
 259         if (rbspi_platform_setup())
 260                 return;
 261
 262         rbspi_peripherals_setup(flags);
 263
 264         /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
 265         rbspi_network_setup(flags, 0, 1);
 266
 267         ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds), rbmapl_leds);
 268
 269         /* mAP lite has a single reset button as gpio 16 */
 270         ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
 271                                         ARRAY_SIZE(rbspi_gpio_keys_reset16),
 272                                         rbspi_gpio_keys_reset16);
 273
 274         /* clear internal multiplexing */
 275         ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO);
 276         ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO);
 277 }
 278
 279 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);