ar71xx: provide support for RB-941-2nD via mach-rbspi.c
[openwrt/staging/yousong.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rbspi.c
1 /*
2 * MikroTik SPI-NOR RouterBOARDs support
3 *
4 * - MikroTik RouterBOARD mAP L-2nD
5 * - MikroTik RouterBOARD 941L-2nD
6 *
7 * Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/platform_device.h>
15 #include <linux/phy.h>
16 #include <linux/routerboot.h>
17 #include <linux/gpio.h>
18
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21
22 #include <asm/prom.h>
23 #include <asm/mach-ath79/ar71xx_regs.h>
24 #include <asm/mach-ath79/ath79.h>
25
26 #include "common.h"
27 #include "dev-eth.h"
28 #include "dev-spi.h"
29 #include "dev-gpio-buttons.h"
30 #include "dev-leds-gpio.h"
31 #include "dev-m25p80.h"
32 #include "dev-usb.h"
33 #include "dev-wmac.h"
34 #include "machtypes.h"
35 #include "routerboot.h"
36
37 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
38 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
39
40 #define RBSPI_HAS_USB BIT(0)
41 #define RBSPI_HAS_WLAN BIT(1)
42 #define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */
43
44 #define RB_ROUTERBOOT_OFFSET 0x0000
45 #define RB_BIOS_SIZE 0x1000
46 #define RB_SOFT_CFG_SIZE 0x1000
47 #define RB_KERNEL_SIZE (2 * 1024 * 1024) /* 2MB kernel */
48
49 /* Flash partitions indexes */
50 enum {
51 RBSPI_PART_RBOOT,
52 RBSPI_PART_HCONF,
53 RBSPI_PART_BIOS,
54 RBSPI_PART_RBOOT2,
55 RBSPI_PART_SCONF,
56 RBSPI_PART_KERN,
57 RBSPI_PART_ROOT,
58 RBSPI_PARTS
59 };
60
61 static struct mtd_partition rbspi_spi_partitions[RBSPI_PARTS];
62
63 /*
64 * Setup the SPI flash partition table based on initial parsing.
65 * The kernel can be at any aligned position and have any size.
66 * The size of the kernel partition is the desired RB_KERNEL_SIZE
67 * minus the size of the preceding partitions (128KB).
68 */
69 static void __init rbspi_init_partitions(const struct rb_info *info)
70 {
71 struct mtd_partition *parts = rbspi_spi_partitions;
72 memset(parts, 0x0, sizeof(*parts));
73
74 parts[RBSPI_PART_RBOOT].name = "routerboot";
75 parts[RBSPI_PART_RBOOT].offset = RB_ROUTERBOOT_OFFSET;
76 parts[RBSPI_PART_RBOOT].size = info->hard_cfg_offs;
77 parts[RBSPI_PART_RBOOT].mask_flags = MTD_WRITEABLE;
78
79 parts[RBSPI_PART_HCONF].name = "hard_config";
80 parts[RBSPI_PART_HCONF].offset = info->hard_cfg_offs;
81 parts[RBSPI_PART_HCONF].size = info->hard_cfg_size;
82 parts[RBSPI_PART_HCONF].mask_flags = MTD_WRITEABLE;
83
84 parts[RBSPI_PART_BIOS].name = "bios";
85 parts[RBSPI_PART_BIOS].offset = info->hard_cfg_offs
86 + info->hard_cfg_size;
87 parts[RBSPI_PART_BIOS].size = RB_BIOS_SIZE;
88 parts[RBSPI_PART_BIOS].mask_flags = MTD_WRITEABLE;
89
90 parts[RBSPI_PART_RBOOT2].name = "routerboot2";
91 parts[RBSPI_PART_RBOOT2].offset = parts[RBSPI_PART_BIOS].offset
92 + RB_BIOS_SIZE;
93 parts[RBSPI_PART_RBOOT2].size = info->soft_cfg_offs
94 - parts[RBSPI_PART_RBOOT2].offset;
95 parts[RBSPI_PART_RBOOT2].mask_flags = MTD_WRITEABLE;
96
97 parts[RBSPI_PART_SCONF].name = "soft_config";
98 parts[RBSPI_PART_SCONF].offset = info->soft_cfg_offs;
99 parts[RBSPI_PART_SCONF].size = RB_SOFT_CFG_SIZE;
100
101 parts[RBSPI_PART_KERN].name = "kernel";
102 parts[RBSPI_PART_KERN].offset = parts[RBSPI_PART_SCONF].offset
103 + parts[RBSPI_PART_SCONF].size;
104 parts[RBSPI_PART_KERN].size = RB_KERNEL_SIZE
105 - parts[RBSPI_PART_KERN].offset;
106
107 parts[RBSPI_PART_ROOT].name = "rootfs";
108 parts[RBSPI_PART_ROOT].offset = parts[RBSPI_PART_KERN].offset
109 + parts[RBSPI_PART_KERN].size;
110 parts[RBSPI_PART_ROOT].size = MTDPART_SIZ_FULL;
111 }
112
113 static struct flash_platform_data rbspi_spi_flash_data = {
114 .parts = rbspi_spi_partitions,
115 .nr_parts = ARRAY_SIZE(rbspi_spi_partitions),
116 };
117
118 /* Several boards only have a single reset button wired to GPIO 16 */
119 #define RBSPI_GPIO_BTN_RESET16 16
120
121 static struct gpio_keys_button rbspi_gpio_keys_reset16[] __initdata = {
122 {
123 .desc = "Reset button",
124 .type = EV_KEY,
125 .code = KEY_RESTART,
126 .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL,
127 .gpio = RBSPI_GPIO_BTN_RESET16,
128 .active_low = 1,
129 },
130 };
131
132 /* RB mAP L-2nD gpios */
133 #define RBMAPL_GPIO_LED_POWER 17
134 #define RBMAPL_GPIO_LED_USER 14
135 #define RBMAPL_GPIO_LED_ETH 4
136 #define RBMAPL_GPIO_LED_WLAN 11
137
138 static struct gpio_led rbmapl_leds[] __initdata = {
139 {
140 .name = "rb:green:power",
141 .gpio = RBMAPL_GPIO_LED_POWER,
142 .active_low = 0,
143 .default_state = LEDS_GPIO_DEFSTATE_ON,
144 }, {
145 .name = "rb:green:user",
146 .gpio = RBMAPL_GPIO_LED_USER,
147 .active_low = 0,
148 }, {
149 .name = "rb:green:eth",
150 .gpio = RBMAPL_GPIO_LED_ETH,
151 .active_low = 0,
152 }, {
153 .name = "rb:green:wlan",
154 .gpio = RBMAPL_GPIO_LED_WLAN,
155 .active_low = 0,
156 },
157 };
158
159 /* RB 941L-2nD gpios */
160 #define RBHAPL_GPIO_LED_USER 14
161 static struct gpio_led rbhapl_leds[] __initdata = {
162 {
163 .name = "rb:green:user",
164 .gpio = RBHAPL_GPIO_LED_USER,
165 .active_low = 1,
166 },
167 };
168
169 void __init rbspi_wlan_init(int wmac_offset)
170 {
171 char *art_buf;
172 u8 wlan_mac[ETH_ALEN];
173
174 art_buf = rb_get_wlan_data();
175 if (!art_buf)
176 return;
177
178 ath79_init_mac(wlan_mac, ath79_mac_base, wmac_offset);
179 ath79_register_wmac(art_buf + 0x1000, wlan_mac);
180
181 kfree(art_buf);
182 }
183
184 /*
185 * Common platform init routine for all SPI NOR devices.
186 */
187 static int __init rbspi_platform_setup(void)
188 {
189 const struct rb_info *info;
190 char buf[64];
191
192 info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x20000);
193 if (!info)
194 return -ENODEV;
195
196 scnprintf(buf, sizeof(buf), "MikroTik %s",
197 (info->board_name) ? info->board_name : "");
198 mips_set_machine_name(buf);
199
200 /* fix partitions based on flash parsing */
201 rbspi_init_partitions(info);
202
203 return 0;
204 }
205
206 /*
207 * Common peripherals init routine for all SPI NOR devices.
208 * Sets SPI and USB.
209 */
210 static void __init rbspi_peripherals_setup(u32 flags)
211 {
212 ath79_register_m25p80(&rbspi_spi_flash_data);
213
214 if (flags & RBSPI_HAS_USB)
215 ath79_register_usb();
216 }
217
218 /*
219 * Common network init routine for all SPI NOR devices.
220 * Sets LAN/WAN/WLAN.
221 */
222 static void __init rbspi_network_setup(u32 flags, int gmac1_offset,
223 int wmac_offset)
224 {
225 /* for QCA953x that will init mdio1_device/data */
226 ath79_register_mdio(0, 0x0);
227
228 if (flags & RBSPI_HAS_WAN4) {
229 ath79_setup_ar934x_eth_cfg(0);
230
231 /* set switch to oper mode 1, PHY4 connected to CPU */
232 ath79_switch_data.phy4_mii_en = 1;
233 ath79_switch_data.phy_poll_mask |= BIT(4);
234
235 /* init GMAC0 connected to PHY4 at 100M */
236 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
237 ath79_eth0_data.phy_mask = BIT(4);
238 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
239 ath79_register_eth(0);
240 } else {
241 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
242 * to the internal switch.
243 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
244 * the QCA953x, this works because this configuration bit is
245 * the same as the AR934x. There's no equivalent function for
246 * QCA953x for now. */
247 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
248 }
249
250 /* init GMAC1 */
251 ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, gmac1_offset);
252 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
253 ath79_register_eth(1);
254
255 if (flags & RBSPI_HAS_WLAN)
256 rbspi_wlan_init(wmac_offset);
257 }
258
259 /*
260 * Init the mAP lite hardware.
261 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
262 * Trying to use GMAC0 in direct mode was unsucessful, so we're
263 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
264 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
265 */
266 static void __init rbmapl_setup(void)
267 {
268 u32 flags = RBSPI_HAS_WLAN;
269
270 if (rbspi_platform_setup())
271 return;
272
273 rbspi_peripherals_setup(flags);
274
275 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
276 rbspi_network_setup(flags, 0, 1);
277
278 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds), rbmapl_leds);
279
280 /* mAP lite has a single reset button as gpio 16 */
281 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
282 ARRAY_SIZE(rbspi_gpio_keys_reset16),
283 rbspi_gpio_keys_reset16);
284
285 /* clear internal multiplexing */
286 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO);
287 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO);
288 }
289
290 /*
291 * Init the hAP lite hardware.
292 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
293 * being assigned to LAN on the casing, and port 1 being assigned
294 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
295 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
296 */
297 static void __init rbhapl_setup(void)
298 {
299 u32 flags = RBSPI_HAS_WLAN;
300
301 if (rbspi_platform_setup())
302 return;
303
304 rbspi_peripherals_setup(flags);
305
306 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 4 */
307 rbspi_network_setup(flags, 0, 4);
308
309 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds), rbhapl_leds);
310
311 /* hAP lite has a single reset button as gpio 16 */
312 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
313 ARRAY_SIZE(rbspi_gpio_keys_reset16),
314 rbspi_gpio_keys_reset16);
315 }
316
317 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);
318 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup);