kernel: update phy drivers for 4.9
[openwrt/staging/yousong.git] / target / linux / generic / files / drivers / net / phy / adm6996.c
1 /*
2 * ADM6996 switch driver
3 *
4 * swconfig interface based on ar8216.c
5 *
6 * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
7 * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
8 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
9 * Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License v2 as published by the
13 * Free Software Foundation
14 */
15
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
18 /*#define DEBUG 1*/
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/gpio.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/mii.h>
35 #include <linux/platform_device.h>
36 #include <linux/platform_data/adm6996-gpio.h>
37 #include <linux/ethtool.h>
38 #include <linux/phy.h>
39 #include <linux/switch.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/uaccess.h>
44 #include "adm6996.h"
45
46 MODULE_DESCRIPTION("Infineon ADM6996 Switch");
47 MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
48 MODULE_LICENSE("GPL");
49
50 static const char * const adm6996_model_name[] =
51 {
52 NULL,
53 "ADM6996FC",
54 "ADM6996M",
55 "ADM6996L"
56 };
57
58 struct adm6996_mib_desc {
59 unsigned int offset;
60 const char *name;
61 };
62
63 struct adm6996_priv {
64 struct switch_dev dev;
65 void *priv;
66
67 u8 eecs;
68 u8 eesk;
69 u8 eedi;
70 u8 eerc;
71
72 enum adm6996_model model;
73
74 bool enable_vlan;
75 bool vlan_enabled; /* Current hardware state */
76
77 #ifdef DEBUG
78 u16 addr; /* Debugging: register address to operate on */
79 #endif
80
81 u16 pvid[ADM_NUM_PORTS]; /* Primary VLAN ID */
82 u8 tagged_ports;
83
84 u16 vlan_id[ADM_NUM_VLANS];
85 u8 vlan_table[ADM_NUM_VLANS]; /* bitmap, 1 = port is member */
86 u8 vlan_tagged[ADM_NUM_VLANS]; /* bitmap, 1 = tagged member */
87
88 struct mutex mib_lock;
89 char buf[2048];
90
91 struct mutex reg_mutex;
92
93 /* use abstraction for regops, we want to add gpio support in the future */
94 u16 (*read)(struct adm6996_priv *priv, enum admreg reg);
95 void (*write)(struct adm6996_priv *priv, enum admreg reg, u16 val);
96 };
97
98 #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
99 #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
100
101 #define MIB_DESC(_o, _n) \
102 { \
103 .offset = (_o), \
104 .name = (_n), \
105 }
106
107 static const struct adm6996_mib_desc adm6996_mibs[] = {
108 MIB_DESC(ADM_CL0, "RxPacket"),
109 MIB_DESC(ADM_CL6, "RxByte"),
110 MIB_DESC(ADM_CL12, "TxPacket"),
111 MIB_DESC(ADM_CL18, "TxByte"),
112 MIB_DESC(ADM_CL24, "Collision"),
113 MIB_DESC(ADM_CL30, "Error"),
114 };
115
116 static inline u16
117 r16(struct adm6996_priv *priv, enum admreg reg)
118 {
119 return priv->read(priv, reg);
120 }
121
122 static inline void
123 w16(struct adm6996_priv *priv, enum admreg reg, u16 val)
124 {
125 priv->write(priv, reg, val);
126 }
127
128 /* Minimum timing constants */
129 #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
130 #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
131 #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
132
133 static void adm6996_gpio_write(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
134 {
135 int i, len = (bits + 7) / 8;
136 u8 mask;
137
138 gpio_set_value(priv->eecs, cs);
139 udelay(EECK_EDGE_TIME);
140
141 /* Byte assemble from MSB to LSB */
142 for (i = 0; i < len; i++) {
143 /* Bit bang from MSB to LSB */
144 for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
145 /* Clock low */
146 gpio_set_value(priv->eesk, 0);
147 udelay(EECK_EDGE_TIME);
148
149 /* Output on rising edge */
150 gpio_set_value(priv->eedi, (mask & buf[i]));
151 udelay(EEDI_SETUP_TIME);
152
153 /* Clock high */
154 gpio_set_value(priv->eesk, 1);
155 udelay(EECK_EDGE_TIME);
156 }
157 }
158
159 /* Clock low */
160 gpio_set_value(priv->eesk, 0);
161 udelay(EECK_EDGE_TIME);
162
163 if (cs)
164 gpio_set_value(priv->eecs, 0);
165 }
166
167 static void adm6996_gpio_read(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
168 {
169 int i, len = (bits + 7) / 8;
170 u8 mask;
171
172 gpio_set_value(priv->eecs, cs);
173 udelay(EECK_EDGE_TIME);
174
175 /* Byte assemble from MSB to LSB */
176 for (i = 0; i < len; i++) {
177 u8 byte;
178
179 /* Bit bang from MSB to LSB */
180 for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
181 u8 gp;
182
183 /* Clock low */
184 gpio_set_value(priv->eesk, 0);
185 udelay(EECK_EDGE_TIME);
186
187 /* Input on rising edge */
188 gp = gpio_get_value(priv->eedi);
189 if (gp)
190 byte |= mask;
191
192 /* Clock high */
193 gpio_set_value(priv->eesk, 1);
194 udelay(EECK_EDGE_TIME);
195 }
196
197 *buf++ = byte;
198 }
199
200 /* Clock low */
201 gpio_set_value(priv->eesk, 0);
202 udelay(EECK_EDGE_TIME);
203
204 if (cs)
205 gpio_set_value(priv->eecs, 0);
206 }
207
208 /* Advance clock(s) */
209 static void adm6996_gpio_adclk(struct adm6996_priv *priv, int clocks)
210 {
211 int i;
212 for (i = 0; i < clocks; i++) {
213 /* Clock high */
214 gpio_set_value(priv->eesk, 1);
215 udelay(EECK_EDGE_TIME);
216
217 /* Clock low */
218 gpio_set_value(priv->eesk, 0);
219 udelay(EECK_EDGE_TIME);
220 }
221 }
222
223 static u16
224 adm6996_read_gpio_reg(struct adm6996_priv *priv, enum admreg reg)
225 {
226 /* cmd: 01 10 T DD R RRRRRR */
227 u8 bits[6] = {
228 0xFF, 0xFF, 0xFF, 0xFF,
229 (0x06 << 4) | ((0 & 0x01) << 3 | (reg&64)>>6),
230 ((reg&63)<<2)
231 };
232
233 u8 rbits[4];
234
235 /* Enable GPIO outputs with all pins to 0 */
236 gpio_direction_output(priv->eecs, 0);
237 gpio_direction_output(priv->eesk, 0);
238 gpio_direction_output(priv->eedi, 0);
239
240 adm6996_gpio_write(priv, 0, bits, 46);
241 gpio_direction_input(priv->eedi);
242 adm6996_gpio_adclk(priv, 2);
243 adm6996_gpio_read(priv, 0, rbits, 32);
244
245 /* Extra clock(s) required per datasheet */
246 adm6996_gpio_adclk(priv, 2);
247
248 /* Disable GPIO outputs */
249 gpio_direction_input(priv->eecs);
250 gpio_direction_input(priv->eesk);
251
252 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
253 return (reg & 0x01 ? (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
254 }
255
256 /* Write chip configuration register */
257 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
258 static void
259 adm6996_write_gpio_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
260 {
261 /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
262 u8 bits[4] = {
263 (0x05 << 5) | (reg >> 3),
264 (reg << 5) | (u8)(val >> 11),
265 (u8)(val >> 3),
266 (u8)(val << 5)
267 };
268
269 /* Enable GPIO outputs with all pins to 0 */
270 gpio_direction_output(priv->eecs, 0);
271 gpio_direction_output(priv->eesk, 0);
272 gpio_direction_output(priv->eedi, 0);
273
274 /* Write cmd. Total 27 bits */
275 adm6996_gpio_write(priv, 1, bits, 27);
276
277 /* Extra clock(s) required per datasheet */
278 adm6996_gpio_adclk(priv, 2);
279
280 /* Disable GPIO outputs */
281 gpio_direction_input(priv->eecs);
282 gpio_direction_input(priv->eesk);
283 gpio_direction_input(priv->eedi);
284 }
285
286 static u16
287 adm6996_read_mii_reg(struct adm6996_priv *priv, enum admreg reg)
288 {
289 struct phy_device *phydev = priv->priv;
290 struct mii_bus *bus = phydev->mdio.bus;
291
292 return bus->read(bus, PHYADDR(reg));
293 }
294
295 static void
296 adm6996_write_mii_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
297 {
298 struct phy_device *phydev = priv->priv;
299 struct mii_bus *bus = phydev->mdio.bus;
300
301 bus->write(bus, PHYADDR(reg), val);
302 }
303
304 static int
305 adm6996_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
306 struct switch_val *val)
307 {
308 struct adm6996_priv *priv = to_adm(dev);
309
310 if (val->value.i > 1)
311 return -EINVAL;
312
313 priv->enable_vlan = val->value.i;
314
315 return 0;
316 };
317
318 static int
319 adm6996_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
320 struct switch_val *val)
321 {
322 struct adm6996_priv *priv = to_adm(dev);
323
324 val->value.i = priv->enable_vlan;
325
326 return 0;
327 };
328
329 #ifdef DEBUG
330
331 static int
332 adm6996_set_addr(struct switch_dev *dev, const struct switch_attr *attr,
333 struct switch_val *val)
334 {
335 struct adm6996_priv *priv = to_adm(dev);
336
337 if (val->value.i > 1023)
338 return -EINVAL;
339
340 priv->addr = val->value.i;
341
342 return 0;
343 };
344
345 static int
346 adm6996_get_addr(struct switch_dev *dev, const struct switch_attr *attr,
347 struct switch_val *val)
348 {
349 struct adm6996_priv *priv = to_adm(dev);
350
351 val->value.i = priv->addr;
352
353 return 0;
354 };
355
356 static int
357 adm6996_set_data(struct switch_dev *dev, const struct switch_attr *attr,
358 struct switch_val *val)
359 {
360 struct adm6996_priv *priv = to_adm(dev);
361
362 if (val->value.i > 65535)
363 return -EINVAL;
364
365 w16(priv, priv->addr, val->value.i);
366
367 return 0;
368 };
369
370 static int
371 adm6996_get_data(struct switch_dev *dev, const struct switch_attr *attr,
372 struct switch_val *val)
373 {
374 struct adm6996_priv *priv = to_adm(dev);
375
376 val->value.i = r16(priv, priv->addr);
377
378 return 0;
379 };
380
381 #endif /* def DEBUG */
382
383 static int
384 adm6996_set_pvid(struct switch_dev *dev, int port, int vlan)
385 {
386 struct adm6996_priv *priv = to_adm(dev);
387
388 pr_devel("set_pvid port %d vlan %d\n", port, vlan);
389
390 if (vlan > ADM_VLAN_MAX_ID)
391 return -EINVAL;
392
393 priv->pvid[port] = vlan;
394
395 return 0;
396 }
397
398 static int
399 adm6996_get_pvid(struct switch_dev *dev, int port, int *vlan)
400 {
401 struct adm6996_priv *priv = to_adm(dev);
402
403 pr_devel("get_pvid port %d\n", port);
404 *vlan = priv->pvid[port];
405
406 return 0;
407 }
408
409 static int
410 adm6996_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
411 struct switch_val *val)
412 {
413 struct adm6996_priv *priv = to_adm(dev);
414
415 pr_devel("set_vid port %d vid %d\n", val->port_vlan, val->value.i);
416
417 if (val->value.i > ADM_VLAN_MAX_ID)
418 return -EINVAL;
419
420 priv->vlan_id[val->port_vlan] = val->value.i;
421
422 return 0;
423 };
424
425 static int
426 adm6996_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
427 struct switch_val *val)
428 {
429 struct adm6996_priv *priv = to_adm(dev);
430
431 pr_devel("get_vid port %d\n", val->port_vlan);
432
433 val->value.i = priv->vlan_id[val->port_vlan];
434
435 return 0;
436 };
437
438 static int
439 adm6996_get_ports(struct switch_dev *dev, struct switch_val *val)
440 {
441 struct adm6996_priv *priv = to_adm(dev);
442 u8 ports = priv->vlan_table[val->port_vlan];
443 u8 tagged = priv->vlan_tagged[val->port_vlan];
444 int i;
445
446 pr_devel("get_ports port_vlan %d\n", val->port_vlan);
447
448 val->len = 0;
449
450 for (i = 0; i < ADM_NUM_PORTS; i++) {
451 struct switch_port *p;
452
453 if (!(ports & (1 << i)))
454 continue;
455
456 p = &val->value.ports[val->len++];
457 p->id = i;
458 if (tagged & (1 << i))
459 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
460 else
461 p->flags = 0;
462 }
463
464 return 0;
465 };
466
467 static int
468 adm6996_set_ports(struct switch_dev *dev, struct switch_val *val)
469 {
470 struct adm6996_priv *priv = to_adm(dev);
471 u8 *ports = &priv->vlan_table[val->port_vlan];
472 u8 *tagged = &priv->vlan_tagged[val->port_vlan];
473 int i;
474
475 pr_devel("set_ports port_vlan %d ports", val->port_vlan);
476
477 *ports = 0;
478 *tagged = 0;
479
480 for (i = 0; i < val->len; i++) {
481 struct switch_port *p = &val->value.ports[i];
482
483 #ifdef DEBUG
484 pr_cont(" %d%s", p->id,
485 ((p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ? "T" :
486 ""));
487 #endif
488
489 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
490 *tagged |= (1 << p->id);
491 priv->tagged_ports |= (1 << p->id);
492 }
493
494 *ports |= (1 << p->id);
495 }
496
497 #ifdef DEBUG
498 pr_cont("\n");
499 #endif
500
501 return 0;
502 };
503
504 /*
505 * Precondition: reg_mutex must be held
506 */
507 static void
508 adm6996_enable_vlan(struct adm6996_priv *priv)
509 {
510 u16 reg;
511
512 reg = r16(priv, ADM_OTBE_P2_PVID);
513 reg &= ~(ADM_OTBE_MASK);
514 w16(priv, ADM_OTBE_P2_PVID, reg);
515 reg = r16(priv, ADM_IFNTE);
516 reg &= ~(ADM_IFNTE_MASK);
517 w16(priv, ADM_IFNTE, reg);
518 reg = r16(priv, ADM_VID_CHECK);
519 reg |= ADM_VID_CHECK_MASK;
520 w16(priv, ADM_VID_CHECK, reg);
521 reg = r16(priv, ADM_SYSC0);
522 reg |= ADM_NTTE;
523 reg &= ~(ADM_RVID1);
524 w16(priv, ADM_SYSC0, reg);
525 reg = r16(priv, ADM_SYSC3);
526 reg |= ADM_TBV;
527 w16(priv, ADM_SYSC3, reg);
528 }
529
530 static void
531 adm6996_enable_vlan_6996l(struct adm6996_priv *priv)
532 {
533 u16 reg;
534
535 reg = r16(priv, ADM_SYSC3);
536 reg |= ADM_TBV;
537 reg |= ADM_MAC_CLONE;
538 w16(priv, ADM_SYSC3, reg);
539 }
540
541 /*
542 * Disable VLANs
543 *
544 * Sets VLAN mapping for port-based VLAN with all ports connected to
545 * eachother (this is also the power-on default).
546 *
547 * Precondition: reg_mutex must be held
548 */
549 static void
550 adm6996_disable_vlan(struct adm6996_priv *priv)
551 {
552 u16 reg;
553 int i;
554
555 for (i = 0; i < ADM_NUM_VLANS; i++) {
556 reg = ADM_VLAN_FILT_MEMBER_MASK;
557 w16(priv, ADM_VLAN_FILT_L(i), reg);
558 reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(1);
559 w16(priv, ADM_VLAN_FILT_H(i), reg);
560 }
561
562 reg = r16(priv, ADM_OTBE_P2_PVID);
563 reg |= ADM_OTBE_MASK;
564 w16(priv, ADM_OTBE_P2_PVID, reg);
565 reg = r16(priv, ADM_IFNTE);
566 reg |= ADM_IFNTE_MASK;
567 w16(priv, ADM_IFNTE, reg);
568 reg = r16(priv, ADM_VID_CHECK);
569 reg &= ~(ADM_VID_CHECK_MASK);
570 w16(priv, ADM_VID_CHECK, reg);
571 reg = r16(priv, ADM_SYSC0);
572 reg &= ~(ADM_NTTE);
573 reg |= ADM_RVID1;
574 w16(priv, ADM_SYSC0, reg);
575 reg = r16(priv, ADM_SYSC3);
576 reg &= ~(ADM_TBV);
577 w16(priv, ADM_SYSC3, reg);
578 }
579
580 /*
581 * Disable VLANs
582 *
583 * Sets VLAN mapping for port-based VLAN with all ports connected to
584 * eachother (this is also the power-on default).
585 *
586 * Precondition: reg_mutex must be held
587 */
588 static void
589 adm6996_disable_vlan_6996l(struct adm6996_priv *priv)
590 {
591 u16 reg;
592 int i;
593
594 for (i = 0; i < ADM_NUM_VLANS; i++) {
595 w16(priv, ADM_VLAN_MAP(i), 0);
596 }
597
598 reg = r16(priv, ADM_SYSC3);
599 reg &= ~(ADM_TBV);
600 reg &= ~(ADM_MAC_CLONE);
601 w16(priv, ADM_SYSC3, reg);
602 }
603
604 /*
605 * Precondition: reg_mutex must be held
606 */
607 static void
608 adm6996_apply_port_pvids(struct adm6996_priv *priv)
609 {
610 u16 reg;
611 int i;
612
613 for (i = 0; i < ADM_NUM_PORTS; i++) {
614 reg = r16(priv, adm_portcfg[i]);
615 reg &= ~(ADM_PORTCFG_PVID_MASK);
616 reg |= ADM_PORTCFG_PVID(priv->pvid[i]);
617 if (priv->model == ADM6996L) {
618 if (priv->tagged_ports & (1 << i))
619 reg |= (1 << 4);
620 else
621 reg &= ~(1 << 4);
622 }
623 w16(priv, adm_portcfg[i], reg);
624 }
625
626 w16(priv, ADM_P0_PVID, ADM_P0_PVID_VAL(priv->pvid[0]));
627 w16(priv, ADM_P1_PVID, ADM_P1_PVID_VAL(priv->pvid[1]));
628 reg = r16(priv, ADM_OTBE_P2_PVID);
629 reg &= ~(ADM_P2_PVID_MASK);
630 reg |= ADM_P2_PVID_VAL(priv->pvid[2]);
631 w16(priv, ADM_OTBE_P2_PVID, reg);
632 reg = ADM_P3_PVID_VAL(priv->pvid[3]);
633 reg |= ADM_P4_PVID_VAL(priv->pvid[4]);
634 w16(priv, ADM_P3_P4_PVID, reg);
635 reg = r16(priv, ADM_P5_PVID);
636 reg &= ~(ADM_P2_PVID_MASK);
637 reg |= ADM_P5_PVID_VAL(priv->pvid[5]);
638 w16(priv, ADM_P5_PVID, reg);
639 }
640
641 /*
642 * Precondition: reg_mutex must be held
643 */
644 static void
645 adm6996_apply_vlan_filters(struct adm6996_priv *priv)
646 {
647 u8 ports, tagged;
648 u16 vid, reg;
649 int i;
650
651 for (i = 0; i < ADM_NUM_VLANS; i++) {
652 vid = priv->vlan_id[i];
653 ports = priv->vlan_table[i];
654 tagged = priv->vlan_tagged[i];
655
656 if (ports == 0) {
657 /* Disable VLAN entry */
658 w16(priv, ADM_VLAN_FILT_H(i), 0);
659 w16(priv, ADM_VLAN_FILT_L(i), 0);
660 continue;
661 }
662
663 reg = ADM_VLAN_FILT_MEMBER(ports);
664 reg |= ADM_VLAN_FILT_TAGGED(tagged);
665 w16(priv, ADM_VLAN_FILT_L(i), reg);
666 reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(vid);
667 w16(priv, ADM_VLAN_FILT_H(i), reg);
668 }
669 }
670
671 static void
672 adm6996_apply_vlan_filters_6996l(struct adm6996_priv *priv)
673 {
674 u8 ports;
675 u16 reg;
676 int i;
677
678 for (i = 0; i < ADM_NUM_VLANS; i++) {
679 ports = priv->vlan_table[i];
680
681 if (ports == 0) {
682 /* Disable VLAN entry */
683 w16(priv, ADM_VLAN_MAP(i), 0);
684 continue;
685 } else {
686 reg = ADM_VLAN_FILT(ports);
687 w16(priv, ADM_VLAN_MAP(i), reg);
688 }
689 }
690 }
691
692 static int
693 adm6996_hw_apply(struct switch_dev *dev)
694 {
695 struct adm6996_priv *priv = to_adm(dev);
696
697 pr_devel("hw_apply\n");
698
699 mutex_lock(&priv->reg_mutex);
700
701 if (!priv->enable_vlan) {
702 if (priv->vlan_enabled) {
703 if (priv->model == ADM6996L)
704 adm6996_disable_vlan_6996l(priv);
705 else
706 adm6996_disable_vlan(priv);
707 priv->vlan_enabled = 0;
708 }
709 goto out;
710 }
711
712 if (!priv->vlan_enabled) {
713 if (priv->model == ADM6996L)
714 adm6996_enable_vlan_6996l(priv);
715 else
716 adm6996_enable_vlan(priv);
717 priv->vlan_enabled = 1;
718 }
719
720 adm6996_apply_port_pvids(priv);
721 if (priv->model == ADM6996L)
722 adm6996_apply_vlan_filters_6996l(priv);
723 else
724 adm6996_apply_vlan_filters(priv);
725
726 out:
727 mutex_unlock(&priv->reg_mutex);
728
729 return 0;
730 }
731
732 /*
733 * Reset the switch
734 *
735 * The ADM6996 can't do a software-initiated reset, so we just initialise the
736 * registers we support in this driver.
737 *
738 * Precondition: reg_mutex must be held
739 */
740 static void
741 adm6996_perform_reset (struct adm6996_priv *priv)
742 {
743 int i;
744
745 /* initialize port and vlan settings */
746 for (i = 0; i < ADM_NUM_PORTS - 1; i++) {
747 w16(priv, adm_portcfg[i], ADM_PORTCFG_INIT |
748 ADM_PORTCFG_PVID(0));
749 }
750 w16(priv, adm_portcfg[5], ADM_PORTCFG_CPU);
751
752 if (priv->model == ADM6996M || priv->model == ADM6996FC) {
753 /* reset all PHY ports */
754 for (i = 0; i < ADM_PHY_PORTS; i++) {
755 w16(priv, ADM_PHY_PORT(i), ADM_PHYCFG_INIT);
756 }
757 }
758
759 priv->enable_vlan = 0;
760 priv->vlan_enabled = 0;
761
762 for (i = 0; i < ADM_NUM_PORTS; i++) {
763 priv->pvid[i] = 0;
764 }
765
766 for (i = 0; i < ADM_NUM_VLANS; i++) {
767 priv->vlan_id[i] = i;
768 priv->vlan_table[i] = 0;
769 priv->vlan_tagged[i] = 0;
770 }
771
772 if (priv->model == ADM6996M) {
773 /* Clear VLAN priority map so prio's are unused */
774 w16 (priv, ADM_VLAN_PRIOMAP, 0);
775
776 adm6996_disable_vlan(priv);
777 adm6996_apply_port_pvids(priv);
778 } else if (priv->model == ADM6996L) {
779 /* Clear VLAN priority map so prio's are unused */
780 w16 (priv, ADM_VLAN_PRIOMAP, 0);
781
782 adm6996_disable_vlan_6996l(priv);
783 adm6996_apply_port_pvids(priv);
784 }
785 }
786
787 static int
788 adm6996_reset_switch(struct switch_dev *dev)
789 {
790 struct adm6996_priv *priv = to_adm(dev);
791
792 pr_devel("reset\n");
793
794 mutex_lock(&priv->reg_mutex);
795 adm6996_perform_reset (priv);
796 mutex_unlock(&priv->reg_mutex);
797 return 0;
798 }
799
800 static int
801 adm6996_get_port_link(struct switch_dev *dev, int port,
802 struct switch_port_link *link)
803 {
804 struct adm6996_priv *priv = to_adm(dev);
805
806 u16 reg = 0;
807
808 if (port >= ADM_NUM_PORTS)
809 return -EINVAL;
810
811 switch (port) {
812 case 0:
813 reg = r16(priv, ADM_PS0);
814 break;
815 case 1:
816 reg = r16(priv, ADM_PS0);
817 reg = reg >> 8;
818 break;
819 case 2:
820 reg = r16(priv, ADM_PS1);
821 break;
822 case 3:
823 reg = r16(priv, ADM_PS1);
824 reg = reg >> 8;
825 break;
826 case 4:
827 reg = r16(priv, ADM_PS1);
828 reg = reg >> 12;
829 break;
830 case 5:
831 reg = r16(priv, ADM_PS2);
832 /* Bits 0, 1, 3 and 4. */
833 reg = (reg & 3) | ((reg & 24) >> 1);
834 break;
835 default:
836 return -EINVAL;
837 }
838
839 link->link = reg & ADM_PS_LS;
840 if (!link->link)
841 return 0;
842 link->aneg = true;
843 link->duplex = reg & ADM_PS_DS;
844 link->tx_flow = reg & ADM_PS_FCS;
845 link->rx_flow = reg & ADM_PS_FCS;
846 if (reg & ADM_PS_SS)
847 link->speed = SWITCH_PORT_SPEED_100;
848 else
849 link->speed = SWITCH_PORT_SPEED_10;
850
851 return 0;
852 }
853
854 static int
855 adm6996_sw_get_port_mib(struct switch_dev *dev,
856 const struct switch_attr *attr,
857 struct switch_val *val)
858 {
859 struct adm6996_priv *priv = to_adm(dev);
860 int port;
861 char *buf = priv->buf;
862 int i, len = 0;
863 u32 reg = 0;
864
865 port = val->port_vlan;
866 if (port >= ADM_NUM_PORTS)
867 return -EINVAL;
868
869 mutex_lock(&priv->mib_lock);
870
871 len += snprintf(buf + len, sizeof(priv->buf) - len,
872 "Port %d MIB counters\n",
873 port);
874
875 for (i = 0; i < ARRAY_SIZE(adm6996_mibs); i++) {
876 reg = r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port));
877 reg += r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port) + 1) << 16;
878 len += snprintf(buf + len, sizeof(priv->buf) - len,
879 "%-12s: %u\n",
880 adm6996_mibs[i].name,
881 reg);
882 }
883
884 mutex_unlock(&priv->mib_lock);
885
886 val->value.s = buf;
887 val->len = len;
888
889 return 0;
890 }
891
892 static struct switch_attr adm6996_globals[] = {
893 {
894 .type = SWITCH_TYPE_INT,
895 .name = "enable_vlan",
896 .description = "Enable VLANs",
897 .set = adm6996_set_enable_vlan,
898 .get = adm6996_get_enable_vlan,
899 },
900 #ifdef DEBUG
901 {
902 .type = SWITCH_TYPE_INT,
903 .name = "addr",
904 .description =
905 "Direct register access: set register address (0 - 1023)",
906 .set = adm6996_set_addr,
907 .get = adm6996_get_addr,
908 },
909 {
910 .type = SWITCH_TYPE_INT,
911 .name = "data",
912 .description =
913 "Direct register access: read/write to register (0 - 65535)",
914 .set = adm6996_set_data,
915 .get = adm6996_get_data,
916 },
917 #endif /* def DEBUG */
918 };
919
920 static struct switch_attr adm6996_port[] = {
921 {
922 .type = SWITCH_TYPE_STRING,
923 .name = "mib",
924 .description = "Get port's MIB counters",
925 .set = NULL,
926 .get = adm6996_sw_get_port_mib,
927 },
928 };
929
930 static struct switch_attr adm6996_vlan[] = {
931 {
932 .type = SWITCH_TYPE_INT,
933 .name = "vid",
934 .description = "VLAN ID",
935 .set = adm6996_set_vid,
936 .get = adm6996_get_vid,
937 },
938 };
939
940 static struct switch_dev_ops adm6996_ops = {
941 .attr_global = {
942 .attr = adm6996_globals,
943 .n_attr = ARRAY_SIZE(adm6996_globals),
944 },
945 .attr_port = {
946 .attr = adm6996_port,
947 .n_attr = ARRAY_SIZE(adm6996_port),
948 },
949 .attr_vlan = {
950 .attr = adm6996_vlan,
951 .n_attr = ARRAY_SIZE(adm6996_vlan),
952 },
953 .get_port_pvid = adm6996_get_pvid,
954 .set_port_pvid = adm6996_set_pvid,
955 .get_vlan_ports = adm6996_get_ports,
956 .set_vlan_ports = adm6996_set_ports,
957 .apply_config = adm6996_hw_apply,
958 .reset_switch = adm6996_reset_switch,
959 .get_port_link = adm6996_get_port_link,
960 };
961
962 static int adm6996_switch_init(struct adm6996_priv *priv, const char *alias, struct net_device *netdev)
963 {
964 struct switch_dev *swdev;
965 u16 test, old;
966
967 if (!priv->model) {
968 /* Detect type of chip */
969 old = r16(priv, ADM_VID_CHECK);
970 test = old ^ (1 << 12);
971 w16(priv, ADM_VID_CHECK, test);
972 test ^= r16(priv, ADM_VID_CHECK);
973 if (test & (1 << 12)) {
974 /*
975 * Bit 12 of this register is read-only.
976 * This is the FC model.
977 */
978 priv->model = ADM6996FC;
979 } else {
980 /* Bit 12 is read-write. This is the M model. */
981 priv->model = ADM6996M;
982 w16(priv, ADM_VID_CHECK, old);
983 }
984 }
985
986 swdev = &priv->dev;
987 swdev->name = (adm6996_model_name[priv->model]);
988 swdev->cpu_port = ADM_CPU_PORT;
989 swdev->ports = ADM_NUM_PORTS;
990 swdev->vlans = ADM_NUM_VLANS;
991 swdev->ops = &adm6996_ops;
992 swdev->alias = alias;
993
994 /* The ADM6996L connected through GPIOs does not support any switch
995 status calls */
996 if (priv->model == ADM6996L) {
997 adm6996_ops.attr_port.n_attr = 0;
998 adm6996_ops.get_port_link = NULL;
999 }
1000
1001 pr_info ("%s: %s model PHY found.\n", alias, swdev->name);
1002
1003 mutex_lock(&priv->reg_mutex);
1004 adm6996_perform_reset (priv);
1005 mutex_unlock(&priv->reg_mutex);
1006
1007 if (priv->model == ADM6996M || priv->model == ADM6996L) {
1008 return register_switch(swdev, netdev);
1009 }
1010
1011 return -ENODEV;
1012 }
1013
1014 static int adm6996_config_init(struct phy_device *pdev)
1015 {
1016 struct adm6996_priv *priv;
1017 int ret;
1018
1019 pdev->supported = ADVERTISED_100baseT_Full;
1020 pdev->advertising = ADVERTISED_100baseT_Full;
1021
1022 if (pdev->mdio.addr != 0) {
1023 pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
1024 , pdev->attached_dev->name, pdev->mdio.addr);
1025 return 0;
1026 }
1027
1028 priv = devm_kzalloc(&pdev->mdio.dev, sizeof(struct adm6996_priv), GFP_KERNEL);
1029 if (!priv)
1030 return -ENOMEM;
1031
1032 mutex_init(&priv->reg_mutex);
1033 mutex_init(&priv->mib_lock);
1034 priv->priv = pdev;
1035 priv->read = adm6996_read_mii_reg;
1036 priv->write = adm6996_write_mii_reg;
1037
1038 ret = adm6996_switch_init(priv, pdev->attached_dev->name, pdev->attached_dev);
1039 if (ret < 0)
1040 return ret;
1041
1042 pdev->priv = priv;
1043
1044 return 0;
1045 }
1046
1047 /*
1048 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1049 */
1050 static int adm6996_read_status(struct phy_device *phydev)
1051 {
1052 phydev->speed = SPEED_100;
1053 phydev->duplex = DUPLEX_FULL;
1054 phydev->link = 1;
1055
1056 phydev->state = PHY_RUNNING;
1057 netif_carrier_on(phydev->attached_dev);
1058 phydev->adjust_link(phydev->attached_dev);
1059
1060 return 0;
1061 }
1062
1063 /*
1064 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1065 */
1066 static int adm6996_config_aneg(struct phy_device *phydev)
1067 {
1068 return 0;
1069 }
1070
1071 static int adm6996_fixup(struct phy_device *dev)
1072 {
1073 struct mii_bus *bus = dev->mdio.bus;
1074 u16 reg;
1075
1076 /* Our custom registers are at PHY addresses 0-10. Claim those. */
1077 if (dev->mdio.addr > 10)
1078 return 0;
1079
1080 /* look for the switch on the bus */
1081 reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK;
1082 if (reg != ADM_SIG0_VAL)
1083 return 0;
1084
1085 reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK;
1086 if (reg != ADM_SIG1_VAL)
1087 return 0;
1088
1089 dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL;
1090
1091 return 0;
1092 }
1093
1094 static int adm6996_probe(struct phy_device *pdev)
1095 {
1096 return 0;
1097 }
1098
1099 static void adm6996_remove(struct phy_device *pdev)
1100 {
1101 struct adm6996_priv *priv = phy_to_adm(pdev);
1102
1103 if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
1104 unregister_switch(&priv->dev);
1105 }
1106
1107 static int adm6996_soft_reset(struct phy_device *phydev)
1108 {
1109 /* we don't need an extra reset */
1110 return 0;
1111 }
1112
1113 static struct phy_driver adm6996_phy_driver = {
1114 .name = "Infineon ADM6996",
1115 .phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL,
1116 .phy_id_mask = 0xffffffff,
1117 .features = PHY_BASIC_FEATURES,
1118 .probe = adm6996_probe,
1119 .remove = adm6996_remove,
1120 .config_init = &adm6996_config_init,
1121 .config_aneg = &adm6996_config_aneg,
1122 .read_status = &adm6996_read_status,
1123 .soft_reset = adm6996_soft_reset,
1124 };
1125
1126 static int adm6996_gpio_probe(struct platform_device *pdev)
1127 {
1128 struct adm6996_gpio_platform_data *pdata = pdev->dev.platform_data;
1129 struct adm6996_priv *priv;
1130 int ret;
1131
1132 if (!pdata)
1133 return -EINVAL;
1134
1135 priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
1136 if (!priv)
1137 return -ENOMEM;
1138
1139 mutex_init(&priv->reg_mutex);
1140 mutex_init(&priv->mib_lock);
1141
1142 priv->eecs = pdata->eecs;
1143 priv->eedi = pdata->eedi;
1144 priv->eerc = pdata->eerc;
1145 priv->eesk = pdata->eesk;
1146
1147 priv->model = pdata->model;
1148 priv->read = adm6996_read_gpio_reg;
1149 priv->write = adm6996_write_gpio_reg;
1150
1151 ret = devm_gpio_request(&pdev->dev, priv->eecs, "adm_eecs");
1152 if (ret)
1153 return ret;
1154 ret = devm_gpio_request(&pdev->dev, priv->eedi, "adm_eedi");
1155 if (ret)
1156 return ret;
1157 ret = devm_gpio_request(&pdev->dev, priv->eerc, "adm_eerc");
1158 if (ret)
1159 return ret;
1160 ret = devm_gpio_request(&pdev->dev, priv->eesk, "adm_eesk");
1161 if (ret)
1162 return ret;
1163
1164 ret = adm6996_switch_init(priv, dev_name(&pdev->dev), NULL);
1165 if (ret < 0)
1166 return ret;
1167
1168 platform_set_drvdata(pdev, priv);
1169
1170 return 0;
1171 }
1172
1173 static int adm6996_gpio_remove(struct platform_device *pdev)
1174 {
1175 struct adm6996_priv *priv = platform_get_drvdata(pdev);
1176
1177 if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
1178 unregister_switch(&priv->dev);
1179
1180 return 0;
1181 }
1182
1183 static struct platform_driver adm6996_gpio_driver = {
1184 .probe = adm6996_gpio_probe,
1185 .remove = adm6996_gpio_remove,
1186 .driver = {
1187 .name = "adm6996_gpio",
1188 },
1189 };
1190
1191 static int __init adm6996_init(void)
1192 {
1193 int err;
1194
1195 phy_register_fixup_for_id(PHY_ANY_ID, adm6996_fixup);
1196 err = phy_driver_register(&adm6996_phy_driver, THIS_MODULE);
1197 if (err)
1198 return err;
1199
1200 err = platform_driver_register(&adm6996_gpio_driver);
1201 if (err)
1202 phy_driver_unregister(&adm6996_phy_driver);
1203
1204 return err;
1205 }
1206
1207 static void __exit adm6996_exit(void)
1208 {
1209 platform_driver_unregister(&adm6996_gpio_driver);
1210 phy_driver_unregister(&adm6996_phy_driver);
1211 }
1212
1213 module_init(adm6996_init);
1214 module_exit(adm6996_exit);