ixp4xx: Add support for 4.4 kernel, refresh patches
[openwrt/staging/yousong.git] / target / linux / ixp4xx / patches-4.1 / 120-compex_support.patch
1 From 24025a2dcf1248079dd3019fac6ed955252d277f Mon Sep 17 00:00:00 2001
2 From: Imre Kaloz <kaloz@openwrt.org>
3 Date: Mon, 14 Jul 2008 21:56:34 +0200
4 Subject: [PATCH] Add support for the Compex WP18 / NP18A boards
5
6 Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
7 ---
8
9 --- a/arch/arm/mach-ixp4xx/Kconfig
10 +++ b/arch/arm/mach-ixp4xx/Kconfig
11 @@ -85,6 +85,14 @@ config MACH_SIDEWINDER
12 Engineering Sidewinder board. For more information on this
13 platform, see http://www.adiengineering.com
14
15 +config MACH_COMPEXWP18
16 + bool "Compex WP18 / NP18A"
17 + select PCI
18 + help
19 + Say 'Y' here if you want your kernel to support Compex'
20 + WP18 or NP18A boards. For more information on this
21 + platform, see http://www.compex.com.sg/home/OEM/product_ap.htm
22 +
23 config ARCH_IXDP425
24 bool "IXDP425"
25 help
26 --- a/arch/arm/mach-ixp4xx/Makefile
27 +++ b/arch/arm/mach-ixp4xx/Makefile
28 @@ -21,6 +21,7 @@ obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
29 obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o
30 obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o
31 obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o
32 +obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o
33
34 obj-y += common.o
35
36 @@ -43,6 +44,7 @@ obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_
37 obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o
38 obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o
39 obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o
40 +obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o
41
42 obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
43 obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
44 --- /dev/null
45 +++ b/arch/arm/mach-ixp4xx/compex42x-setup.c
46 @@ -0,0 +1,141 @@
47 +/*
48 + * arch/arm/mach-ixp4xx/compex-setup.c
49 + *
50 + * Compex WP18 / NP18A board-setup
51 + *
52 + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
53 + *
54 + * based on coyote-setup.c:
55 + * Copyright (C) 2003-2005 MontaVista Software, Inc.
56 + *
57 + * Author: Imre Kaloz <Kaloz@openwrt.org>
58 + */
59 +
60 +#include <linux/kernel.h>
61 +#include <linux/serial.h>
62 +#include <linux/serial_8250.h>
63 +#include <linux/dma-mapping.h>
64 +
65 +#include <asm/mach-types.h>
66 +#include <asm/mach/arch.h>
67 +#include <asm/mach/flash.h>
68 +
69 +static struct flash_platform_data compex42x_flash_data = {
70 + .map_name = "cfi_probe",
71 + .width = 2,
72 +};
73 +
74 +static struct resource compex42x_flash_resource = {
75 + .flags = IORESOURCE_MEM,
76 +};
77 +
78 +static struct platform_device compex42x_flash = {
79 + .name = "IXP4XX-Flash",
80 + .id = 0,
81 + .dev = {
82 + .platform_data = &compex42x_flash_data,
83 + },
84 + .num_resources = 1,
85 + .resource = &compex42x_flash_resource,
86 +};
87 +
88 +static struct resource compex42x_uart_resources[] = {
89 + {
90 + .start = IXP4XX_UART1_BASE_PHYS,
91 + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
92 + .flags = IORESOURCE_MEM
93 + },
94 + {
95 + .start = IXP4XX_UART2_BASE_PHYS,
96 + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
97 + .flags = IORESOURCE_MEM
98 + }
99 +};
100 +
101 +static struct plat_serial8250_port compex42x_uart_data[] = {
102 + {
103 + .mapbase = IXP4XX_UART1_BASE_PHYS,
104 + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
105 + .irq = IRQ_IXP4XX_UART1,
106 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
107 + .iotype = UPIO_MEM,
108 + .regshift = 2,
109 + .uartclk = IXP4XX_UART_XTAL,
110 + },
111 + {
112 + .mapbase = IXP4XX_UART2_BASE_PHYS,
113 + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
114 + .irq = IRQ_IXP4XX_UART2,
115 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
116 + .iotype = UPIO_MEM,
117 + .regshift = 2,
118 + .uartclk = IXP4XX_UART_XTAL,
119 + },
120 + { },
121 +};
122 +
123 +static struct platform_device compex42x_uart = {
124 + .name = "serial8250",
125 + .id = PLAT8250_DEV_PLATFORM,
126 + .dev.platform_data = compex42x_uart_data,
127 + .num_resources = 2,
128 + .resource = compex42x_uart_resources,
129 +};
130 +
131 +static struct eth_plat_info compex42x_plat_eth[] = {
132 + {
133 + .phy = IXP4XX_ETH_PHY_MAX_ADDR,
134 + .phy_mask = 0xf0000,
135 + .rxq = 3,
136 + .txreadyq = 20,
137 + }, {
138 + .phy = 3,
139 + .rxq = 4,
140 + .txreadyq = 21,
141 + }
142 +};
143 +
144 +static struct platform_device compex42x_eth[] = {
145 + {
146 + .name = "ixp4xx_eth",
147 + .id = IXP4XX_ETH_NPEB,
148 + .dev.platform_data = compex42x_plat_eth,
149 + .dev.coherent_dma_mask = DMA_BIT_MASK(32),
150 + }, {
151 + .name = "ixp4xx_eth",
152 + .id = IXP4XX_ETH_NPEC,
153 + .dev.platform_data = compex42x_plat_eth + 1,
154 + .dev.coherent_dma_mask = DMA_BIT_MASK(32),
155 + }
156 +};
157 +
158 +static struct platform_device *compex42x_devices[] __initdata = {
159 + &compex42x_flash,
160 + &compex42x_uart,
161 + &compex42x_eth[0],
162 + &compex42x_eth[1],
163 +};
164 +
165 +static void __init compex42x_init(void)
166 +{
167 + ixp4xx_sys_init();
168 +
169 + compex42x_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
170 + compex42x_flash_resource.end =
171 + IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
172 +
173 + platform_add_devices(compex42x_devices, ARRAY_SIZE(compex42x_devices));
174 +}
175 +
176 +MACHINE_START(COMPEXWP18, "Compex WP18 / NP18A")
177 + /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
178 + .map_io = ixp4xx_map_io,
179 + .init_irq = ixp4xx_init_irq,
180 + .init_time = ixp4xx_timer_init,
181 + .atag_offset = 0x0100,
182 + .init_machine = compex42x_init,
183 +#if defined(CONFIG_PCI)
184 + .dma_zone_size = SZ_64M,
185 +#endif
186 + .restart = ixp4xx_restart,
187 +MACHINE_END
188 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
189 +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
190 @@ -69,7 +69,8 @@ struct hw_pci ixdp425_pci __initdata = {
191 int __init ixdp425_pci_init(void)
192 {
193 if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
194 - machine_is_ixdp465() || machine_is_kixrp435())
195 + machine_is_ixdp465() || machine_is_kixrp435() ||
196 + machine_is_compex42x())
197 pci_common_init(&ixdp425_pci);
198 return 0;
199 }