*
* - MikroTik RouterBOARD mAP L-2nD
* - MikroTik RouterBOARD 941L-2nD
+ * - MikroTik RouterBOARD 951Ui-2nD
+ * - MikroTik RouterBOARD 750UP r2
+ * - MikroTik RouterBOARD 750 r2
+ *
+ * Preliminary support for the following hardware
+ * - MikroTik RouterBOARD wAP2nD
+ * - MikroTik RouterBOARD cAP2nD
+ * - MikroTik RouterBOARD mAP2nD
+ * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same
+ * hardware as the mAP L-2nD. It is unknown if they share the same board
+ * identifier.
*
* Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
*
#include <linux/routerboot.h>
#include <linux/gpio.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/74x164.h>
+
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#define RBSPI_HAS_USB BIT(0)
#define RBSPI_HAS_WLAN BIT(1)
#define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */
+#define RBSPI_HAS_SSR BIT(3) /* has an SSR on SPI bus 0 */
+#define RBSPI_HAS_POE BIT(4)
#define RB_ROUTERBOOT_OFFSET 0x0000
#define RB_BIOS_SIZE 0x1000
},
};
+/* common RB SSRs */
+#define RBSPI_SSR_GPIO_BASE 40
+#define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
+
+/* RB 951Ui-2nD gpios */
+#define RB952_SSR_BIT_LED_LAN1 0
+#define RB952_SSR_BIT_LED_LAN2 1
+#define RB952_SSR_BIT_LED_LAN3 2
+#define RB952_SSR_BIT_LED_LAN4 3
+#define RB952_SSR_BIT_LED_LAN5 4
+#define RB952_SSR_BIT_USB_POWER 5
+#define RB952_SSR_BIT_LED_WLAN 6
+#define RB952_GPIO_SSR_CS 11
+#define RB952_GPIO_LED_USER 4
+#define RB952_GPIO_POE_POWER 14
+#define RB952_GPIO_POE_STATUS 12
+#define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
+#define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
+#define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
+#define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
+#define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
+#define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
+#define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
+
+static struct gpio_led rb952_leds[] __initdata = {
+ {
+ .name = "rb:green:user",
+ .gpio = RB952_GPIO_LED_USER,
+ .active_low = 0,
+ }, {
+ .name = "rb:blue:wlan",
+ .gpio = RB952_GPIO_LED_WLAN,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:port1",
+ .gpio = RB952_GPIO_LED_LAN1,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:port2",
+ .gpio = RB952_GPIO_LED_LAN2,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:port3",
+ .gpio = RB952_GPIO_LED_LAN3,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:port4",
+ .gpio = RB952_GPIO_LED_LAN4,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:port5",
+ .gpio = RB952_GPIO_LED_LAN5,
+ .active_low = 1,
+ },
+};
+
+/* RB wAP-2nD gpios */
+#define RBWAP_GPIO_LED_USER 14
+#define RBWAP_GPIO_LED_WLAN 11
+
+static struct gpio_led rbwap_leds[] __initdata = {
+ {
+ .name = "rb:green:user",
+ .gpio = RBWAP_GPIO_LED_USER,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:wlan",
+ .gpio = RBWAP_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+};
+
+/* RB cAP-2nD gpios */
+#define RBCAP_GPIO_LED_1 14
+#define RBCAP_GPIO_LED_2 12
+#define RBCAP_GPIO_LED_3 11
+#define RBCAP_GPIO_LED_4 4
+#define RBCAP_GPIO_LED_ALL 13
+
+static struct gpio_led rbcap_leds[] __initdata = {
+ {
+ .name = "rb:green:rssi1",
+ .gpio = RBCAP_GPIO_LED_1,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:rssi2",
+ .gpio = RBCAP_GPIO_LED_2,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:rssi3",
+ .gpio = RBCAP_GPIO_LED_3,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:rssi4",
+ .gpio = RBCAP_GPIO_LED_4,
+ .active_low = 1,
+ },
+};
+
+/* RB mAP-2nD gpios */
+#define RBMAP_SSR_BIT_LED_LAN1 0
+#define RBMAP_SSR_BIT_LED_LAN2 1
+#define RBMAP_SSR_BIT_LED_POEO 2
+#define RBMAP_SSR_BIT_LED_USER 3
+#define RBMAP_SSR_BIT_LED_WLAN 4
+#define RBMAP_SSR_BIT_USB_POWER 5
+#define RBMAP_SSR_BIT_LED_APCAP 6
+#define RBMAP_GPIO_SSR_CS 11
+#define RBMAP_GPIO_LED_POWER 4
+#define RBMAP_GPIO_POE_POWER 14
+#define RBMAP_GPIO_POE_STATUS 12
+#define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER)
+#define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1)
+#define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2)
+#define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO)
+#define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER)
+#define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN)
+#define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP)
+
+static struct gpio_led rbmap_leds[] __initdata = {
+ {
+ .name = "rb:green:power",
+ .gpio = RBMAP_GPIO_LED_POWER,
+ .active_low = 1,
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ }, {
+ .name = "rb:green:eth1",
+ .gpio = RBMAP_GPIO_LED_LAN1,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:eth2",
+ .gpio = RBMAP_GPIO_LED_WLAN,
+ .active_low = 1,
+ }, {
+ .name = "rb:red:poe_out",
+ .gpio = RBMAP_GPIO_LED_POEO,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:user",
+ .gpio = RBMAP_GPIO_LED_USER,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:wlan",
+ .gpio = RBMAP_GPIO_LED_WLAN,
+ .active_low = 1,
+ }, {
+ .name = "rb:green:ap_cap",
+ .gpio = RBMAP_GPIO_LED_APCAP,
+ .active_low = 1,
+ },
+};
+
+
+static struct gen_74x164_chip_platform_data rbspi_ssr_data = {
+ .base = RBSPI_SSR_GPIO_BASE,
+};
+
+/* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
+static int rbspi_spi_cs_gpios[] = {
+ -ENOENT, /* CS0 is always -ENOENT: natively handled */
+ -ENOENT, /* CS1 can be updated by the code as necessary */
+};
+
+static struct ath79_spi_platform_data rbspi_ath79_spi_data = {
+ .bus_num = 0,
+ .cs_gpios = rbspi_spi_cs_gpios,
+};
+
+/*
+ * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
+ * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
+ */
+static struct spi_board_info rbspi_spi_info[] = {
+ {
+ .bus_num = 0,
+ .chip_select = 0,
+ .max_speed_hz = 25000000,
+ .modalias = "m25p80",
+ .platform_data = &rbspi_spi_flash_data,
+ }, {
+ .bus_num = 0,
+ .chip_select = 1,
+ .max_speed_hz = 25000000,
+ .modalias = "74x164",
+ .platform_data = &rbspi_ssr_data,
+ }
+};
+
void __init rbspi_wlan_init(int wmac_offset)
{
char *art_buf;
*/
static void __init rbspi_peripherals_setup(u32 flags)
{
- ath79_register_m25p80(&rbspi_spi_flash_data);
+ unsigned spi_n;
+
+ if (flags & RBSPI_HAS_SSR)
+ spi_n = ARRAY_SIZE(rbspi_spi_info);
+ else
+ spi_n = 1; /* only one device on bus0 */
+
+ rbspi_ath79_spi_data.num_chipselect = spi_n;
+ rbspi_ath79_spi_data.cs_gpios = rbspi_spi_cs_gpios;
+ ath79_register_spi(&rbspi_ath79_spi_data, rbspi_spi_info, spi_n);
if (flags & RBSPI_HAS_USB)
ath79_register_usb();
rbspi_gpio_keys_reset16);
}
+/*
+ * The hAP, hEX lite and hEX PoE lite share the same platform
+ */
+static void __init rbspi_952_750r2_setup(u32 flags)
+{
+ if (flags & RBSPI_HAS_SSR)
+ rbspi_spi_cs_gpios[1] = RB952_GPIO_SSR_CS;
+
+ rbspi_peripherals_setup(flags);
+
+ /* GMAC1 is HW MAC + 1, WLAN MAC IS HW MAC + 5 */
+ rbspi_network_setup(flags, 1, 5);
+
+ if (flags & RBSPI_HAS_USB)
+ gpio_request_one(RB952_GPIO_USB_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "USB power");
+
+ if (flags & RBSPI_HAS_POE)
+ gpio_request_one(RB952_GPIO_POE_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "POE power");
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds);
+
+ /* These devices have a single reset button as gpio 16 */
+ ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(rbspi_gpio_keys_reset16),
+ rbspi_gpio_keys_reset16);
+}
+
+/*
+ * Init the hAP hardware.
+ * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
+ * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
+ * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
+ * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
+ * internal switch for the LAN ports.
+ * The device also has USB, PoE output and an SSR used for LED multiplexing.
+ */
+static void __init rb952_setup(void)
+{
+ u32 flags = RBSPI_HAS_WLAN | RBSPI_HAS_WAN4 | RBSPI_HAS_USB |
+ RBSPI_HAS_SSR | RBSPI_HAS_POE;
+
+ if (rbspi_platform_setup())
+ return;
+
+ rbspi_952_750r2_setup(flags);
+}
+
+/*
+ * Init the hEX (PoE) lite hardware.
+ * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without
+ * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only
+ * without USB and POE. It shares the same bootloader board identifier.
+ */
+static void __init rb750upr2_setup(void)
+{
+ u32 flags = RBSPI_HAS_WAN4 | RBSPI_HAS_SSR;
+
+ if (rbspi_platform_setup())
+ return;
+
+ /* differentiate the hEX lite from the hEX PoE lite */
+ if (strstr(mips_get_machine_name(), "750UP r2"))
+ flags |= RBSPI_HAS_USB | RBSPI_HAS_POE;
+
+ rbspi_952_750r2_setup(flags);
+}
+
+/*
+ * Init the wAP hardware (EXPERIMENTAL).
+ * The wAP 2nD has a single ethernet port.
+ */
+static void __init rbwap_setup(void)
+{
+ u32 flags = RBSPI_HAS_WLAN;
+
+ if (rbspi_platform_setup())
+ return;
+
+ rbspi_peripherals_setup(flags);
+
+ /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
+ rbspi_network_setup(flags, 0, 1);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds), rbwap_leds);
+}
+
+/*
+ * Init the cAP hardware (EXPERIMENTAL).
+ * The cAP 2nD has a single ethernet port, and a global LED switch.
+ */
+static void __init rbcap_setup(void)
+{
+ u32 flags = RBSPI_HAS_WLAN;
+
+ if (rbspi_platform_setup())
+ return;
+
+ rbspi_peripherals_setup(flags);
+
+ /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
+ rbspi_network_setup(flags, 0, 1);
+
+ gpio_request_one(RBCAP_GPIO_LED_ALL,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "LEDs enable");
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds), rbcap_leds);
+}
+
+/*
+ * Init the mAP hardware (EXPERIMENTAL).
+ * The mAP 2nD has two ethernet ports, PoE output and an SSR for LED
+ * multiplexing.
+ */
+static void __init rbmap_setup(void)
+{
+ u32 flags = RBSPI_HAS_WLAN | RBSPI_HAS_SSR | RBSPI_HAS_POE;
+
+ if (rbspi_platform_setup())
+ return;
+
+ rbspi_spi_cs_gpios[1] = RBMAP_GPIO_SSR_CS;
+ rbspi_peripherals_setup(flags);
+
+ /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 2 */
+ rbspi_network_setup(flags, 0, 2);
+
+ if (flags & RBSPI_HAS_POE)
+ gpio_request_one(RBMAP_GPIO_POE_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "POE power");
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds);
+}
+
+
MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);
MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup);
+MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup);
+MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2, "750-hb", rb750upr2_setup);
+MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP, "wap-hb", rbwap_setup);
+MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP, "cap-hb", rbcap_setup);
+MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP, "map2-hb", rbmap_setup);