ramips: add second SPI clocks

These clocks were missing in the changes introduced in r47573-47580

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 47666

diff --git a/target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch b/target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch
new file mode 100644 (file)
index 0000000..bca872f
--- /dev/null
+++ b/target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch
@@ -0,0 +1,30 @@
+--- a/arch/mips/ralink/mt7620.c
++++ b/arch/mips/ralink/mt7620.c
+@@ -415,6 +415,7 @@ void __init ralink_clk_init(void)
+       ralink_clk_add("10000100.timer", periph_rate);
+       ralink_clk_add("10000120.watchdog", periph_rate);
+       ralink_clk_add("10000b00.spi", sys_rate);
++      ralink_clk_add("10000b40.spi", sys_rate);
+       ralink_clk_add("10000c00.uartlite", periph_rate);
+       ralink_clk_add("10000d00.uart1", periph_rate);
+       ralink_clk_add("10000e00.uart2", periph_rate);
+--- a/arch/mips/ralink/rt305x.c
++++ b/arch/mips/ralink/rt305x.c
+@@ -201,6 +201,7 @@ void __init ralink_clk_init(void)
+       ralink_clk_add("cpu", cpu_rate);
+       ralink_clk_add("sys", sys_rate);
+       ralink_clk_add("10000b00.spi", sys_rate);
++      ralink_clk_add("10000b40.spi", sys_rate);
+       ralink_clk_add("10000100.timer", wdt_rate);
+       ralink_clk_add("10000120.watchdog", wdt_rate);
+       ralink_clk_add("10000500.uart", uart_rate);
+--- a/arch/mips/ralink/rt3883.c
++++ b/arch/mips/ralink/rt3883.c
+@@ -109,6 +109,7 @@ void __init ralink_clk_init(void)
+       ralink_clk_add("10000120.watchdog", sys_rate);
+       ralink_clk_add("10000500.uart", 40000000);
+       ralink_clk_add("10000b00.spi", sys_rate);
++      ralink_clk_add("10000b40.spi", sys_rate);
+       ralink_clk_add("10000c00.uartlite", 40000000);
+       ralink_clk_add("10100000.ethernet", sys_rate);
+       ralink_clk_add("10180000.wmac", 40000000);