From 2b71f958b1d2022bd0c4dcaa458f5ba1b955f934 Mon Sep 17 00:00:00 2001 From: Pavel Kubelun Date: Tue, 15 Nov 2016 21:28:36 +0300 Subject: [PATCH 1/1] ipq806x: increase coherent dma pool size Cherry-picked and rebased from https://source.codeaurora.org/quic/qsdk/system/openwrt/tree/?h=korg/linux-3.4.y/release/arugula_bb_cs Signed-off-by: Pavel Kubelun --- ...x-Increase-Atomic-Coherent-Pool-size.patch | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 target/linux/ipq806x/patches-4.4/308-soc-qcom-ipq806x-Increase-Atomic-Coherent-Pool-size.patch diff --git a/target/linux/ipq806x/patches-4.4/308-soc-qcom-ipq806x-Increase-Atomic-Coherent-Pool-size.patch b/target/linux/ipq806x/patches-4.4/308-soc-qcom-ipq806x-Increase-Atomic-Coherent-Pool-size.patch new file mode 100644 index 0000000000..1c997ab256 --- /dev/null +++ b/target/linux/ipq806x/patches-4.4/308-soc-qcom-ipq806x-Increase-Atomic-Coherent-Pool-size.patch @@ -0,0 +1,52 @@ +From 689a8f1ec58a88152669d21572a1539ad34024cb Mon Sep 17 00:00:00 2001 +From: Varadarajan Narayanan +Date: Mon, 30 Mar 2015 13:25:21 +0530 +Subject: soc: qcom: ipq806x: Increase Atomic Coherent Pool size + +Linux 3.14, by default allocates a 256K Atomic Coherent Pool. +However, Linux 3.4 seems to have allocated ~1.8M for the same. +256K doesn't seem to be enough for the WiFi driver. Hence, +setting the size to be similar to 3.4. + +CRs-Fixed: 810357 + +Change-Id: I5b98a8531dcb33aff451a943f8b83402f9d13fa7 +Signed-off-by: Varadarajan Narayanan +--- + arch/arm/mach-qcom/board.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +--- a/arch/arm/mach-qcom/board.c ++++ b/arch/arm/mach-qcom/board.c +@@ -12,6 +12,11 @@ + + #include + ++#include ++#include ++#include ++#include ++ + #include + + static const char * const qcom_dt_match[] __initconst = { +@@ -28,3 +33,19 @@ static const char * const qcom_dt_match[ + DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)") + .dt_compat = qcom_dt_match, + MACHINE_END ++ ++ ++static int __init qcom_atomic_pool_size_set(void) ++{ ++#define ATOMIC_DMA_COHERENT_POOL_SIZE SZ_2M ++ ++ init_dma_coherent_pool_size(ATOMIC_DMA_COHERENT_POOL_SIZE); ++ ++ return 0; ++} ++ ++/* ++ * This should happen before atomic_pool_init(), which is a ++ * postcore_initcall. ++ */ ++core_initcall(qcom_atomic_pool_size_set); -- 2.30.2