move generic kernel build parts out of board support patches
[openwrt/svn-archive/archive.git] / openwrt / target / linux / linux-2.4 / patches / brcm / 001-bcm47xx.patch
1 diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile
2 --- linux.old/arch/mips/Makefile 2005-11-07 23:12:50.582887000 +0100
3 +++ linux.dev/arch/mips/Makefile 2005-11-07 21:57:08.537629000 +0100
4 @@ -727,6 +727,19 @@
5 endif
6
7 #
8 +# Broadcom BCM947XX variants
9 +#
10 +ifdef CONFIG_BCM947XX
11 +LIBS += arch/mips/bcm947xx/generic/brcm.o arch/mips/bcm947xx/bcm947xx.o
12 +SUBDIRS += arch/mips/bcm947xx/generic arch/mips/bcm947xx
13 +LOADADDR := 0x80001000
14 +
15 +zImage: vmlinux
16 + $(MAKE) -C arch/$(ARCH)/bcm947xx/compressed
17 +export LOADADDR
18 +endif
19 +
20 +#
21 # Choosing incompatible machines durings configuration will result in
22 # error messages during linking. Select a default linkscript if
23 # none has been choosen above.
24 @@ -779,6 +793,7 @@
25 $(MAKE) -C arch/$(ARCH)/tools clean
26 $(MAKE) -C arch/mips/baget clean
27 $(MAKE) -C arch/mips/lasat clean
28 + $(MAKE) -C arch/mips/bcm947xx/compressed clean
29
30 archmrproper:
31 @$(MAKEBOOT) mrproper
32 diff -urN linux.old/arch/mips/bcm947xx/Makefile linux.dev/arch/mips/bcm947xx/Makefile
33 --- linux.old/arch/mips/bcm947xx/Makefile 1970-01-01 01:00:00.000000000 +0100
34 +++ linux.dev/arch/mips/bcm947xx/Makefile 2005-11-08 00:55:04.392074500 +0100
35 @@ -0,0 +1,15 @@
36 +#
37 +# Makefile for the BCM947xx specific kernel interface routines
38 +# under Linux.
39 +#
40 +
41 +EXTRA_CFLAGS+=-I$(TOPDIR)/arch/mips/bcm947xx/include -DBCMDRIVER
42 +
43 +O_TARGET := bcm947xx.o
44 +
45 +export-objs := nvram_linux.o setup.o
46 +obj-y := prom.o setup.o time.o sbmips.o gpio.o
47 +obj-y += nvram.o nvram_linux.o sflash.o
48 +obj-$(CONFIG_PCI) += sbpci.o pcibios.o
49 +
50 +include $(TOPDIR)/Rules.make
51 diff -urN linux.old/arch/mips/bcm947xx/compressed/Makefile linux.dev/arch/mips/bcm947xx/compressed/Makefile
52 --- linux.old/arch/mips/bcm947xx/compressed/Makefile 1970-01-01 01:00:00.000000000 +0100
53 +++ linux.dev/arch/mips/bcm947xx/compressed/Makefile 2005-11-07 21:57:07.841585500 +0100
54 @@ -0,0 +1,33 @@
55 +#
56 +# Makefile for Broadcom BCM947XX boards
57 +#
58 +# Copyright 2001-2003, Broadcom Corporation
59 +# All Rights Reserved.
60 +#
61 +# THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
62 +# KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
63 +# SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
64 +# FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
65 +#
66 +# $Id: Makefile,v 1.2 2005/04/02 12:12:57 wbx Exp $
67 +#
68 +
69 +OBJCOPY_ARGS = -O binary -R .reginfo -R .note -R .comment -R .mdebug -S
70 +SYSTEM ?= $(TOPDIR)/vmlinux
71 +
72 +all: vmlinuz
73 +
74 +# Don't build dependencies, this may die if $(CC) isn't gcc
75 +dep:
76 +
77 +# Create a gzipped version named vmlinuz for compatibility
78 +vmlinuz: piggy
79 + gzip -c9 $< > $@
80 +
81 +piggy: $(SYSTEM)
82 + $(OBJCOPY) $(OBJCOPY_ARGS) $< $@
83 +
84 +mrproper: clean
85 +
86 +clean:
87 + rm -f vmlinuz piggy
88 diff -urN linux.old/arch/mips/bcm947xx/generic/Makefile linux.dev/arch/mips/bcm947xx/generic/Makefile
89 --- linux.old/arch/mips/bcm947xx/generic/Makefile 1970-01-01 01:00:00.000000000 +0100
90 +++ linux.dev/arch/mips/bcm947xx/generic/Makefile 2005-11-07 21:57:07.841585500 +0100
91 @@ -0,0 +1,15 @@
92 +#
93 +# Makefile for the BCM947xx specific kernel interface routines
94 +# under Linux.
95 +#
96 +
97 +.S.s:
98 + $(CPP) $(AFLAGS) $< -o $*.s
99 +.S.o:
100 + $(CC) $(AFLAGS) -c $< -o $*.o
101 +
102 +O_TARGET := brcm.o
103 +
104 +obj-y := int-handler.o irq.o
105 +
106 +include $(TOPDIR)/Rules.make
107 diff -urN linux.old/arch/mips/bcm947xx/generic/int-handler.S linux.dev/arch/mips/bcm947xx/generic/int-handler.S
108 --- linux.old/arch/mips/bcm947xx/generic/int-handler.S 1970-01-01 01:00:00.000000000 +0100
109 +++ linux.dev/arch/mips/bcm947xx/generic/int-handler.S 2005-11-07 21:57:07.841585500 +0100
110 @@ -0,0 +1,51 @@
111 +/*
112 + * Generic interrupt handler for Broadcom MIPS boards
113 + *
114 + * Copyright 2004, Broadcom Corporation
115 + * All Rights Reserved.
116 + *
117 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
118 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
119 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
120 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
121 + *
122 + * $Id: int-handler.S,v 1.1 2005/03/16 13:50:00 wbx Exp $
123 + */
124 +
125 +#include <linux/config.h>
126 +
127 +#include <asm/asm.h>
128 +#include <asm/mipsregs.h>
129 +#include <asm/regdef.h>
130 +#include <asm/stackframe.h>
131 +
132 +/*
133 + * MIPS IRQ Source
134 + * -------- ------
135 + * 0 Software (ignored)
136 + * 1 Software (ignored)
137 + * 2 Combined hardware interrupt (hw0)
138 + * 3 Hardware
139 + * 4 Hardware
140 + * 5 Hardware
141 + * 6 Hardware
142 + * 7 R4k timer
143 + */
144 +
145 + .text
146 + .set noreorder
147 + .set noat
148 + .align 5
149 + NESTED(brcmIRQ, PT_SIZE, sp)
150 + SAVE_ALL
151 + CLI
152 + .set at
153 + .set noreorder
154 +
155 + jal brcm_irq_dispatch
156 + move a0, sp
157 +
158 + j ret_from_irq
159 + nop
160 +
161 + END(brcmIRQ)
162 diff -urN linux.old/arch/mips/bcm947xx/generic/irq.c linux.dev/arch/mips/bcm947xx/generic/irq.c
163 --- linux.old/arch/mips/bcm947xx/generic/irq.c 1970-01-01 01:00:00.000000000 +0100
164 +++ linux.dev/arch/mips/bcm947xx/generic/irq.c 2005-11-07 21:57:07.841585500 +0100
165 @@ -0,0 +1,130 @@
166 +/*
167 + * Generic interrupt control functions for Broadcom MIPS boards
168 + *
169 + * Copyright 2004, Broadcom Corporation
170 + * All Rights Reserved.
171 + *
172 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
173 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
174 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
175 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
176 + *
177 + * $Id: irq.c,v 1.1 2005/03/16 13:50:00 wbx Exp $
178 + */
179 +
180 +#include <linux/config.h>
181 +#include <linux/init.h>
182 +#include <linux/kernel.h>
183 +#include <linux/types.h>
184 +#include <linux/interrupt.h>
185 +#include <linux/irq.h>
186 +
187 +#include <asm/irq.h>
188 +#include <asm/mipsregs.h>
189 +#include <asm/gdb-stub.h>
190 +
191 +#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
192 +
193 +extern asmlinkage void brcmIRQ(void);
194 +extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
195 +
196 +void
197 +brcm_irq_dispatch(struct pt_regs *regs)
198 +{
199 + u32 cause;
200 +
201 + cause = read_c0_cause() &
202 + read_c0_status() &
203 + CAUSEF_IP;
204 +
205 +#ifdef CONFIG_KERNPROF
206 + change_c0_status(cause | 1, 1);
207 +#else
208 + clear_c0_status(cause);
209 +#endif
210 +
211 + if (cause & CAUSEF_IP7)
212 + do_IRQ(7, regs);
213 + if (cause & CAUSEF_IP2)
214 + do_IRQ(2, regs);
215 + if (cause & CAUSEF_IP3)
216 + do_IRQ(3, regs);
217 + if (cause & CAUSEF_IP4)
218 + do_IRQ(4, regs);
219 + if (cause & CAUSEF_IP5)
220 + do_IRQ(5, regs);
221 + if (cause & CAUSEF_IP6)
222 + do_IRQ(6, regs);
223 +}
224 +
225 +static void
226 +enable_brcm_irq(unsigned int irq)
227 +{
228 + if (irq < 8)
229 + set_c0_status(1 << (irq + 8));
230 + else
231 + set_c0_status(IE_IRQ0);
232 +}
233 +
234 +static void
235 +disable_brcm_irq(unsigned int irq)
236 +{
237 + if (irq < 8)
238 + clear_c0_status(1 << (irq + 8));
239 + else
240 + clear_c0_status(IE_IRQ0);
241 +}
242 +
243 +static void
244 +ack_brcm_irq(unsigned int irq)
245 +{
246 + /* Already done in brcm_irq_dispatch */
247 +}
248 +
249 +static unsigned int
250 +startup_brcm_irq(unsigned int irq)
251 +{
252 + enable_brcm_irq(irq);
253 +
254 + return 0; /* never anything pending */
255 +}
256 +
257 +static void
258 +end_brcm_irq(unsigned int irq)
259 +{
260 + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
261 + enable_brcm_irq(irq);
262 +}
263 +
264 +static struct hw_interrupt_type brcm_irq_type = {
265 + typename: "MIPS",
266 + startup: startup_brcm_irq,
267 + shutdown: disable_brcm_irq,
268 + enable: enable_brcm_irq,
269 + disable: disable_brcm_irq,
270 + ack: ack_brcm_irq,
271 + end: end_brcm_irq,
272 + NULL
273 +};
274 +
275 +void __init
276 +init_IRQ(void)
277 +{
278 + int i;
279 +
280 + for (i = 0; i < NR_IRQS; i++) {
281 + irq_desc[i].status = IRQ_DISABLED;
282 + irq_desc[i].action = 0;
283 + irq_desc[i].depth = 1;
284 + irq_desc[i].handler = &brcm_irq_type;
285 + }
286 +
287 + set_except_vector(0, brcmIRQ);
288 + change_c0_status(ST0_IM, ALLINTS);
289 +
290 +#ifdef CONFIG_REMOTE_DEBUG
291 + printk("Breaking into debugger...\n");
292 + set_debug_traps();
293 + breakpoint();
294 +#endif
295 +}
296 diff -urN linux.old/arch/mips/bcm947xx/gpio.c linux.dev/arch/mips/bcm947xx/gpio.c
297 --- linux.old/arch/mips/bcm947xx/gpio.c 1970-01-01 01:00:00.000000000 +0100
298 +++ linux.dev/arch/mips/bcm947xx/gpio.c 2005-11-07 23:58:34.968754500 +0100
299 @@ -0,0 +1,158 @@
300 +/*
301 + * GPIO char driver
302 + *
303 + * Copyright 2005, Broadcom Corporation
304 + * All Rights Reserved.
305 + *
306 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
307 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
308 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
309 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
310 + *
311 + * $Id$
312 + */
313 +
314 +#include <linux/module.h>
315 +#include <linux/init.h>
316 +#include <linux/fs.h>
317 +#include <linux/miscdevice.h>
318 +#include <asm/uaccess.h>
319 +
320 +#include <typedefs.h>
321 +#include <bcmutils.h>
322 +#include <sbutils.h>
323 +#include <bcmdevs.h>
324 +
325 +static sb_t *gpio_sbh;
326 +static int gpio_major;
327 +static devfs_handle_t gpio_dir;
328 +static struct {
329 + char *name;
330 + devfs_handle_t handle;
331 +} gpio_file[] = {
332 + { "in", NULL },
333 + { "out", NULL },
334 + { "outen", NULL },
335 + { "control", NULL }
336 +};
337 +
338 +static int
339 +gpio_open(struct inode *inode, struct file * file)
340 +{
341 + if (MINOR(inode->i_rdev) > ARRAYSIZE(gpio_file))
342 + return -ENODEV;
343 +
344 + MOD_INC_USE_COUNT;
345 + return 0;
346 +}
347 +
348 +static int
349 +gpio_release(struct inode *inode, struct file * file)
350 +{
351 + MOD_DEC_USE_COUNT;
352 + return 0;
353 +}
354 +
355 +static ssize_t
356 +gpio_read(struct file *file, char *buf, size_t count, loff_t *ppos)
357 +{
358 + u32 val;
359 +
360 + switch (MINOR(file->f_dentry->d_inode->i_rdev)) {
361 + case 0:
362 + val = sb_gpioin(gpio_sbh);
363 + break;
364 + case 1:
365 + val = sb_gpioout(gpio_sbh, 0, 0, GPIO_DRV_PRIORITY);
366 + break;
367 + case 2:
368 + val = sb_gpioouten(gpio_sbh, 0, 0, GPIO_DRV_PRIORITY);
369 + break;
370 + case 3:
371 + val = sb_gpiocontrol(gpio_sbh, 0, 0, GPIO_DRV_PRIORITY);
372 + break;
373 + default:
374 + return -ENODEV;
375 + }
376 +
377 + if (put_user(val, (u32 *) buf))
378 + return -EFAULT;
379 +
380 + return sizeof(val);
381 +}
382 +
383 +static ssize_t
384 +gpio_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
385 +{
386 + u32 val;
387 +
388 + if (get_user(val, (u32 *) buf))
389 + return -EFAULT;
390 +
391 + switch (MINOR(file->f_dentry->d_inode->i_rdev)) {
392 + case 0:
393 + return -EACCES;
394 + case 1:
395 + sb_gpioout(gpio_sbh, ~0, val, GPIO_DRV_PRIORITY);
396 + break;
397 + case 2:
398 + sb_gpioouten(gpio_sbh, ~0, val, GPIO_DRV_PRIORITY);
399 + break;
400 + case 3:
401 + sb_gpiocontrol(gpio_sbh, ~0, val, GPIO_DRV_PRIORITY);
402 + break;
403 + default:
404 + return -ENODEV;
405 + }
406 +
407 + return sizeof(val);
408 +}
409 +
410 +static struct file_operations gpio_fops = {
411 + owner: THIS_MODULE,
412 + open: gpio_open,
413 + release: gpio_release,
414 + read: gpio_read,
415 + write: gpio_write,
416 +};
417 +
418 +static int __init
419 +gpio_init(void)
420 +{
421 + int i;
422 +
423 + if (!(gpio_sbh = sb_kattach()))
424 + return -ENODEV;
425 +
426 + sb_gpiosetcore(gpio_sbh);
427 +
428 + if ((gpio_major = devfs_register_chrdev(0, "gpio", &gpio_fops)) < 0)
429 + return gpio_major;
430 +
431 + gpio_dir = devfs_mk_dir(NULL, "gpio", NULL);
432 +
433 + for (i = 0; i < ARRAYSIZE(gpio_file); i++) {
434 + gpio_file[i].handle = devfs_register(gpio_dir,
435 + gpio_file[i].name,
436 + DEVFS_FL_DEFAULT, gpio_major, i,
437 + S_IFCHR | S_IRUGO | S_IWUGO,
438 + &gpio_fops, NULL);
439 + }
440 +
441 + return 0;
442 +}
443 +
444 +static void __exit
445 +gpio_exit(void)
446 +{
447 + int i;
448 +
449 + for (i = 0; i < ARRAYSIZE(gpio_file); i++)
450 + devfs_unregister(gpio_file[i].handle);
451 + devfs_unregister(gpio_dir);
452 + devfs_unregister_chrdev(gpio_major, "gpio");
453 + sb_detach(gpio_sbh);
454 +}
455 +
456 +module_init(gpio_init);
457 +module_exit(gpio_exit);
458 diff -urN linux.old/arch/mips/bcm947xx/include/bcmdevs.h linux.dev/arch/mips/bcm947xx/include/bcmdevs.h
459 --- linux.old/arch/mips/bcm947xx/include/bcmdevs.h 1970-01-01 01:00:00.000000000 +0100
460 +++ linux.dev/arch/mips/bcm947xx/include/bcmdevs.h 2005-11-07 22:51:38.772725750 +0100
461 @@ -0,0 +1,391 @@
462 +/*
463 + * Broadcom device-specific manifest constants.
464 + *
465 + * Copyright 2005, Broadcom Corporation
466 + * All Rights Reserved.
467 + *
468 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
469 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
470 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
471 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
472 + * $Id$
473 + */
474 +
475 +#ifndef _BCMDEVS_H
476 +#define _BCMDEVS_H
477 +
478 +
479 +/* Known PCI vendor Id's */
480 +#define VENDOR_EPIGRAM 0xfeda
481 +#define VENDOR_BROADCOM 0x14e4
482 +#define VENDOR_3COM 0x10b7
483 +#define VENDOR_NETGEAR 0x1385
484 +#define VENDOR_DIAMOND 0x1092
485 +#define VENDOR_DELL 0x1028
486 +#define VENDOR_HP 0x0e11
487 +#define VENDOR_APPLE 0x106b
488 +
489 +/* PCI Device Id's */
490 +#define BCM4210_DEVICE_ID 0x1072 /* never used */
491 +#define BCM4211_DEVICE_ID 0x4211
492 +#define BCM4230_DEVICE_ID 0x1086 /* never used */
493 +#define BCM4231_DEVICE_ID 0x4231
494 +
495 +#define BCM4410_DEVICE_ID 0x4410 /* bcm44xx family pci iline */
496 +#define BCM4430_DEVICE_ID 0x4430 /* bcm44xx family cardbus iline */
497 +#define BCM4412_DEVICE_ID 0x4412 /* bcm44xx family pci enet */
498 +#define BCM4432_DEVICE_ID 0x4432 /* bcm44xx family cardbus enet */
499 +
500 +#define BCM3352_DEVICE_ID 0x3352 /* bcm3352 device id */
501 +#define BCM3360_DEVICE_ID 0x3360 /* bcm3360 device id */
502 +
503 +#define EPI41210_DEVICE_ID 0xa0fa /* bcm4210 */
504 +#define EPI41230_DEVICE_ID 0xa10e /* bcm4230 */
505 +
506 +#define BCM47XX_ILINE_ID 0x4711 /* 47xx iline20 */
507 +#define BCM47XX_V90_ID 0x4712 /* 47xx v90 codec */
508 +#define BCM47XX_ENET_ID 0x4713 /* 47xx enet */
509 +#define BCM47XX_EXT_ID 0x4714 /* 47xx external i/f */
510 +#define BCM47XX_USB_ID 0x4715 /* 47xx usb */
511 +#define BCM47XX_USBH_ID 0x4716 /* 47xx usb host */
512 +#define BCM47XX_USBD_ID 0x4717 /* 47xx usb device */
513 +#define BCM47XX_IPSEC_ID 0x4718 /* 47xx ipsec */
514 +#define BCM47XX_ROBO_ID 0x4719 /* 47xx/53xx roboswitch core */
515 +#define BCM47XX_USB20H_ID 0x471a /* 47xx usb 2.0 host */
516 +#define BCM47XX_USB20D_ID 0x471b /* 47xx usb 2.0 device */
517 +
518 +#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */
519 +
520 +#define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */
521 +#define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */
522 +#define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */
523 +#define BCM4610_ENET_ID 0x4613 /* 4610 enet */
524 +#define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */
525 +#define BCM4610_USB_ID 0x4615 /* 4610 usb */
526 +
527 +#define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */
528 +#define BCM4402_ENET_ID 0x4402 /* 4402 enet */
529 +#define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */
530 +#define BCM4401_ENET_ID 0x170c /* 4401b0 production enet cards */
531 +
532 +#define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */
533 +#define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */
534 +
535 +#define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */
536 +#define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */
537 +#define BCM4307_ENET_ID 0x4306 /* 4307 enet */
538 +#define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */
539 +
540 +#define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */
541 +#define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */
542 +#define BCM4306_D11G_ID2 0x4325
543 +#define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */
544 +#define BCM4306_UART_ID 0x4322 /* 4306 uart */
545 +#define BCM4306_V90_ID 0x4323 /* 4306 v90 codec */
546 +#define BCM4306_D11DUAL_ID 0x4324 /* 4306 dual A+B */
547 +
548 +#define BCM4309_PKG_ID 1 /* 4309 package id */
549 +
550 +#define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */
551 +#define BCM4303_PKG_ID 2 /* 4303 package id */
552 +
553 +#define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */
554 +#define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */
555 +#define BCM4310_UART_ID 0x4312 /* 4310 uart */
556 +#define BCM4310_ENET_ID 0x4313 /* 4310 enet */
557 +#define BCM4310_USB_ID 0x4315 /* 4310 usb */
558 +
559 +#define BCMGPRS_UART_ID 0x4333 /* Uart id used by 4306/gprs card */
560 +#define BCMGPRS2_UART_ID 0x4344 /* Uart id used by 4306/gprs card */
561 +
562 +
563 +#define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */
564 +#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */
565 +
566 +#define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */
567 +
568 +#define BCM4318_DEVICE_ID 0x4318 /* 4318 chip common chipid */
569 +#define BCM4318_D11G_ID 0x4318 /* 4318 801.11b/g id */
570 +#define BCM4318_D11DUAL_ID 0x4319 /* 4318 801.11a/b/g id */
571 +#define BCM4318_JTAGM_ID 0x4331 /* 4318 jtagm device id */
572 +
573 +#define FPGA_JTAGM_ID 0x4330 /* ??? */
574 +
575 +/* Address map */
576 +#define BCM4710_SDRAM 0x00000000 /* Physical SDRAM */
577 +#define BCM4710_PCI_MEM 0x08000000 /* Host Mode PCI memory access space (64 MB) */
578 +#define BCM4710_PCI_CFG 0x0c000000 /* Host Mode PCI configuration space (64 MB) */
579 +#define BCM4710_PCI_DMA 0x40000000 /* Client Mode PCI memory access space (1 GB) */
580 +#define BCM4710_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */
581 +#define BCM4710_ENUM 0x18000000 /* Beginning of core enumeration space */
582 +
583 +/* Core register space */
584 +#define BCM4710_REG_SDRAM 0x18000000 /* SDRAM core registers */
585 +#define BCM4710_REG_ILINE20 0x18001000 /* InsideLine20 core registers */
586 +#define BCM4710_REG_EMAC0 0x18002000 /* Ethernet MAC 0 core registers */
587 +#define BCM4710_REG_CODEC 0x18003000 /* Codec core registers */
588 +#define BCM4710_REG_USB 0x18004000 /* USB core registers */
589 +#define BCM4710_REG_PCI 0x18005000 /* PCI core registers */
590 +#define BCM4710_REG_MIPS 0x18006000 /* MIPS core registers */
591 +#define BCM4710_REG_EXTIF 0x18007000 /* External Interface core registers */
592 +#define BCM4710_REG_EMAC1 0x18008000 /* Ethernet MAC 1 core registers */
593 +
594 +#define BCM4710_EXTIF 0x1f000000 /* External Interface base address */
595 +#define BCM4710_PCMCIA_MEM 0x1f000000 /* External Interface PCMCIA memory access */
596 +#define BCM4710_PCMCIA_IO 0x1f100000 /* PCMCIA I/O access */
597 +#define BCM4710_PCMCIA_CONF 0x1f200000 /* PCMCIA configuration */
598 +#define BCM4710_PROG 0x1f800000 /* Programable interface */
599 +#define BCM4710_FLASH 0x1fc00000 /* Flash */
600 +
601 +#define BCM4710_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */
602 +
603 +#define BCM4710_UART (BCM4710_REG_EXTIF + 0x00000300)
604 +
605 +#define BCM4710_EUART (BCM4710_EXTIF + 0x00800000)
606 +#define BCM4710_LED (BCM4710_EXTIF + 0x00900000)
607 +
608 +#define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */
609 +#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */
610 +#define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */
611 +#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */
612 +#define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */
613 +
614 +#define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */
615 +
616 +#define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */
617 +#define BCM5350_DEVICE_ID 0x5350 /* bcm5350 chipcommon chipid */
618 +#define BCM5352_DEVICE_ID 0x5352 /* bcm5352 chipcommon chipid */
619 +
620 +#define BCM4320_DEVICE_ID 0x4320 /* bcm4320 chipcommon chipid */
621 +
622 +/* PCMCIA vendor Id's */
623 +
624 +#define VENDOR_BROADCOM_PCMCIA 0x02d0
625 +
626 +/* SDIO vendor Id's */
627 +#define VENDOR_BROADCOM_SDIO 0x00BF
628 +
629 +
630 +/* boardflags */
631 +#define BFL_BTCOEXIST 0x0001 /* This board implements Bluetooth coexistance */
632 +#define BFL_PACTRL 0x0002 /* This board has gpio 9 controlling the PA */
633 +#define BFL_AIRLINEMODE 0x0004 /* This board implements gpio13 radio disable indication */
634 +#define BFL_ENETROBO 0x0010 /* This board has robo switch or core */
635 +#define BFL_CCKHIPWR 0x0040 /* Can do high-power CCK transmission */
636 +#define BFL_ENETADM 0x0080 /* This board has ADMtek switch */
637 +#define BFL_ENETVLAN 0x0100 /* This board has vlan capability */
638 +#define BFL_AFTERBURNER 0x0200 /* This board supports Afterburner mode */
639 +#define BFL_NOPCI 0x0400 /* This board leaves PCI floating */
640 +#define BFL_FEM 0x0800 /* This board supports the Front End Module */
641 +#define BFL_EXTLNA 0x1000 /* This board has an external LNA */
642 +#define BFL_HGPA 0x2000 /* This board has a high gain PA */
643 +#define BFL_BTCMOD 0x4000 /* This board' BTCOEXIST is in the alternate gpios */
644 +#define BFL_ALTIQ 0x8000 /* Alternate I/Q settings */
645 +
646 +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
647 +#define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */
648 +#define BOARD_GPIO_BTCMOD_IN 0x010 /* bit 4 is the alternate BT Coexistance Input */
649 +#define BOARD_GPIO_BTCMOD_OUT 0x020 /* bit 5 is the alternate BT Coexistance Out */
650 +#define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */
651 +#define BOARD_GPIO_BTC_OUT 0x100 /* bit 8 is BT Coexistance Out */
652 +#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */
653 +#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
654 +#define PCI_CFG_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
655 +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
656 +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
657 +
658 +/* Bus types */
659 +#define SB_BUS 0 /* Silicon Backplane */
660 +#define PCI_BUS 1 /* PCI target */
661 +#define PCMCIA_BUS 2 /* PCMCIA target */
662 +#define SDIO_BUS 3 /* SDIO target */
663 +#define JTAG_BUS 4 /* JTAG */
664 +
665 +/* Allows optimization for single-bus support */
666 +#ifdef BCMBUSTYPE
667 +#define BUSTYPE(bus) (BCMBUSTYPE)
668 +#else
669 +#define BUSTYPE(bus) (bus)
670 +#endif
671 +
672 +/* power control defines */
673 +#define PLL_DELAY 150 /* us pll on delay */
674 +#define FREF_DELAY 200 /* us fref change delay */
675 +#define MIN_SLOW_CLK 32 /* us Slow clock period */
676 +#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */
677 +
678 +/* Reference Board Types */
679 +
680 +#define BU4710_BOARD 0x0400
681 +#define VSIM4710_BOARD 0x0401
682 +#define QT4710_BOARD 0x0402
683 +
684 +#define BU4610_BOARD 0x0403
685 +#define VSIM4610_BOARD 0x0404
686 +
687 +#define BU4307_BOARD 0x0405
688 +#define BCM94301CB_BOARD 0x0406
689 +#define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */
690 +#define BCM94301MP_BOARD 0x0407
691 +#define BCM94307MP_BOARD 0x0408
692 +#define BCMAP4307_BOARD 0x0409
693 +
694 +#define BU4309_BOARD 0x040a
695 +#define BCM94309CB_BOARD 0x040b
696 +#define BCM94309MP_BOARD 0x040c
697 +#define BCM4309AP_BOARD 0x040d
698 +
699 +#define BCM94302MP_BOARD 0x040e
700 +
701 +#define VSIM4310_BOARD 0x040f
702 +#define BU4711_BOARD 0x0410
703 +#define BCM94310U_BOARD 0x0411
704 +#define BCM94310AP_BOARD 0x0412
705 +#define BCM94310MP_BOARD 0x0414
706 +
707 +#define BU4306_BOARD 0x0416
708 +#define BCM94306CB_BOARD 0x0417
709 +#define BCM94306MP_BOARD 0x0418
710 +
711 +#define BCM94710D_BOARD 0x041a
712 +#define BCM94710R1_BOARD 0x041b
713 +#define BCM94710R4_BOARD 0x041c
714 +#define BCM94710AP_BOARD 0x041d
715 +
716 +
717 +#define BU2050_BOARD 0x041f
718 +
719 +
720 +#define BCM94309G_BOARD 0x0421
721 +
722 +#define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */
723 +
724 +#define BU4704_BOARD 0x0423
725 +#define BU4702_BOARD 0x0424
726 +
727 +#define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */
728 +
729 +#define BU4317_BOARD 0x0426
730 +
731 +
732 +#define BCM94702MN_BOARD 0x0428
733 +
734 +/* BCM4702 1U CompactPCI Board */
735 +#define BCM94702CPCI_BOARD 0x0429
736 +
737 +/* BCM4702 with BCM95380 VLAN Router */
738 +#define BCM95380RR_BOARD 0x042a
739 +
740 +/* cb4306 with SiGe PA */
741 +#define BCM94306CBSG_BOARD 0x042b
742 +
743 +/* mp4301 with 2050 radio */
744 +#define BCM94301MPL_BOARD 0x042c
745 +
746 +/* cb4306 with SiGe PA */
747 +#define PCSG94306_BOARD 0x042d
748 +
749 +/* bu4704 with sdram */
750 +#define BU4704SD_BOARD 0x042e
751 +
752 +/* Dual 11a/11g Router */
753 +#define BCM94704AGR_BOARD 0x042f
754 +
755 +/* 11a-only minipci */
756 +#define BCM94308MP_BOARD 0x0430
757 +
758 +
759 +
760 +/* BCM94317 boards */
761 +#define BCM94317CB_BOARD 0x0440
762 +#define BCM94317MP_BOARD 0x0441
763 +#define BCM94317PCMCIA_BOARD 0x0442
764 +#define BCM94317SDIO_BOARD 0x0443
765 +
766 +#define BU4712_BOARD 0x0444
767 +#define BU4712SD_BOARD 0x045d
768 +#define BU4712L_BOARD 0x045f
769 +
770 +/* BCM4712 boards */
771 +#define BCM94712AP_BOARD 0x0445
772 +#define BCM94712P_BOARD 0x0446
773 +
774 +/* BCM4318 boards */
775 +#define BU4318_BOARD 0x0447
776 +#define CB4318_BOARD 0x0448
777 +#define MPG4318_BOARD 0x0449
778 +#define MP4318_BOARD 0x044a
779 +#define SD4318_BOARD 0x044b
780 +
781 +/* BCM63XX boards */
782 +#define BCM96338_BOARD 0x6338
783 +#define BCM96345_BOARD 0x6345
784 +#define BCM96348_BOARD 0x6348
785 +
786 +/* Another mp4306 with SiGe */
787 +#define BCM94306P_BOARD 0x044c
788 +
789 +/* CF-like 4317 modules */
790 +#define BCM94317CF_BOARD 0x044d
791 +
792 +/* mp4303 */
793 +#define BCM94303MP_BOARD 0x044e
794 +
795 +/* mpsgh4306 */
796 +#define BCM94306MPSGH_BOARD 0x044f
797 +
798 +/* BRCM 4306 w/ Front End Modules */
799 +#define BCM94306MPM 0x0450
800 +#define BCM94306MPL 0x0453
801 +
802 +/* 4712agr */
803 +#define BCM94712AGR_BOARD 0x0451
804 +
805 +/* The real CF 4317 board */
806 +#define CFI4317_BOARD 0x0452
807 +
808 +/* pcmcia 4303 */
809 +#define PC4303_BOARD 0x0454
810 +
811 +/* 5350K */
812 +#define BCM95350K_BOARD 0x0455
813 +
814 +/* 5350R */
815 +#define BCM95350R_BOARD 0x0456
816 +
817 +/* 4306mplna */
818 +#define BCM94306MPLNA_BOARD 0x0457
819 +
820 +/* 4320 boards */
821 +#define BU4320_BOARD 0x0458
822 +#define BU4320S_BOARD 0x0459
823 +#define BCM94320PH_BOARD 0x045a
824 +
825 +/* 4306mph */
826 +#define BCM94306MPH_BOARD 0x045b
827 +
828 +/* 4306pciv */
829 +#define BCM94306PCIV_BOARD 0x045c
830 +
831 +#define BU4712SD_BOARD 0x045d
832 +
833 +#define BCM94320PFLSH_BOARD 0x045e
834 +
835 +#define BU4712L_BOARD 0x045f
836 +#define BCM94712LGR_BOARD 0x0460
837 +#define BCM94320R_BOARD 0x0461
838 +
839 +#define BU5352_BOARD 0x0462
840 +
841 +#define BCM94318MPGH_BOARD 0x0463
842 +
843 +
844 +#define BCM95352GR_BOARD 0x0467
845 +
846 +/* bcm95351agr */
847 +#define BCM95351AGR_BOARD 0x0470
848 +
849 +/* # of GPIO pins */
850 +#define GPIO_NUMPINS 16
851 +
852 +#endif /* _BCMDEVS_H */
853 diff -urN linux.old/arch/mips/bcm947xx/include/bcmendian.h linux.dev/arch/mips/bcm947xx/include/bcmendian.h
854 --- linux.old/arch/mips/bcm947xx/include/bcmendian.h 1970-01-01 01:00:00.000000000 +0100
855 +++ linux.dev/arch/mips/bcm947xx/include/bcmendian.h 2005-11-07 22:51:38.772725750 +0100
856 @@ -0,0 +1,152 @@
857 +/*
858 + * local version of endian.h - byte order defines
859 + *
860 + * Copyright 2005, Broadcom Corporation
861 + * All Rights Reserved.
862 + *
863 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
864 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
865 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
866 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
867 + *
868 + * $Id$
869 +*/
870 +
871 +#ifndef _BCMENDIAN_H_
872 +#define _BCMENDIAN_H_
873 +
874 +#include <typedefs.h>
875 +
876 +/* Byte swap a 16 bit value */
877 +#define BCMSWAP16(val) \
878 + ((uint16)( \
879 + (((uint16)(val) & (uint16)0x00ffU) << 8) | \
880 + (((uint16)(val) & (uint16)0xff00U) >> 8) ))
881 +
882 +/* Byte swap a 32 bit value */
883 +#define BCMSWAP32(val) \
884 + ((uint32)( \
885 + (((uint32)(val) & (uint32)0x000000ffUL) << 24) | \
886 + (((uint32)(val) & (uint32)0x0000ff00UL) << 8) | \
887 + (((uint32)(val) & (uint32)0x00ff0000UL) >> 8) | \
888 + (((uint32)(val) & (uint32)0xff000000UL) >> 24) ))
889 +
890 +/* 2 Byte swap a 32 bit value */
891 +#define BCMSWAP32BY16(val) \
892 + ((uint32)( \
893 + (((uint32)(val) & (uint32)0x0000ffffUL) << 16) | \
894 + (((uint32)(val) & (uint32)0xffff0000UL) >> 16) ))
895 +
896 +
897 +static INLINE uint16
898 +bcmswap16(uint16 val)
899 +{
900 + return BCMSWAP16(val);
901 +}
902 +
903 +static INLINE uint32
904 +bcmswap32(uint32 val)
905 +{
906 + return BCMSWAP32(val);
907 +}
908 +
909 +static INLINE uint32
910 +bcmswap32by16(uint32 val)
911 +{
912 + return BCMSWAP32BY16(val);
913 +}
914 +
915 +/* buf - start of buffer of shorts to swap */
916 +/* len - byte length of buffer */
917 +static INLINE void
918 +bcmswap16_buf(uint16 *buf, uint len)
919 +{
920 + len = len/2;
921 +
922 + while(len--){
923 + *buf = bcmswap16(*buf);
924 + buf++;
925 + }
926 +}
927 +
928 +#ifndef hton16
929 +#ifndef IL_BIGENDIAN
930 +#define HTON16(i) BCMSWAP16(i)
931 +#define hton16(i) bcmswap16(i)
932 +#define hton32(i) bcmswap32(i)
933 +#define ntoh16(i) bcmswap16(i)
934 +#define ntoh32(i) bcmswap32(i)
935 +#define ltoh16(i) (i)
936 +#define ltoh32(i) (i)
937 +#define htol16(i) (i)
938 +#define htol32(i) (i)
939 +#else
940 +#define HTON16(i) (i)
941 +#define hton16(i) (i)
942 +#define hton32(i) (i)
943 +#define ntoh16(i) (i)
944 +#define ntoh32(i) (i)
945 +#define ltoh16(i) bcmswap16(i)
946 +#define ltoh32(i) bcmswap32(i)
947 +#define htol16(i) bcmswap16(i)
948 +#define htol32(i) bcmswap32(i)
949 +#endif
950 +#endif
951 +
952 +#ifndef IL_BIGENDIAN
953 +#define ltoh16_buf(buf, i)
954 +#define htol16_buf(buf, i)
955 +#else
956 +#define ltoh16_buf(buf, i) bcmswap16_buf((uint16*)buf, i)
957 +#define htol16_buf(buf, i) bcmswap16_buf((uint16*)buf, i)
958 +#endif
959 +
960 +/*
961 +* load 16-bit value from unaligned little endian byte array.
962 +*/
963 +static INLINE uint16
964 +ltoh16_ua(uint8 *bytes)
965 +{
966 + return (bytes[1]<<8)+bytes[0];
967 +}
968 +
969 +/*
970 +* load 32-bit value from unaligned little endian byte array.
971 +*/
972 +static INLINE uint32
973 +ltoh32_ua(uint8 *bytes)
974 +{
975 + return (bytes[3]<<24)+(bytes[2]<<16)+(bytes[1]<<8)+bytes[0];
976 +}
977 +
978 +/*
979 +* load 16-bit value from unaligned big(network) endian byte array.
980 +*/
981 +static INLINE uint16
982 +ntoh16_ua(uint8 *bytes)
983 +{
984 + return (bytes[0]<<8)+bytes[1];
985 +}
986 +
987 +/*
988 +* load 32-bit value from unaligned big(network) endian byte array.
989 +*/
990 +static INLINE uint32
991 +ntoh32_ua(uint8 *bytes)
992 +{
993 + return (bytes[0]<<24)+(bytes[1]<<16)+(bytes[2]<<8)+bytes[3];
994 +}
995 +
996 +#define ltoh_ua(ptr) ( \
997 + sizeof(*(ptr)) == sizeof(uint8) ? *(uint8 *)ptr : \
998 + sizeof(*(ptr)) == sizeof(uint16) ? (((uint8 *)ptr)[1]<<8)+((uint8 *)ptr)[0] : \
999 + (((uint8 *)ptr)[3]<<24)+(((uint8 *)ptr)[2]<<16)+(((uint8 *)ptr)[1]<<8)+((uint8 *)ptr)[0] \
1000 +)
1001 +
1002 +#define ntoh_ua(ptr) ( \
1003 + sizeof(*(ptr)) == sizeof(uint8) ? *(uint8 *)ptr : \
1004 + sizeof(*(ptr)) == sizeof(uint16) ? (((uint8 *)ptr)[0]<<8)+((uint8 *)ptr)[1] : \
1005 + (((uint8 *)ptr)[0]<<24)+(((uint8 *)ptr)[1]<<16)+(((uint8 *)ptr)[2]<<8)+((uint8 *)ptr)[3] \
1006 +)
1007 +
1008 +#endif /* _BCMENDIAN_H_ */
1009 diff -urN linux.old/arch/mips/bcm947xx/include/bcmenet47xx.h linux.dev/arch/mips/bcm947xx/include/bcmenet47xx.h
1010 --- linux.old/arch/mips/bcm947xx/include/bcmenet47xx.h 1970-01-01 01:00:00.000000000 +0100
1011 +++ linux.dev/arch/mips/bcm947xx/include/bcmenet47xx.h 2005-11-07 22:51:38.772725750 +0100
1012 @@ -0,0 +1,229 @@
1013 +/*
1014 + * Hardware-specific definitions for
1015 + * Broadcom BCM47XX 10/100 Mbps Ethernet cores.
1016 + *
1017 + * Copyright 2005, Broadcom Corporation
1018 + * All Rights Reserved.
1019 + *
1020 + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
1021 + * the contents of this file may not be disclosed to third parties, copied
1022 + * or duplicated in any form, in whole or in part, without the prior
1023 + * written permission of Broadcom Corporation.
1024 + * $Id$
1025 + */
1026 +
1027 +#ifndef _bcmenet_47xx_h_
1028 +#define _bcmenet_47xx_h_
1029 +
1030 +#include <bcmenetmib.h>
1031 +#include <bcmenetrxh.h>
1032 +#include <bcmenetphy.h>
1033 +
1034 +#define BCMENET_NFILTERS 64 /* # ethernet address filter entries */
1035 +#define BCMENET_MCHASHBASE 0x200 /* multicast hash filter base address */
1036 +#define BCMENET_MCHASHSIZE 256 /* multicast hash filter size in bytes */
1037 +#define BCMENET_MAX_DMA 4096 /* chip has 12 bits of DMA addressing */
1038 +
1039 +/* power management event wakeup pattern constants */
1040 +#define BCMENET_NPMP 4 /* chip supports 4 wakeup patterns */
1041 +#define BCMENET_PMPBASE 0x400 /* wakeup pattern base address */
1042 +#define BCMENET_PMPSIZE 0x80 /* 128bytes each pattern */
1043 +#define BCMENET_PMMBASE 0x600 /* wakeup mask base address */
1044 +#define BCMENET_PMMSIZE 0x10 /* 128bits each mask */
1045 +
1046 +/* cpp contortions to concatenate w/arg prescan */
1047 +#ifndef PAD
1048 +#define _PADLINE(line) pad ## line
1049 +#define _XSTR(line) _PADLINE(line)
1050 +#define PAD _XSTR(__LINE__)
1051 +#endif /* PAD */
1052 +
1053 +/*
1054 + * Host Interface Registers
1055 + */
1056 +typedef volatile struct _bcmenettregs {
1057 + /* Device and Power Control */
1058 + uint32 devcontrol;
1059 + uint32 PAD[2];
1060 + uint32 biststatus;
1061 + uint32 wakeuplength;
1062 + uint32 PAD[3];
1063 +
1064 + /* Interrupt Control */
1065 + uint32 intstatus;
1066 + uint32 intmask;
1067 + uint32 gptimer;
1068 + uint32 PAD[23];
1069 +
1070 + /* Ethernet MAC Address Filtering Control */
1071 + uint32 PAD[2];
1072 + uint32 enetftaddr;
1073 + uint32 enetftdata;
1074 + uint32 PAD[2];
1075 +
1076 + /* Ethernet MAC Control */
1077 + uint32 emactxmaxburstlen;
1078 + uint32 emacrxmaxburstlen;
1079 + uint32 emaccontrol;
1080 + uint32 emacflowcontrol;
1081 +
1082 + uint32 PAD[20];
1083 +
1084 + /* DMA Lazy Interrupt Control */
1085 + uint32 intrecvlazy;
1086 + uint32 PAD[63];
1087 +
1088 + /* DMA engine */
1089 + dma32regp_t dmaregs;
1090 + dma32diag_t dmafifo;
1091 + uint32 PAD[116];
1092 +
1093 + /* EMAC Registers */
1094 + uint32 rxconfig;
1095 + uint32 rxmaxlength;
1096 + uint32 txmaxlength;
1097 + uint32 PAD;
1098 + uint32 mdiocontrol;
1099 + uint32 mdiodata;
1100 + uint32 emacintmask;
1101 + uint32 emacintstatus;
1102 + uint32 camdatalo;
1103 + uint32 camdatahi;
1104 + uint32 camcontrol;
1105 + uint32 enetcontrol;
1106 + uint32 txcontrol;
1107 + uint32 txwatermark;
1108 + uint32 mibcontrol;
1109 + uint32 PAD[49];
1110 +
1111 + /* EMAC MIB counters */
1112 + bcmenetmib_t mib;
1113 +
1114 + uint32 PAD[585];
1115 +
1116 + /* Sonics SiliconBackplane config registers */
1117 + sbconfig_t sbconfig;
1118 +} bcmenetregs_t;
1119 +
1120 +/* device control */
1121 +#define DC_PM ((uint32)1 << 7) /* pattern filtering enable */
1122 +#define DC_IP ((uint32)1 << 10) /* internal ephy present (rev >= 1) */
1123 +#define DC_ER ((uint32)1 << 15) /* ephy reset */
1124 +#define DC_MP ((uint32)1 << 16) /* mii phy mode enable */
1125 +#define DC_CO ((uint32)1 << 17) /* mii phy mode: enable clocks */
1126 +#define DC_PA_MASK 0x7c0000 /* mii phy mode: mdc/mdio phy address */
1127 +#define DC_PA_SHIFT 18
1128 +#define DC_FS_MASK 0x03800000 /* fifo size (rev >= 8) */
1129 +#define DC_FS_SHIFT 23
1130 +#define DC_FS_4K 0 /* 4Kbytes */
1131 +#define DC_FS_512 1 /* 512bytes */
1132 +
1133 +/* wakeup length */
1134 +#define WL_P0_MASK 0x7f /* pattern 0 */
1135 +#define WL_D0 ((uint32)1 << 7)
1136 +#define WL_P1_MASK 0x7f00 /* pattern 1 */
1137 +#define WL_P1_SHIFT 8
1138 +#define WL_D1 ((uint32)1 << 15)
1139 +#define WL_P2_MASK 0x7f0000 /* pattern 2 */
1140 +#define WL_P2_SHIFT 16
1141 +#define WL_D2 ((uint32)1 << 23)
1142 +#define WL_P3_MASK 0x7f000000 /* pattern 3 */
1143 +#define WL_P3_SHIFT 24
1144 +#define WL_D3 ((uint32)1 << 31)
1145 +
1146 +/* intstatus and intmask */
1147 +#define I_PME ((uint32)1 << 6) /* power management event */
1148 +#define I_TO ((uint32)1 << 7) /* general purpose timeout */
1149 +#define I_PC ((uint32)1 << 10) /* descriptor error */
1150 +#define I_PD ((uint32)1 << 11) /* data error */
1151 +#define I_DE ((uint32)1 << 12) /* descriptor protocol error */
1152 +#define I_RU ((uint32)1 << 13) /* receive descriptor underflow */
1153 +#define I_RO ((uint32)1 << 14) /* receive fifo overflow */
1154 +#define I_XU ((uint32)1 << 15) /* transmit fifo underflow */
1155 +#define I_RI ((uint32)1 << 16) /* receive interrupt */
1156 +#define I_XI ((uint32)1 << 24) /* transmit interrupt */
1157 +#define I_EM ((uint32)1 << 26) /* emac interrupt */
1158 +#define I_MW ((uint32)1 << 27) /* mii write */
1159 +#define I_MR ((uint32)1 << 28) /* mii read */
1160 +
1161 +/* emaccontrol */
1162 +#define EMC_CG ((uint32)1 << 0) /* crc32 generation enable */
1163 +#define EMC_EP ((uint32)1 << 2) /* onchip ephy: powerdown (rev >= 1) */
1164 +#define EMC_ED ((uint32)1 << 3) /* onchip ephy: energy detected (rev >= 1) */
1165 +#define EMC_LC_MASK 0xe0 /* onchip ephy: led control (rev >= 1) */
1166 +#define EMC_LC_SHIFT 5
1167 +
1168 +/* emacflowcontrol */
1169 +#define EMF_RFH_MASK 0xff /* rx fifo hi water mark */
1170 +#define EMF_PG ((uint32)1 << 15) /* enable pause frame generation */
1171 +
1172 +/* interrupt receive lazy */
1173 +#define IRL_TO_MASK 0x00ffffff /* timeout */
1174 +#define IRL_FC_MASK 0xff000000 /* frame count */
1175 +#define IRL_FC_SHIFT 24 /* frame count */
1176 +
1177 +/* emac receive config */
1178 +#define ERC_DB ((uint32)1 << 0) /* disable broadcast */
1179 +#define ERC_AM ((uint32)1 << 1) /* accept all multicast */
1180 +#define ERC_RDT ((uint32)1 << 2) /* receive disable while transmitting */
1181 +#define ERC_PE ((uint32)1 << 3) /* promiscuous enable */
1182 +#define ERC_LE ((uint32)1 << 4) /* loopback enable */
1183 +#define ERC_FE ((uint32)1 << 5) /* enable flow control */
1184 +#define ERC_UF ((uint32)1 << 6) /* accept unicast flow control frame */
1185 +#define ERC_RF ((uint32)1 << 7) /* reject filter */
1186 +#define ERC_CA ((uint32)1 << 8) /* cam absent */
1187 +
1188 +/* emac mdio control */
1189 +#define MC_MF_MASK 0x7f /* mdc frequency */
1190 +#define MC_PE ((uint32)1 << 7) /* mii preamble enable */
1191 +
1192 +/* emac mdio data */
1193 +#define MD_DATA_MASK 0xffff /* r/w data */
1194 +#define MD_TA_MASK 0x30000 /* turnaround value */
1195 +#define MD_TA_SHIFT 16
1196 +#define MD_TA_VALID (2 << MD_TA_SHIFT) /* valid ta */
1197 +#define MD_RA_MASK 0x7c0000 /* register address */
1198 +#define MD_RA_SHIFT 18
1199 +#define MD_PMD_MASK 0xf800000 /* physical media device */
1200 +#define MD_PMD_SHIFT 23
1201 +#define MD_OP_MASK 0x30000000 /* opcode */
1202 +#define MD_OP_SHIFT 28
1203 +#define MD_OP_WRITE (1 << MD_OP_SHIFT) /* write op */
1204 +#define MD_OP_READ (2 << MD_OP_SHIFT) /* read op */
1205 +#define MD_SB_MASK 0xc0000000 /* start bits */
1206 +#define MD_SB_SHIFT 30
1207 +#define MD_SB_START (0x1 << MD_SB_SHIFT) /* start of frame */
1208 +
1209 +/* emac intstatus and intmask */
1210 +#define EI_MII ((uint32)1 << 0) /* mii mdio interrupt */
1211 +#define EI_MIB ((uint32)1 << 1) /* mib interrupt */
1212 +#define EI_FLOW ((uint32)1 << 2) /* flow control interrupt */
1213 +
1214 +/* emac cam data high */
1215 +#define CD_V ((uint32)1 << 16) /* valid bit */
1216 +
1217 +/* emac cam control */
1218 +#define CC_CE ((uint32)1 << 0) /* cam enable */
1219 +#define CC_MS ((uint32)1 << 1) /* mask select */
1220 +#define CC_RD ((uint32)1 << 2) /* read */
1221 +#define CC_WR ((uint32)1 << 3) /* write */
1222 +#define CC_INDEX_MASK 0x3f0000 /* index */
1223 +#define CC_INDEX_SHIFT 16
1224 +#define CC_CB ((uint32)1 << 31) /* cam busy */
1225 +
1226 +/* emac ethernet control */
1227 +#define EC_EE ((uint32)1 << 0) /* emac enable */
1228 +#define EC_ED ((uint32)1 << 1) /* emac disable */
1229 +#define EC_ES ((uint32)1 << 2) /* emac soft reset */
1230 +#define EC_EP ((uint32)1 << 3) /* external phy select */
1231 +
1232 +/* emac transmit control */
1233 +#define EXC_FD ((uint32)1 << 0) /* full duplex */
1234 +#define EXC_FM ((uint32)1 << 1) /* flowmode */
1235 +#define EXC_SB ((uint32)1 << 2) /* single backoff enable */
1236 +#define EXC_SS ((uint32)1 << 3) /* small slottime */
1237 +
1238 +/* emac mib control */
1239 +#define EMC_RZ ((uint32)1 << 0) /* autoclear on read */
1240 +
1241 +#endif /* _bcmenet_47xx_h_ */
1242 diff -urN linux.old/arch/mips/bcm947xx/include/bcmenetmib.h linux.dev/arch/mips/bcm947xx/include/bcmenetmib.h
1243 --- linux.old/arch/mips/bcm947xx/include/bcmenetmib.h 1970-01-01 01:00:00.000000000 +0100
1244 +++ linux.dev/arch/mips/bcm947xx/include/bcmenetmib.h 2005-11-07 21:57:07.845585750 +0100
1245 @@ -0,0 +1,81 @@
1246 +/*
1247 + * Hardware-specific MIB definition for
1248 + * Broadcom Home Networking Division
1249 + * BCM44XX and BCM47XX 10/100 Mbps Ethernet cores.
1250 + *
1251 + * Copyright 2005, Broadcom Corporation
1252 + * All Rights Reserved.
1253 + *
1254 + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
1255 + * the contents of this file may not be disclosed to third parties, copied
1256 + * or duplicated in any form, in whole or in part, without the prior
1257 + * written permission of Broadcom Corporation.
1258 + * $Id$
1259 + */
1260 +
1261 +#ifndef _bcmenetmib_h_
1262 +#define _bcmenetmib_h_
1263 +
1264 +/* cpp contortions to concatenate w/arg prescan */
1265 +#ifndef PAD
1266 +#define _PADLINE(line) pad ## line
1267 +#define _XSTR(line) _PADLINE(line)
1268 +#define PAD _XSTR(__LINE__)
1269 +#endif /* PAD */
1270 +
1271 +/*
1272 + * EMAC MIB Registers
1273 + */
1274 +typedef volatile struct {
1275 + uint32 tx_good_octets;
1276 + uint32 tx_good_pkts;
1277 + uint32 tx_octets;
1278 + uint32 tx_pkts;
1279 + uint32 tx_broadcast_pkts;
1280 + uint32 tx_multicast_pkts;
1281 + uint32 tx_len_64;
1282 + uint32 tx_len_65_to_127;
1283 + uint32 tx_len_128_to_255;
1284 + uint32 tx_len_256_to_511;
1285 + uint32 tx_len_512_to_1023;
1286 + uint32 tx_len_1024_to_max;
1287 + uint32 tx_jabber_pkts;
1288 + uint32 tx_oversize_pkts;
1289 + uint32 tx_fragment_pkts;
1290 + uint32 tx_underruns;
1291 + uint32 tx_total_cols;
1292 + uint32 tx_single_cols;
1293 + uint32 tx_multiple_cols;
1294 + uint32 tx_excessive_cols;
1295 + uint32 tx_late_cols;
1296 + uint32 tx_defered;
1297 + uint32 tx_carrier_lost;
1298 + uint32 tx_pause_pkts;
1299 + uint32 PAD[8];
1300 +
1301 + uint32 rx_good_octets;
1302 + uint32 rx_good_pkts;
1303 + uint32 rx_octets;
1304 + uint32 rx_pkts;
1305 + uint32 rx_broadcast_pkts;
1306 + uint32 rx_multicast_pkts;
1307 + uint32 rx_len_64;
1308 + uint32 rx_len_65_to_127;
1309 + uint32 rx_len_128_to_255;
1310 + uint32 rx_len_256_to_511;
1311 + uint32 rx_len_512_to_1023;
1312 + uint32 rx_len_1024_to_max;
1313 + uint32 rx_jabber_pkts;
1314 + uint32 rx_oversize_pkts;
1315 + uint32 rx_fragment_pkts;
1316 + uint32 rx_missed_pkts;
1317 + uint32 rx_crc_align_errs;
1318 + uint32 rx_undersize;
1319 + uint32 rx_crc_errs;
1320 + uint32 rx_align_errs;
1321 + uint32 rx_symbol_errs;
1322 + uint32 rx_pause_pkts;
1323 + uint32 rx_nonpause_pkts;
1324 +} bcmenetmib_t;
1325 +
1326 +#endif /* _bcmenetmib_h_ */
1327 diff -urN linux.old/arch/mips/bcm947xx/include/bcmenetphy.h linux.dev/arch/mips/bcm947xx/include/bcmenetphy.h
1328 --- linux.old/arch/mips/bcm947xx/include/bcmenetphy.h 1970-01-01 01:00:00.000000000 +0100
1329 +++ linux.dev/arch/mips/bcm947xx/include/bcmenetphy.h 2005-11-07 21:57:07.845585750 +0100
1330 @@ -0,0 +1,58 @@
1331 +/*
1332 + * Misc Broadcom BCM47XX MDC/MDIO enet phy definitions.
1333 + *
1334 + * Copyright 2005, Broadcom Corporation
1335 + * All Rights Reserved.
1336 + *
1337 + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
1338 + * the contents of this file may not be disclosed to third parties, copied
1339 + * or duplicated in any form, in whole or in part, without the prior
1340 + * written permission of Broadcom Corporation.
1341 + * $Id$
1342 + */
1343 +
1344 +#ifndef _bcmenetphy_h_
1345 +#define _bcmenetphy_h_
1346 +
1347 +/* phy address */
1348 +#define MAXEPHY 32 /* mdio phy addresses are 5bit quantities */
1349 +#define EPHY_MASK 0x1f
1350 +#define EPHY_NONE 31 /* nvram: no phy present at all */
1351 +#define EPHY_NOREG 30 /* nvram: no local phy regs */
1352 +
1353 +/* just a few phy registers */
1354 +#define CTL_RESET (1 << 15) /* reset */
1355 +#define CTL_LOOP (1 << 14) /* loopback */
1356 +#define CTL_SPEED (1 << 13) /* speed selection 0=10, 1=100 */
1357 +#define CTL_ANENAB (1 << 12) /* autonegotiation enable */
1358 +#define CTL_RESTART (1 << 9) /* restart autonegotiation */
1359 +#define CTL_DUPLEX (1 << 8) /* duplex mode 0=half, 1=full */
1360 +
1361 +#define ADV_10FULL (1 << 6) /* autonegotiate advertise 10full */
1362 +#define ADV_10HALF (1 << 5) /* autonegotiate advertise 10half */
1363 +#define ADV_100FULL (1 << 8) /* autonegotiate advertise 100full */
1364 +#define ADV_100HALF (1 << 7) /* autonegotiate advertise 100half */
1365 +
1366 +/* link partner ability register */
1367 +#define LPA_SLCT 0x001f /* same as advertise selector */
1368 +#define LPA_10HALF 0x0020 /* can do 10mbps half-duplex */
1369 +#define LPA_10FULL 0x0040 /* can do 10mbps full-duplex */
1370 +#define LPA_100HALF 0x0080 /* can do 100mbps half-duplex */
1371 +#define LPA_100FULL 0x0100 /* can do 100mbps full-duplex */
1372 +#define LPA_100BASE4 0x0200 /* can do 100mbps 4k packets */
1373 +#define LPA_RESV 0x1c00 /* unused */
1374 +#define LPA_RFAULT 0x2000 /* link partner faulted */
1375 +#define LPA_LPACK 0x4000 /* link partner acked us */
1376 +#define LPA_NPAGE 0x8000 /* next page bit */
1377 +
1378 +#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
1379 +#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
1380 +
1381 +#define STAT_REMFAULT (1 << 4) /* remote fault */
1382 +#define STAT_LINK (1 << 2) /* link status */
1383 +#define STAT_JAB (1 << 1) /* jabber detected */
1384 +#define AUX_FORCED (1 << 2) /* forced 10/100 */
1385 +#define AUX_SPEED (1 << 1) /* speed 0=10mbps 1=100mbps */
1386 +#define AUX_DUPLEX (1 << 0) /* duplex 0=half 1=full */
1387 +
1388 +#endif /* _bcmenetphy_h_ */
1389 diff -urN linux.old/arch/mips/bcm947xx/include/bcmenetrxh.h linux.dev/arch/mips/bcm947xx/include/bcmenetrxh.h
1390 --- linux.old/arch/mips/bcm947xx/include/bcmenetrxh.h 1970-01-01 01:00:00.000000000 +0100
1391 +++ linux.dev/arch/mips/bcm947xx/include/bcmenetrxh.h 2005-11-07 21:57:07.845585750 +0100
1392 @@ -0,0 +1,43 @@
1393 +/*
1394 + * Hardware-specific Receive Data Header for the
1395 + * Broadcom Home Networking Division
1396 + * BCM44XX and BCM47XX 10/100 Mbps Ethernet cores.
1397 + *
1398 + * Copyright 2005, Broadcom Corporation
1399 + * All Rights Reserved.
1400 + *
1401 + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
1402 + * the contents of this file may not be disclosed to third parties, copied
1403 + * or duplicated in any form, in whole or in part, without the prior
1404 + * written permission of Broadcom Corporation.
1405 + * $Id$
1406 + */
1407 +
1408 +#ifndef _bcmenetrxh_h_
1409 +#define _bcmenetrxh_h_
1410 +
1411 +/*
1412 + * The Ethernet MAC core returns an 8-byte Receive Frame Data Header
1413 + * with every frame consisting of
1414 + * 16bits of frame length, followed by
1415 + * 16bits of EMAC rx descriptor info, followed by 32bits of undefined.
1416 + */
1417 +typedef volatile struct {
1418 + uint16 len;
1419 + uint16 flags;
1420 + uint16 pad[12];
1421 +} bcmenetrxh_t;
1422 +
1423 +#define RXHDR_LEN 28
1424 +
1425 +#define RXF_L ((uint16)1 << 11) /* last buffer in a frame */
1426 +#define RXF_MISS ((uint16)1 << 7) /* received due to promisc mode */
1427 +#define RXF_BRDCAST ((uint16)1 << 6) /* dest is broadcast address */
1428 +#define RXF_MULT ((uint16)1 << 5) /* dest is multicast address */
1429 +#define RXF_LG ((uint16)1 << 4) /* frame length > rxmaxlength */
1430 +#define RXF_NO ((uint16)1 << 3) /* odd number of nibbles */
1431 +#define RXF_RXER ((uint16)1 << 2) /* receive symbol error */
1432 +#define RXF_CRC ((uint16)1 << 1) /* crc error */
1433 +#define RXF_OV ((uint16)1 << 0) /* fifo overflow */
1434 +
1435 +#endif /* _bcmenetrxh_h_ */
1436 diff -urN linux.old/arch/mips/bcm947xx/include/bcmnvram.h linux.dev/arch/mips/bcm947xx/include/bcmnvram.h
1437 --- linux.old/arch/mips/bcm947xx/include/bcmnvram.h 1970-01-01 01:00:00.000000000 +0100
1438 +++ linux.dev/arch/mips/bcm947xx/include/bcmnvram.h 2005-11-07 22:51:38.772725750 +0100
1439 @@ -0,0 +1,141 @@
1440 +/*
1441 + * NVRAM variable manipulation
1442 + *
1443 + * Copyright 2005, Broadcom Corporation
1444 + * All Rights Reserved.
1445 + *
1446 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
1447 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
1448 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
1449 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
1450 + *
1451 + * $Id$
1452 + */
1453 +
1454 +#ifndef _bcmnvram_h_
1455 +#define _bcmnvram_h_
1456 +
1457 +#ifndef _LANGUAGE_ASSEMBLY
1458 +
1459 +#include <typedefs.h>
1460 +
1461 +struct nvram_header {
1462 + uint32 magic;
1463 + uint32 len;
1464 + uint32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
1465 + uint32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
1466 + uint32 config_ncdl; /* ncdl values for memc */
1467 +};
1468 +
1469 +struct nvram_tuple {
1470 + char *name;
1471 + char *value;
1472 + struct nvram_tuple *next;
1473 +};
1474 +
1475 +/*
1476 + * Initialize NVRAM access. May be unnecessary or undefined on certain
1477 + * platforms.
1478 + */
1479 +extern int BCMINIT(nvram_init)(void *sbh);
1480 +
1481 +/*
1482 + * Disable NVRAM access. May be unnecessary or undefined on certain
1483 + * platforms.
1484 + */
1485 +extern void BCMINIT(nvram_exit)(void *sbh);
1486 +
1487 +/*
1488 + * Get the value of an NVRAM variable. The pointer returned may be
1489 + * invalid after a set.
1490 + * @param name name of variable to get
1491 + * @return value of variable or NULL if undefined
1492 + */
1493 +extern char * BCMINIT(nvram_get)(const char *name);
1494 +
1495 +/*
1496 + * Read the reset GPIO value from the nvram and set the GPIO
1497 + * as input
1498 + */
1499 +extern int BCMINITFN(nvram_resetgpio_init)(void *sbh);
1500 +
1501 +/*
1502 + * Get the value of an NVRAM variable.
1503 + * @param name name of variable to get
1504 + * @return value of variable or NUL if undefined
1505 + */
1506 +#define nvram_safe_get(name) (BCMINIT(nvram_get)(name) ? : "")
1507 +
1508 +/*
1509 + * Match an NVRAM variable.
1510 + * @param name name of variable to match
1511 + * @param match value to compare against value of variable
1512 + * @return TRUE if variable is defined and its value is string equal
1513 + * to match or FALSE otherwise
1514 + */
1515 +static INLINE int
1516 +nvram_match(char *name, char *match) {
1517 + const char *value = BCMINIT(nvram_get)(name);
1518 + return (value && !strcmp(value, match));
1519 +}
1520 +
1521 +/*
1522 + * Inversely match an NVRAM variable.
1523 + * @param name name of variable to match
1524 + * @param match value to compare against value of variable
1525 + * @return TRUE if variable is defined and its value is not string
1526 + * equal to invmatch or FALSE otherwise
1527 + */
1528 +static INLINE int
1529 +nvram_invmatch(char *name, char *invmatch) {
1530 + const char *value = BCMINIT(nvram_get)(name);
1531 + return (value && strcmp(value, invmatch));
1532 +}
1533 +
1534 +/*
1535 + * Set the value of an NVRAM variable. The name and value strings are
1536 + * copied into private storage. Pointers to previously set values
1537 + * may become invalid. The new value may be immediately
1538 + * retrieved but will not be permanently stored until a commit.
1539 + * @param name name of variable to set
1540 + * @param value value of variable
1541 + * @return 0 on success and errno on failure
1542 + */
1543 +extern int BCMINIT(nvram_set)(const char *name, const char *value);
1544 +
1545 +/*
1546 + * Unset an NVRAM variable. Pointers to previously set values
1547 + * remain valid until a set.
1548 + * @param name name of variable to unset
1549 + * @return 0 on success and errno on failure
1550 + * NOTE: use nvram_commit to commit this change to flash.
1551 + */
1552 +extern int BCMINIT(nvram_unset)(const char *name);
1553 +
1554 +/*
1555 + * Commit NVRAM variables to permanent storage. All pointers to values
1556 + * may be invalid after a commit.
1557 + * NVRAM values are undefined after a commit.
1558 + * @return 0 on success and errno on failure
1559 + */
1560 +extern int BCMINIT(nvram_commit)(void);
1561 +
1562 +/*
1563 + * Get all NVRAM variables (format name=value\0 ... \0\0).
1564 + * @param buf buffer to store variables
1565 + * @param count size of buffer in bytes
1566 + * @return 0 on success and errno on failure
1567 + */
1568 +extern int BCMINIT(nvram_getall)(char *buf, int count);
1569 +
1570 +#endif /* _LANGUAGE_ASSEMBLY */
1571 +
1572 +#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */
1573 +#define NVRAM_VERSION 1
1574 +#define NVRAM_HEADER_SIZE 20
1575 +#define NVRAM_SPACE 0x8000
1576 +
1577 +#define NVRAM_MAX_VALUE_LEN 255
1578 +#define NVRAM_MAX_PARAM_LEN 64
1579 +
1580 +#endif /* _bcmnvram_h_ */
1581 diff -urN linux.old/arch/mips/bcm947xx/include/bcmparams.h linux.dev/arch/mips/bcm947xx/include/bcmparams.h
1582 --- linux.old/arch/mips/bcm947xx/include/bcmparams.h 1970-01-01 01:00:00.000000000 +0100
1583 +++ linux.dev/arch/mips/bcm947xx/include/bcmparams.h 2005-11-07 22:51:38.776726000 +0100
1584 @@ -0,0 +1,25 @@
1585 +/*
1586 + * Misc system wide parameters.
1587 + *
1588 + * Copyright 2005, Broadcom Corporation
1589 + * All Rights Reserved.
1590 + *
1591 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
1592 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
1593 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
1594 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
1595 + * $Id$
1596 + */
1597 +
1598 +#ifndef _bcmparams_h_
1599 +#define _bcmparams_h_
1600 +
1601 +#define VLAN_MAXVID 15 /* Max. VLAN ID supported/allowed */
1602 +
1603 +#define VLAN_NUMPRIS 8 /* # of prio, start from 0 */
1604 +
1605 +#define DEV_NUMIFS 16 /* Max. # of devices/interfaces supported */
1606 +
1607 +#define WL_MAXBSSCFG 16 /* maximum number of BSS Configs we can configure */
1608 +
1609 +#endif
1610 diff -urN linux.old/arch/mips/bcm947xx/include/bcmsrom.h linux.dev/arch/mips/bcm947xx/include/bcmsrom.h
1611 --- linux.old/arch/mips/bcm947xx/include/bcmsrom.h 1970-01-01 01:00:00.000000000 +0100
1612 +++ linux.dev/arch/mips/bcm947xx/include/bcmsrom.h 2005-11-07 22:51:38.776726000 +0100
1613 @@ -0,0 +1,23 @@
1614 +/*
1615 + * Misc useful routines to access NIC local SROM/OTP .
1616 + *
1617 + * Copyright 2005, Broadcom Corporation
1618 + * All Rights Reserved.
1619 + *
1620 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
1621 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
1622 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
1623 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
1624 + *
1625 + * $Id$
1626 + */
1627 +
1628 +#ifndef _bcmsrom_h_
1629 +#define _bcmsrom_h_
1630 +
1631 +extern int srom_var_init(void *sbh, uint bus, void *curmap, osl_t *osh, char **vars, int *count);
1632 +
1633 +extern int srom_read(uint bus, void *curmap, osl_t *osh, uint byteoff, uint nbytes, uint16 *buf);
1634 +extern int srom_write(uint bus, void *curmap, osl_t *osh, uint byteoff, uint nbytes, uint16 *buf);
1635 +
1636 +#endif /* _bcmsrom_h_ */
1637 diff -urN linux.old/arch/mips/bcm947xx/include/bcmutils.h linux.dev/arch/mips/bcm947xx/include/bcmutils.h
1638 --- linux.old/arch/mips/bcm947xx/include/bcmutils.h 1970-01-01 01:00:00.000000000 +0100
1639 +++ linux.dev/arch/mips/bcm947xx/include/bcmutils.h 2005-11-07 22:51:38.776726000 +0100
1640 @@ -0,0 +1,313 @@
1641 +/*
1642 + * Misc useful os-independent macros and functions.
1643 + *
1644 + * Copyright 2005, Broadcom Corporation
1645 + * All Rights Reserved.
1646 + *
1647 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
1648 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
1649 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
1650 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
1651 + * $Id$
1652 + */
1653 +
1654 +#ifndef _bcmutils_h_
1655 +#define _bcmutils_h_
1656 +
1657 +/*** driver-only section ***/
1658 +#ifdef BCMDRIVER
1659 +#include <osl.h>
1660 +
1661 +#define _BCM_U 0x01 /* upper */
1662 +#define _BCM_L 0x02 /* lower */
1663 +#define _BCM_D 0x04 /* digit */
1664 +#define _BCM_C 0x08 /* cntrl */
1665 +#define _BCM_P 0x10 /* punct */
1666 +#define _BCM_S 0x20 /* white space (space/lf/tab) */
1667 +#define _BCM_X 0x40 /* hex digit */
1668 +#define _BCM_SP 0x80 /* hard space (0x20) */
1669 +
1670 +#define GPIO_PIN_NOTDEFINED 0x20
1671 +
1672 +extern unsigned char bcm_ctype[];
1673 +#define bcm_ismask(x) (bcm_ctype[(int)(unsigned char)(x)])
1674 +
1675 +#define bcm_isalnum(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L|_BCM_D)) != 0)
1676 +#define bcm_isalpha(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L)) != 0)
1677 +#define bcm_iscntrl(c) ((bcm_ismask(c)&(_BCM_C)) != 0)
1678 +#define bcm_isdigit(c) ((bcm_ismask(c)&(_BCM_D)) != 0)
1679 +#define bcm_isgraph(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D)) != 0)
1680 +#define bcm_islower(c) ((bcm_ismask(c)&(_BCM_L)) != 0)
1681 +#define bcm_isprint(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D|_BCM_SP)) != 0)
1682 +#define bcm_ispunct(c) ((bcm_ismask(c)&(_BCM_P)) != 0)
1683 +#define bcm_isspace(c) ((bcm_ismask(c)&(_BCM_S)) != 0)
1684 +#define bcm_isupper(c) ((bcm_ismask(c)&(_BCM_U)) != 0)
1685 +#define bcm_isxdigit(c) ((bcm_ismask(c)&(_BCM_D|_BCM_X)) != 0)
1686 +
1687 +/*
1688 + * Spin at most 'us' microseconds while 'exp' is true.
1689 + * Caller should explicitly test 'exp' when this completes
1690 + * and take appropriate error action if 'exp' is still true.
1691 + */
1692 +#define SPINWAIT(exp, us) { \
1693 + uint countdown = (us) + 9; \
1694 + while ((exp) && (countdown >= 10)) {\
1695 + OSL_DELAY(10); \
1696 + countdown -= 10; \
1697 + } \
1698 +}
1699 +
1700 +/* generic osl packet queue */
1701 +struct pktq {
1702 + void *head; /* first packet to dequeue */
1703 + void *tail; /* last packet to dequeue */
1704 + uint len; /* number of queued packets */
1705 + uint maxlen; /* maximum number of queued packets */
1706 + bool priority; /* enqueue by packet priority */
1707 + uint8 prio_map[MAXPRIO+1]; /* user priority to packet enqueue policy map */
1708 +};
1709 +#define DEFAULT_QLEN 128
1710 +
1711 +#define pktq_len(q) ((q)->len)
1712 +#define pktq_avail(q) ((q)->maxlen - (q)->len)
1713 +#define pktq_head(q) ((q)->head)
1714 +#define pktq_full(q) ((q)->len >= (q)->maxlen)
1715 +#define _pktq_pri(q, pri) ((q)->prio_map[pri])
1716 +#define pktq_tailpri(q) ((q)->tail ? _pktq_pri(q, PKTPRIO((q)->tail)) : _pktq_pri(q, 0))
1717 +
1718 +/* externs */
1719 +/* packet */
1720 +extern uint pktcopy(osl_t *osh, void *p, uint offset, int len, uchar *buf);
1721 +extern uint pkttotlen(osl_t *osh, void *);
1722 +extern void pktq_init(struct pktq *q, uint maxlen, const uint8 prio_map[]);
1723 +extern void pktenq(struct pktq *q, void *p, bool lifo);
1724 +extern void *pktdeq(struct pktq *q);
1725 +extern void *pktdeqtail(struct pktq *q);
1726 +/* string */
1727 +extern uint bcm_atoi(char *s);
1728 +extern uchar bcm_toupper(uchar c);
1729 +extern ulong bcm_strtoul(char *cp, char **endp, uint base);
1730 +extern char *bcmstrstr(char *haystack, char *needle);
1731 +extern char *bcmstrcat(char *dest, const char *src);
1732 +extern ulong wchar2ascii(char *abuf, ushort *wbuf, ushort wbuflen, ulong abuflen);
1733 +/* ethernet address */
1734 +extern char *bcm_ether_ntoa(char *ea, char *buf);
1735 +extern int bcm_ether_atoe(char *p, char *ea);
1736 +/* delay */
1737 +extern void bcm_mdelay(uint ms);
1738 +/* variable access */
1739 +extern char *getvar(char *vars, char *name);
1740 +extern int getintvar(char *vars, char *name);
1741 +extern uint getgpiopin(char *vars, char *pin_name, uint def_pin);
1742 +#define bcmlog(fmt, a1, a2)
1743 +#define bcmdumplog(buf, size) *buf = '\0'
1744 +#define bcmdumplogent(buf, idx) -1
1745 +
1746 +#endif /* #ifdef BCMDRIVER */
1747 +
1748 +/*** driver/apps-shared section ***/
1749 +
1750 +#define BCME_STRLEN 64
1751 +#define VALID_BCMERROR(e) ((e <= 0) && (e >= BCME_LAST))
1752 +
1753 +
1754 +/*
1755 + * error codes could be added but the defined ones shouldn't be changed/deleted
1756 + * these error codes are exposed to the user code
1757 + * when ever a new error code is added to this list
1758 + * please update errorstring table with the related error string and
1759 + * update osl files with os specific errorcode map
1760 +*/
1761 +
1762 +#define BCME_ERROR -1 /* Error generic */
1763 +#define BCME_BADARG -2 /* Bad Argument */
1764 +#define BCME_BADOPTION -3 /* Bad option */
1765 +#define BCME_NOTUP -4 /* Not up */
1766 +#define BCME_NOTDOWN -5 /* Not down */
1767 +#define BCME_NOTAP -6 /* Not AP */
1768 +#define BCME_NOTSTA -7 /* Not STA */
1769 +#define BCME_BADKEYIDX -8 /* BAD Key Index */
1770 +#define BCME_RADIOOFF -9 /* Radio Off */
1771 +#define BCME_NOTBANDLOCKED -10 /* Not bandlocked */
1772 +#define BCME_NOCLK -11 /* No Clock*/
1773 +#define BCME_BADRATESET -12 /* BAD RateSet*/
1774 +#define BCME_BADBAND -13 /* BAD Band */
1775 +#define BCME_BUFTOOSHORT -14 /* Buffer too short */
1776 +#define BCME_BUFTOOLONG -15 /* Buffer too Long */
1777 +#define BCME_BUSY -16 /* Busy*/
1778 +#define BCME_NOTASSOCIATED -17 /* Not associated*/
1779 +#define BCME_BADSSIDLEN -18 /* BAD SSID Len */
1780 +#define BCME_OUTOFRANGECHAN -19 /* Out of Range Channel*/
1781 +#define BCME_BADCHAN -20 /* BAD Channel */
1782 +#define BCME_BADADDR -21 /* BAD Address*/
1783 +#define BCME_NORESOURCE -22 /* No resources*/
1784 +#define BCME_UNSUPPORTED -23 /* Unsupported*/
1785 +#define BCME_BADLEN -24 /* Bad Length*/
1786 +#define BCME_NOTREADY -25 /* Not ready Yet*/
1787 +#define BCME_EPERM -26 /* Not Permitted */
1788 +#define BCME_NOMEM -27 /* No Memory */
1789 +#define BCME_ASSOCIATED -28 /* Associated */
1790 +#define BCME_RANGE -29 /* Range Error*/
1791 +#define BCME_NOTFOUND -30 /* Not found */
1792 +#define BCME_LAST BCME_NOTFOUND
1793 +
1794 +#ifndef ABS
1795 +#define ABS(a) (((a)<0)?-(a):(a))
1796 +#endif
1797 +
1798 +#ifndef MIN
1799 +#define MIN(a, b) (((a)<(b))?(a):(b))
1800 +#endif
1801 +
1802 +#ifndef MAX
1803 +#define MAX(a, b) (((a)>(b))?(a):(b))
1804 +#endif
1805 +
1806 +#define CEIL(x, y) (((x) + ((y)-1)) / (y))
1807 +#define ROUNDUP(x, y) ((((x)+((y)-1))/(y))*(y))
1808 +#define ISALIGNED(a, x) (((a) & ((x)-1)) == 0)
1809 +#define ISPOWEROF2(x) ((((x)-1)&(x))==0)
1810 +#define VALID_MASK(mask) !((mask) & ((mask) + 1))
1811 +#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member)
1812 +#define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0]))
1813 +
1814 +/* bit map related macros */
1815 +#ifndef setbit
1816 +#define NBBY 8 /* 8 bits per byte */
1817 +#define setbit(a,i) (((uint8 *)a)[(i)/NBBY] |= 1<<((i)%NBBY))
1818 +#define clrbit(a,i) (((uint8 *)a)[(i)/NBBY] &= ~(1<<((i)%NBBY)))
1819 +#define isset(a,i) (((uint8 *)a)[(i)/NBBY] & (1<<((i)%NBBY)))
1820 +#define isclr(a,i) ((((uint8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0)
1821 +#endif
1822 +
1823 +#define NBITS(type) (sizeof(type) * 8)
1824 +#define NBITVAL(bits) (1 << (bits))
1825 +#define MAXBITVAL(bits) ((1 << (bits)) - 1)
1826 +
1827 +/* crc defines */
1828 +#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */
1829 +#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */
1830 +#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */
1831 +#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */
1832 +#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
1833 +#define CRC32_GOOD_VALUE 0xdebb20e3 /* Good final CRC32 checksum value */
1834 +
1835 +/* bcm_format_flags() bit description structure */
1836 +typedef struct bcm_bit_desc {
1837 + uint32 bit;
1838 + char* name;
1839 +} bcm_bit_desc_t;
1840 +
1841 +/* tag_ID/length/value_buffer tuple */
1842 +typedef struct bcm_tlv {
1843 + uint8 id;
1844 + uint8 len;
1845 + uint8 data[1];
1846 +} bcm_tlv_t;
1847 +
1848 +/* Check that bcm_tlv_t fits into the given buflen */
1849 +#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len))
1850 +
1851 +/* buffer length for ethernet address from bcm_ether_ntoa() */
1852 +#define ETHER_ADDR_STR_LEN 18
1853 +
1854 +/* unaligned load and store macros */
1855 +#ifdef IL_BIGENDIAN
1856 +static INLINE uint32
1857 +load32_ua(uint8 *a)
1858 +{
1859 + return ((a[0] << 24) | (a[1] << 16) | (a[2] << 8) | a[3]);
1860 +}
1861 +
1862 +static INLINE void
1863 +store32_ua(uint8 *a, uint32 v)
1864 +{
1865 + a[0] = (v >> 24) & 0xff;
1866 + a[1] = (v >> 16) & 0xff;
1867 + a[2] = (v >> 8) & 0xff;
1868 + a[3] = v & 0xff;
1869 +}
1870 +
1871 +static INLINE uint16
1872 +load16_ua(uint8 *a)
1873 +{
1874 + return ((a[0] << 8) | a[1]);
1875 +}
1876 +
1877 +static INLINE void
1878 +store16_ua(uint8 *a, uint16 v)
1879 +{
1880 + a[0] = (v >> 8) & 0xff;
1881 + a[1] = v & 0xff;
1882 +}
1883 +
1884 +#else
1885 +
1886 +static INLINE uint32
1887 +load32_ua(uint8 *a)
1888 +{
1889 + return ((a[3] << 24) | (a[2] << 16) | (a[1] << 8) | a[0]);
1890 +}
1891 +
1892 +static INLINE void
1893 +store32_ua(uint8 *a, uint32 v)
1894 +{
1895 + a[3] = (v >> 24) & 0xff;
1896 + a[2] = (v >> 16) & 0xff;
1897 + a[1] = (v >> 8) & 0xff;
1898 + a[0] = v & 0xff;
1899 +}
1900 +
1901 +static INLINE uint16
1902 +load16_ua(uint8 *a)
1903 +{
1904 + return ((a[1] << 8) | a[0]);
1905 +}
1906 +
1907 +static INLINE void
1908 +store16_ua(uint8 *a, uint16 v)
1909 +{
1910 + a[1] = (v >> 8) & 0xff;
1911 + a[0] = v & 0xff;
1912 +}
1913 +
1914 +#endif
1915 +
1916 +/* externs */
1917 +/* crc */
1918 +extern uint8 hndcrc8(uint8 *p, uint nbytes, uint8 crc);
1919 +extern uint16 hndcrc16(uint8 *p, uint nbytes, uint16 crc);
1920 +extern uint32 hndcrc32(uint8 *p, uint nbytes, uint32 crc);
1921 +/* format/print */
1922 +/* IE parsing */
1923 +extern bcm_tlv_t *bcm_next_tlv(bcm_tlv_t *elt, int *buflen);
1924 +extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key);
1925 +extern bcm_tlv_t *bcm_parse_ordered_tlvs(void *buf, int buflen, uint key);
1926 +
1927 +/* bcmerror*/
1928 +extern const char *bcmerrorstr(int bcmerror);
1929 +
1930 +/* multi-bool data type: set of bools, mbool is true if any is set */
1931 +typedef uint32 mbool;
1932 +#define mboolset(mb, bit) (mb |= bit) /* set one bool */
1933 +#define mboolclr(mb, bit) (mb &= ~bit) /* clear one bool */
1934 +#define mboolisset(mb, bit) ((mb & bit) != 0) /* TRUE if one bool is set */
1935 +#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val)))
1936 +
1937 +/* power conversion */
1938 +extern uint16 bcm_qdbm_to_mw(uint8 qdbm);
1939 +extern uint8 bcm_mw_to_qdbm(uint16 mw);
1940 +
1941 +/* generic datastruct to help dump routines */
1942 +struct fielddesc {
1943 + char *nameandfmt;
1944 + uint32 offset;
1945 + uint32 len;
1946 +};
1947 +
1948 +typedef uint32 (*readreg_rtn)(void *arg0, void *arg1, uint32 offset);
1949 +extern uint bcmdumpfields(readreg_rtn func_ptr, void *arg0, void *arg1, struct fielddesc *str, char *buf, uint32 bufsize);
1950 +
1951 +extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint len);
1952 +
1953 +#endif /* _bcmutils_h_ */
1954 diff -urN linux.old/arch/mips/bcm947xx/include/bitfuncs.h linux.dev/arch/mips/bcm947xx/include/bitfuncs.h
1955 --- linux.old/arch/mips/bcm947xx/include/bitfuncs.h 1970-01-01 01:00:00.000000000 +0100
1956 +++ linux.dev/arch/mips/bcm947xx/include/bitfuncs.h 2005-11-07 21:57:07.849586000 +0100
1957 @@ -0,0 +1,85 @@
1958 +/*
1959 + * bit manipulation utility functions
1960 + *
1961 + * Copyright 2005, Broadcom Corporation
1962 + * All Rights Reserved.
1963 + *
1964 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
1965 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
1966 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
1967 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
1968 + * $Id$
1969 + */
1970 +
1971 +#ifndef _BITFUNCS_H
1972 +#define _BITFUNCS_H
1973 +
1974 +#include <typedefs.h>
1975 +
1976 +/* local prototypes */
1977 +static INLINE uint32 find_msbit(uint32 x);
1978 +
1979 +
1980 +/*
1981 + * find_msbit: returns index of most significant set bit in x, with index
1982 + * range defined as 0-31. NOTE: returns zero if input is zero.
1983 + */
1984 +
1985 +#if defined(USE_PENTIUM_BSR) && defined(__GNUC__)
1986 +
1987 +/*
1988 + * Implementation for Pentium processors and gcc. Note that this
1989 + * instruction is actually very slow on some processors (e.g., family 5,
1990 + * model 2, stepping 12, "Pentium 75 - 200"), so we use the generic
1991 + * implementation instead.
1992 + */
1993 +static INLINE uint32 find_msbit(uint32 x)
1994 +{
1995 + uint msbit;
1996 + __asm__("bsrl %1,%0"
1997 + :"=r" (msbit)
1998 + :"r" (x));
1999 + return msbit;
2000 +}
2001 +
2002 +#else
2003 +
2004 +/*
2005 + * Generic Implementation
2006 + */
2007 +
2008 +#define DB_POW_MASK16 0xffff0000
2009 +#define DB_POW_MASK8 0x0000ff00
2010 +#define DB_POW_MASK4 0x000000f0
2011 +#define DB_POW_MASK2 0x0000000c
2012 +#define DB_POW_MASK1 0x00000002
2013 +
2014 +static INLINE uint32 find_msbit(uint32 x)
2015 +{
2016 + uint32 temp_x = x;
2017 + uint msbit = 0;
2018 + if (temp_x & DB_POW_MASK16) {
2019 + temp_x >>= 16;
2020 + msbit = 16;
2021 + }
2022 + if (temp_x & DB_POW_MASK8) {
2023 + temp_x >>= 8;
2024 + msbit += 8;
2025 + }
2026 + if (temp_x & DB_POW_MASK4) {
2027 + temp_x >>= 4;
2028 + msbit += 4;
2029 + }
2030 + if (temp_x & DB_POW_MASK2) {
2031 + temp_x >>= 2;
2032 + msbit += 2;
2033 + }
2034 + if (temp_x & DB_POW_MASK1) {
2035 + msbit += 1;
2036 + }
2037 + return(msbit);
2038 +}
2039 +
2040 +#endif
2041 +
2042 +#endif /* _BITFUNCS_H */
2043 diff -urN linux.old/arch/mips/bcm947xx/include/cfe_osl.h linux.dev/arch/mips/bcm947xx/include/cfe_osl.h
2044 --- linux.old/arch/mips/bcm947xx/include/cfe_osl.h 1970-01-01 01:00:00.000000000 +0100
2045 +++ linux.dev/arch/mips/bcm947xx/include/cfe_osl.h 2005-11-07 22:51:38.776726000 +0100
2046 @@ -0,0 +1,191 @@
2047 +/*
2048 + * CFE boot loader OS Abstraction Layer.
2049 + *
2050 + * Copyright 2005, Broadcom Corporation
2051 + * All Rights Reserved.
2052 + *
2053 + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
2054 + * the contents of this file may not be disclosed to third parties, copied
2055 + * or duplicated in any form, in whole or in part, without the prior
2056 + * written permission of Broadcom Corporation.
2057 + *
2058 + * $Id$
2059 + */
2060 +
2061 +#ifndef _cfe_osl_h_
2062 +#define _cfe_osl_h_
2063 +
2064 +#include <lib_types.h>
2065 +#include <lib_string.h>
2066 +#include <lib_printf.h>
2067 +#include <lib_malloc.h>
2068 +#include <cpu_config.h>
2069 +#include <cfe_timer.h>
2070 +#include <cfe_iocb.h>
2071 +#include <cfe_devfuncs.h>
2072 +#include <addrspace.h>
2073 +
2074 +#include <typedefs.h>
2075 +
2076 +/* dump string */
2077 +extern int (*xprinthook)(const char *str);
2078 +#define puts(str) do { if (xprinthook) xprinthook(str); } while (0)
2079 +
2080 +/* assert and panic */
2081 +#define ASSERT(exp) do {} while (0)
2082 +
2083 +/* PCMCIA attribute space access macros */
2084 +#define OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \
2085 + bzero(buf, size)
2086 +#define OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \
2087 + do {} while (0)
2088 +
2089 +/* PCI configuration space access macros */
2090 +#define OSL_PCI_READ_CONFIG(loc, offset, size) \
2091 + (offset == 8 ? 0 : 0xffffffff)
2092 +#define OSL_PCI_WRITE_CONFIG(loc, offset, size, val) \
2093 + do {} while (0)
2094 +
2095 +/* PCI device bus # and slot # */
2096 +#define OSL_PCI_BUS(osh) (0)
2097 +#define OSL_PCI_SLOT(osh) (0)
2098 +
2099 +/* register access macros */
2100 +#define wreg32(r, v) (*(volatile uint32*)(r) = (uint32)(v))
2101 +#define rreg32(r) (*(volatile uint32*)(r))
2102 +#ifdef IL_BIGENDIAN
2103 +#define wreg16(r, v) (*(volatile uint16*)((ulong)(r)^2) = (uint16)(v))
2104 +#define rreg16(r) (*(volatile uint16*)((ulong)(r)^2))
2105 +#define wreg8(r, v) (*(volatile uint8*)((ulong)(r)^3) = (uint8)(v))
2106 +#define rreg8(r) (*(volatile uint8*)((ulong)(r)^3))
2107 +#else
2108 +#define wreg16(r, v) (*(volatile uint16*)(r) = (uint16)(v))
2109 +#define rreg16(r) (*(volatile uint16*)(r))
2110 +#define wreg8(r, v) (*(volatile uint8*)(r) = (uint8)(v))
2111 +#define rreg8(r) (*(volatile uint8*)(r))
2112 +#endif
2113 +#define R_REG(r) ({ \
2114 + __typeof(*(r)) __osl_v; \
2115 + switch (sizeof(*(r))) { \
2116 + case sizeof(uint8): __osl_v = rreg8((r)); break; \
2117 + case sizeof(uint16): __osl_v = rreg16((r)); break; \
2118 + case sizeof(uint32): __osl_v = rreg32((r)); break; \
2119 + } \
2120 + __osl_v; \
2121 +})
2122 +#define W_REG(r, v) do { \
2123 + switch (sizeof(*(r))) { \
2124 + case sizeof(uint8): wreg8((r), (v)); break; \
2125 + case sizeof(uint16): wreg16((r), (v)); break; \
2126 + case sizeof(uint32): wreg32((r), (v)); break; \
2127 + } \
2128 +} while (0)
2129 +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
2130 +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
2131 +
2132 +/* bcopy, bcmp, and bzero */
2133 +#define bcmp(b1, b2, len) lib_memcmp((b1), (b2), (len))
2134 +
2135 +#define osl_attach(pdev) ((osl_t*)pdev)
2136 +#define osl_detach(osh)
2137 +
2138 +/* general purpose memory allocation */
2139 +#define MALLOC(osh, size) KMALLOC((size),0)
2140 +#define MFREE(osh, addr, size) KFREE((addr))
2141 +#define MALLOCED(osh) (0)
2142 +#define MALLOC_DUMP(osh, buf, sz)
2143 +#define MALLOC_FAILED(osh) (0)
2144 +
2145 +/* uncached virtual address */
2146 +#define OSL_UNCACHED(va) ((void*)UNCADDR((ulong)(va)))
2147 +
2148 +/* host/bus architecture-specific address byte swap */
2149 +#define BUS_SWAP32(v) (v)
2150 +
2151 +/* get processor cycle count */
2152 +#define OSL_GETCYCLES(x) ((x) = 0)
2153 +
2154 +/* microsecond delay */
2155 +#define OSL_DELAY(usec) cfe_usleep((cfe_cpu_speed/CPUCFG_CYCLESPERCPUTICK/1000000*(usec)))
2156 +
2157 +#define OSL_ERROR(bcmerror) osl_error(bcmerror)
2158 +
2159 +/* map/unmap physical to virtual I/O */
2160 +#define REG_MAP(pa, size) ((void*)UNCADDR((ulong)(pa)))
2161 +#define REG_UNMAP(va) do {} while (0)
2162 +
2163 +/* dereference an address that may cause a bus exception */
2164 +#define BUSPROBE(val, addr) osl_busprobe(&(val), (uint32)(addr))
2165 +extern int osl_busprobe(uint32 *val, uint32 addr);
2166 +
2167 +/* allocate/free shared (dma-able) consistent (uncached) memory */
2168 +#define DMA_CONSISTENT_ALIGN 4096
2169 +#define DMA_ALLOC_CONSISTENT(osh, size, pap) \
2170 + osl_dma_alloc_consistent((size), (pap))
2171 +#define DMA_FREE_CONSISTENT(osh, va, size, pa) \
2172 + osl_dma_free_consistent((void*)(va))
2173 +extern void *osl_dma_alloc_consistent(uint size, ulong *pap);
2174 +extern void osl_dma_free_consistent(void *va);
2175 +
2176 +/* map/unmap direction */
2177 +#define DMA_TX 1
2178 +#define DMA_RX 2
2179 +
2180 +/* map/unmap shared (dma-able) memory */
2181 +#define DMA_MAP(osh, va, size, direction, lb) ({ \
2182 + cfe_flushcache(CFE_CACHE_FLUSH_D); \
2183 + PHYSADDR((ulong)(va)); \
2184 +})
2185 +#define DMA_UNMAP(osh, pa, size, direction, p) \
2186 + do {} while (0)
2187 +
2188 +/* shared (dma-able) memory access macros */
2189 +#define R_SM(r) *(r)
2190 +#define W_SM(r, v) (*(r) = (v))
2191 +#define BZERO_SM(r, len) lib_memset((r), '\0', (len))
2192 +
2193 +/* generic packet structure */
2194 +#define LBUFSZ 4096
2195 +#define LBDATASZ (LBUFSZ - sizeof(struct lbuf))
2196 +struct lbuf {
2197 + struct lbuf *next; /* pointer to next lbuf if in a chain */
2198 + struct lbuf *link; /* pointer to next lbuf if in a list */
2199 + uchar *head; /* start of buffer */
2200 + uchar *end; /* end of buffer */
2201 + uchar *data; /* start of data */
2202 + uchar *tail; /* end of data */
2203 + uint len; /* nbytes of data */
2204 + void *cookie; /* generic cookie */
2205 +};
2206 +
2207 +/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
2208 +#define PKTBUFSZ 2048
2209 +
2210 +/* packet primitives */
2211 +#define PKTGET(osh, len, send) ((void*)osl_pktget((len)))
2212 +#define PKTFREE(osh, lb, send) osl_pktfree((struct lbuf*)(lb))
2213 +#define PKTDATA(osh, lb) (((struct lbuf*)(lb))->data)
2214 +#define PKTLEN(osh, lb) (((struct lbuf*)(lb))->len)
2215 +#define PKTHEADROOM(osh, lb) (PKTDATA(osh,lb)-(((struct lbuf*)(lb))->head))
2216 +#define PKTTAILROOM(osh, lb) ((((struct lbuf*)(lb))->end)-(((struct lbuf*)(lb))->tail))
2217 +#define PKTNEXT(osh, lb) (((struct lbuf*)(lb))->next)
2218 +#define PKTSETNEXT(lb, x) (((struct lbuf*)(lb))->next = (struct lbuf*)(x))
2219 +#define PKTSETLEN(osh, lb, len) osl_pktsetlen((struct lbuf*)(lb), (len))
2220 +#define PKTPUSH(osh, lb, bytes) osl_pktpush((struct lbuf*)(lb), (bytes))
2221 +#define PKTPULL(osh, lb, bytes) osl_pktpull((struct lbuf*)(lb), (bytes))
2222 +#define PKTDUP(osh, lb) osl_pktdup((struct lbuf*)(lb))
2223 +#define PKTCOOKIE(lb) (((struct lbuf*)(lb))->cookie)
2224 +#define PKTSETCOOKIE(lb, x) (((struct lbuf*)(lb))->cookie = (void*)(x))
2225 +#define PKTLINK(lb) (((struct lbuf*)(lb))->link)
2226 +#define PKTSETLINK(lb, x) (((struct lbuf*)(lb))->link = (struct lbuf*)(x))
2227 +#define PKTPRIO(lb) (0)
2228 +#define PKTSETPRIO(lb, x) do {} while (0)
2229 +extern struct lbuf *osl_pktget(uint len);
2230 +extern void osl_pktfree(struct lbuf *lb);
2231 +extern void osl_pktsetlen(struct lbuf *lb, uint len);
2232 +extern uchar *osl_pktpush(struct lbuf *lb, uint bytes);
2233 +extern uchar *osl_pktpull(struct lbuf *lb, uint bytes);
2234 +extern struct lbuf *osl_pktdup(struct lbuf *lb);
2235 +extern int osl_error(int bcmerror);
2236 +
2237 +#endif /* _cfe_osl_h_ */
2238 diff -urN linux.old/arch/mips/bcm947xx/include/epivers.h linux.dev/arch/mips/bcm947xx/include/epivers.h
2239 --- linux.old/arch/mips/bcm947xx/include/epivers.h 1970-01-01 01:00:00.000000000 +0100
2240 +++ linux.dev/arch/mips/bcm947xx/include/epivers.h 2005-11-07 22:51:38.776726000 +0100
2241 @@ -0,0 +1,69 @@
2242 +/*
2243 + * Copyright 2005, Broadcom Corporation
2244 + * All Rights Reserved.
2245 + *
2246 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2247 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2248 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2249 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2250 + *
2251 + * $Id$
2252 + *
2253 +*/
2254 +
2255 +#ifndef _epivers_h_
2256 +#define _epivers_h_
2257 +
2258 +#ifdef linux
2259 +#include <linux/config.h>
2260 +#endif
2261 +
2262 +/* Vendor Name, ASCII, 32 chars max */
2263 +#ifdef COMPANYNAME
2264 +#define HPNA_VENDOR COMPANYNAME
2265 +#else
2266 +#define HPNA_VENDOR "Broadcom Corporation"
2267 +#endif
2268 +
2269 +/* Driver Date, ASCII, 32 chars max */
2270 +#define HPNA_DRV_BUILD_DATE __DATE__
2271 +
2272 +/* Hardware Manufacture Date, ASCII, 32 chars max */
2273 +#define HPNA_HW_MFG_DATE "Not Specified"
2274 +
2275 +/* See documentation for Device Type values, 32 values max */
2276 +#ifndef HPNA_DEV_TYPE
2277 +
2278 +#if defined(CONFIG_BRCM_VJ)
2279 +#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_DISPLAY }
2280 +
2281 +#elif defined(CONFIG_BCRM_93725)
2282 +#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_CM_BRIDGE, CDCF_V0_DEVICE_DISPLAY }
2283 +
2284 +#else
2285 +#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_PCINIC }
2286 +
2287 +#endif
2288 +
2289 +#endif /* !HPNA_DEV_TYPE */
2290 +
2291 +
2292 +#define EPI_MAJOR_VERSION 3
2293 +
2294 +#define EPI_MINOR_VERSION 130
2295 +
2296 +#define EPI_RC_NUMBER 20
2297 +
2298 +#define EPI_INCREMENTAL_NUMBER 0
2299 +
2300 +#define EPI_BUILD_NUMBER 0
2301 +
2302 +#define EPI_VERSION 3,130,20,0
2303 +
2304 +#define EPI_VERSION_NUM 0x03821400
2305 +
2306 +/* Driver Version String, ASCII, 32 chars max */
2307 +#define EPI_VERSION_STR "3.130.20.0"
2308 +#define EPI_ROUTER_VERSION_STR "3.131.20.0"
2309 +
2310 +#endif /* _epivers_h_ */
2311 diff -urN linux.old/arch/mips/bcm947xx/include/epivers.h.in linux.dev/arch/mips/bcm947xx/include/epivers.h.in
2312 --- linux.old/arch/mips/bcm947xx/include/epivers.h.in 1970-01-01 01:00:00.000000000 +0100
2313 +++ linux.dev/arch/mips/bcm947xx/include/epivers.h.in 2005-11-07 21:57:07.849586000 +0100
2314 @@ -0,0 +1,69 @@
2315 +/*
2316 + * Copyright 2005, Broadcom Corporation
2317 + * All Rights Reserved.
2318 + *
2319 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2320 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2321 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2322 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2323 + *
2324 + * $Id$
2325 + *
2326 +*/
2327 +
2328 +#ifndef _epivers_h_
2329 +#define _epivers_h_
2330 +
2331 +#ifdef linux
2332 +#include <linux/config.h>
2333 +#endif
2334 +
2335 +/* Vendor Name, ASCII, 32 chars max */
2336 +#ifdef COMPANYNAME
2337 +#define HPNA_VENDOR COMPANYNAME
2338 +#else
2339 +#define HPNA_VENDOR "Broadcom Corporation"
2340 +#endif
2341 +
2342 +/* Driver Date, ASCII, 32 chars max */
2343 +#define HPNA_DRV_BUILD_DATE __DATE__
2344 +
2345 +/* Hardware Manufacture Date, ASCII, 32 chars max */
2346 +#define HPNA_HW_MFG_DATE "Not Specified"
2347 +
2348 +/* See documentation for Device Type values, 32 values max */
2349 +#ifndef HPNA_DEV_TYPE
2350 +
2351 +#if defined(CONFIG_BRCM_VJ)
2352 +#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_DISPLAY }
2353 +
2354 +#elif defined(CONFIG_BCRM_93725)
2355 +#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_CM_BRIDGE, CDCF_V0_DEVICE_DISPLAY }
2356 +
2357 +#else
2358 +#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_PCINIC }
2359 +
2360 +#endif
2361 +
2362 +#endif /* !HPNA_DEV_TYPE */
2363 +
2364 +
2365 +#define EPI_MAJOR_VERSION @EPI_MAJOR_VERSION@
2366 +
2367 +#define EPI_MINOR_VERSION @EPI_MINOR_VERSION@
2368 +
2369 +#define EPI_RC_NUMBER @EPI_RC_NUMBER@
2370 +
2371 +#define EPI_INCREMENTAL_NUMBER @EPI_INCREMENTAL_NUMBER@
2372 +
2373 +#define EPI_BUILD_NUMBER @EPI_BUILD_NUMBER@
2374 +
2375 +#define EPI_VERSION @EPI_VERSION@
2376 +
2377 +#define EPI_VERSION_NUM @EPI_VERSION_NUM@
2378 +
2379 +/* Driver Version String, ASCII, 32 chars max */
2380 +#define EPI_VERSION_STR "@EPI_VERSION_STR@"
2381 +#define EPI_ROUTER_VERSION_STR "@EPI_ROUTER_VERSION_STR@"
2382 +
2383 +#endif /* _epivers_h_ */
2384 diff -urN linux.old/arch/mips/bcm947xx/include/etsockio.h linux.dev/arch/mips/bcm947xx/include/etsockio.h
2385 --- linux.old/arch/mips/bcm947xx/include/etsockio.h 1970-01-01 01:00:00.000000000 +0100
2386 +++ linux.dev/arch/mips/bcm947xx/include/etsockio.h 2005-11-07 21:57:07.861586750 +0100
2387 @@ -0,0 +1,59 @@
2388 +/*
2389 + * Driver-specific socket ioctls
2390 + * used by BSD, Linux, and PSOS
2391 + * Broadcom BCM44XX 10/100Mbps Ethernet Device Driver
2392 + *
2393 + * Copyright 2005, Broadcom Corporation
2394 + * All Rights Reserved.
2395 + *
2396 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2397 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2398 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2399 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2400 + *
2401 + * $Id$
2402 + */
2403 +
2404 +#ifndef _etsockio_h_
2405 +#define _etsockio_h_
2406 +
2407 +/* THESE MUST BE CONTIGUOUS AND CONSISTENT WITH VALUES IN ETC.H */
2408 +
2409 +
2410 +#if defined(linux)
2411 +#define SIOCSETCUP (SIOCDEVPRIVATE + 0)
2412 +#define SIOCSETCDOWN (SIOCDEVPRIVATE + 1)
2413 +#define SIOCSETCLOOP (SIOCDEVPRIVATE + 2)
2414 +#define SIOCGETCDUMP (SIOCDEVPRIVATE + 3)
2415 +#define SIOCSETCSETMSGLEVEL (SIOCDEVPRIVATE + 4)
2416 +#define SIOCSETCPROMISC (SIOCDEVPRIVATE + 5)
2417 +#define SIOCSETCTXDOWN (SIOCDEVPRIVATE + 6) /* obsolete */
2418 +#define SIOCSETCSPEED (SIOCDEVPRIVATE + 7)
2419 +#define SIOCTXGEN (SIOCDEVPRIVATE + 8)
2420 +#define SIOCGETCPHYRD (SIOCDEVPRIVATE + 9)
2421 +#define SIOCSETCPHYWR (SIOCDEVPRIVATE + 10)
2422 +#define SIOCSETCQOS (SIOCDEVPRIVATE + 11)
2423 +
2424 +#else /* !linux */
2425 +
2426 +#define SIOCSETCUP _IOWR('e', 130 + 0, struct ifreq)
2427 +#define SIOCSETCDOWN _IOWR('e', 130 + 1, struct ifreq)
2428 +#define SIOCSETCLOOP _IOWR('e', 130 + 2, struct ifreq)
2429 +#define SIOCGETCDUMP _IOWR('e', 130 + 3, struct ifreq)
2430 +#define SIOCSETCSETMSGLEVEL _IOWR('e', 130 + 4, struct ifreq)
2431 +#define SIOCSETCPROMISC _IOWR('e', 130 + 5, struct ifreq)
2432 +#define SIOCSETCTXDOWN _IOWR('e', 130 + 6, struct ifreq) /* obsolete */
2433 +#define SIOCSETCSPEED _IOWR('e', 130 + 7, struct ifreq)
2434 +#define SIOCTXGEN _IOWR('e', 130 + 8, struct ifreq)
2435 +
2436 +#endif
2437 +
2438 +/* arg to SIOCTXGEN */
2439 +struct txg {
2440 + uint32 num; /* number of frames to send */
2441 + uint32 delay; /* delay in microseconds between sending each */
2442 + uint32 size; /* size of ether frame to send */
2443 + uchar buf[1514]; /* starting ether frame data */
2444 +};
2445 +
2446 +#endif
2447 diff -urN linux.old/arch/mips/bcm947xx/include/flash.h linux.dev/arch/mips/bcm947xx/include/flash.h
2448 --- linux.old/arch/mips/bcm947xx/include/flash.h 1970-01-01 01:00:00.000000000 +0100
2449 +++ linux.dev/arch/mips/bcm947xx/include/flash.h 2005-11-07 21:57:07.861586750 +0100
2450 @@ -0,0 +1,188 @@
2451 +/*
2452 + * flash.h: Common definitions for flash access.
2453 + *
2454 + * Copyright 2005, Broadcom Corporation
2455 + * All Rights Reserved.
2456 + *
2457 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2458 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2459 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2460 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2461 + *
2462 + * $Id$
2463 + */
2464 +
2465 +/* Types of flashes we know about */
2466 +typedef enum _flash_type {OLD, BSC, SCS, AMD, SST, SFLASH} flash_type_t;
2467 +
2468 +/* Commands to write/erase the flases */
2469 +typedef struct _flash_cmds{
2470 + flash_type_t type;
2471 + bool need_unlock;
2472 + uint16 pre_erase;
2473 + uint16 erase_block;
2474 + uint16 erase_chip;
2475 + uint16 write_word;
2476 + uint16 write_buf;
2477 + uint16 clear_csr;
2478 + uint16 read_csr;
2479 + uint16 read_id;
2480 + uint16 confirm;
2481 + uint16 read_array;
2482 +} flash_cmds_t;
2483 +
2484 +#define UNLOCK_CMD_WORDS 2
2485 +
2486 +typedef struct _unlock_cmd {
2487 + uint addr[UNLOCK_CMD_WORDS];
2488 + uint16 cmd[UNLOCK_CMD_WORDS];
2489 +} unlock_cmd_t;
2490 +
2491 +/* Flash descriptors */
2492 +typedef struct _flash_desc {
2493 + uint16 mfgid; /* Manufacturer Id */
2494 + uint16 devid; /* Device Id */
2495 + uint size; /* Total size in bytes */
2496 + uint width; /* Device width in bytes */
2497 + flash_type_t type; /* Device type old, S, J */
2498 + uint bsize; /* Block size */
2499 + uint nb; /* Number of blocks */
2500 + uint ff; /* First full block */
2501 + uint lf; /* Last full block */
2502 + uint nsub; /* Number of subblocks */
2503 + uint *subblocks; /* Offsets for subblocks */
2504 + char *desc; /* Description */
2505 +} flash_desc_t;
2506 +
2507 +
2508 +#ifdef DECLARE_FLASHES
2509 +flash_cmds_t sflash_cmd_t =
2510 + { SFLASH, 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2511 +
2512 +flash_cmds_t flash_cmds[] = {
2513 +/* type needu preera eraseb erasech write wbuf clcsr rdcsr rdid confrm read */
2514 + { BSC, 0, 0x00, 0x20, 0x00, 0x40, 0x00, 0x50, 0x70, 0x90, 0xd0, 0xff },
2515 + { SCS, 0, 0x00, 0x20, 0x00, 0x40, 0xe8, 0x50, 0x70, 0x90, 0xd0, 0xff },
2516 + { AMD, 1, 0x80, 0x30, 0x10, 0xa0, 0x00, 0x00, 0x00, 0x90, 0x00, 0xf0 },
2517 + { SST, 1, 0x80, 0x50, 0x10, 0xa0, 0x00, 0x00, 0x00, 0x90, 0x00, 0xf0 },
2518 + { 0 }
2519 +};
2520 +
2521 +unlock_cmd_t unlock_cmd_amd = {
2522 +#ifdef MIPSEB
2523 +/* addr: */ { 0x0aa8, 0x0556},
2524 +#else
2525 +/* addr: */ { 0x0aaa, 0x0554},
2526 +#endif
2527 +/* data: */ { 0xaa, 0x55}
2528 +};
2529 +
2530 +unlock_cmd_t unlock_cmd_sst = {
2531 +#ifdef MIPSEB
2532 +/* addr: */ { 0xaaa8, 0x5556},
2533 +#else
2534 +/* addr: */ { 0xaaaa, 0x5554},
2535 +#endif
2536 +/* data: */ { 0xaa, 0x55}
2537 +};
2538 +
2539 +#define AMD_CMD 0xaaa
2540 +#define SST_CMD 0xaaaa
2541 +
2542 +/* intel unlock block cmds */
2543 +#define INTEL_UNLOCK1 0x60
2544 +#define INTEL_UNLOCK2 0xD0
2545 +
2546 +/* Just eight blocks of 8KB byte each */
2547 +
2548 +uint blk8x8k[] = { 0x00000000,
2549 + 0x00002000,
2550 + 0x00004000,
2551 + 0x00006000,
2552 + 0x00008000,
2553 + 0x0000a000,
2554 + 0x0000c000,
2555 + 0x0000e000,
2556 + 0x00010000
2557 +};
2558 +
2559 +/* Funky AMD arrangement for 29xx800's */
2560 +uint amd800[] = { 0x00000000, /* 16KB */
2561 + 0x00004000, /* 32KB */
2562 + 0x0000c000, /* 8KB */
2563 + 0x0000e000, /* 8KB */
2564 + 0x00010000, /* 8KB */
2565 + 0x00012000, /* 8KB */
2566 + 0x00014000, /* 32KB */
2567 + 0x0001c000, /* 16KB */
2568 + 0x00020000
2569 +};
2570 +
2571 +/* AMD arrangement for 29xx160's */
2572 +uint amd4112[] = { 0x00000000, /* 32KB */
2573 + 0x00008000, /* 8KB */
2574 + 0x0000a000, /* 8KB */
2575 + 0x0000c000, /* 16KB */
2576 + 0x00010000
2577 +};
2578 +uint amd2114[] = { 0x00000000, /* 16KB */
2579 + 0x00004000, /* 8KB */
2580 + 0x00006000, /* 8KB */
2581 + 0x00008000, /* 32KB */
2582 + 0x00010000
2583 +};
2584 +
2585 +
2586 +flash_desc_t sflash_desc =
2587 + { 0, 0, 0, 0, SFLASH, 0, 0, 0, 0, 0, NULL, "SFLASH" };
2588 +
2589 +flash_desc_t flashes[] = {
2590 + { 0x00b0, 0x00d0, 0x0200000, 2, SCS, 0x10000, 32, 0, 31, 0, NULL, "Intel 28F160S3/5 1Mx16" },
2591 + { 0x00b0, 0x00d4, 0x0400000, 2, SCS, 0x10000, 64, 0, 63, 0, NULL, "Intel 28F320S3/5 2Mx16" },
2592 + { 0x0089, 0x8890, 0x0200000, 2, BSC, 0x10000, 32, 0, 30, 8, blk8x8k, "Intel 28F160B3 1Mx16 TopB" },
2593 + { 0x0089, 0x8891, 0x0200000, 2, BSC, 0x10000, 32, 1, 31, 8, blk8x8k, "Intel 28F160B3 1Mx16 BotB" },
2594 + { 0x0089, 0x8896, 0x0400000, 2, BSC, 0x10000, 64, 0, 62, 8, blk8x8k, "Intel 28F320B3 2Mx16 TopB" },
2595 + { 0x0089, 0x8897, 0x0400000, 2, BSC, 0x10000, 64, 1, 63, 8, blk8x8k, "Intel 28F320B3 2Mx16 BotB" },
2596 + { 0x0089, 0x8898, 0x0800000, 2, BSC, 0x10000, 128, 0, 126, 8, blk8x8k, "Intel 28F640B3 4Mx16 TopB" },
2597 + { 0x0089, 0x8899, 0x0800000, 2, BSC, 0x10000, 128, 1, 127, 8, blk8x8k, "Intel 28F640B3 4Mx16 BotB" },
2598 + { 0x0089, 0x88C2, 0x0200000, 2, BSC, 0x10000, 32, 0, 30, 8, blk8x8k, "Intel 28F160C3 1Mx16 TopB" },
2599 + { 0x0089, 0x88C3, 0x0200000, 2, BSC, 0x10000, 32, 1, 31, 8, blk8x8k, "Intel 28F160C3 1Mx16 BotB" },
2600 + { 0x0089, 0x88C4, 0x0400000, 2, BSC, 0x10000, 64, 0, 62, 8, blk8x8k, "Intel 28F320C3 2Mx16 TopB" },
2601 + { 0x0089, 0x88C5, 0x0400000, 2, BSC, 0x10000, 64, 1, 63, 8, blk8x8k, "Intel 28F320C3 2Mx16 BotB" },
2602 + { 0x0089, 0x88CC, 0x0800000, 2, BSC, 0x10000, 128, 0, 126, 8, blk8x8k, "Intel 28F640C3 4Mx16 TopB" },
2603 + { 0x0089, 0x88CD, 0x0800000, 2, BSC, 0x10000, 128, 1, 127, 8, blk8x8k, "Intel 28F640C3 4Mx16 BotB" },
2604 + { 0x0089, 0x0014, 0x0400000, 2, SCS, 0x20000, 32, 0, 31, 0, NULL, "Intel 28F320J5 2Mx16" },
2605 + { 0x0089, 0x0015, 0x0800000, 2, SCS, 0x20000, 64, 0, 63, 0, NULL, "Intel 28F640J5 4Mx16" },
2606 + { 0x0089, 0x0016, 0x0400000, 2, SCS, 0x20000, 32, 0, 31, 0, NULL, "Intel 28F320J3 2Mx16" },
2607 + { 0x0089, 0x0017, 0x0800000, 2, SCS, 0x20000, 64, 0, 63, 0, NULL, "Intel 28F640J3 4Mx16" },
2608 + { 0x0089, 0x0018, 0x1000000, 2, SCS, 0x20000, 128, 0, 127, 0, NULL, "Intel 28F128J3 8Mx16" },
2609 + { 0x00b0, 0x00e3, 0x0400000, 2, BSC, 0x10000, 64, 1, 63, 8, blk8x8k, "Sharp 28F320BJE 2Mx16 BotB" },
2610 + { 0x0001, 0x224a, 0x0100000, 2, AMD, 0x10000, 16, 0, 13, 8, amd800, "AMD 29DL800BT 512Kx16 TopB" },
2611 + { 0x0001, 0x22cb, 0x0100000, 2, AMD, 0x10000, 16, 2, 15, 8, amd800, "AMD 29DL800BB 512Kx16 BotB" },
2612 + { 0x0001, 0x22c4, 0x0200000, 2, AMD, 0x10000, 32, 0, 30, 4, amd2114, "AMD 29lv160DT 1Mx16 TopB" },
2613 + { 0x0001, 0x2249, 0x0200000, 2, AMD, 0x10000, 32, 1, 31, 4, amd4112, "AMD 29lv160DB 1Mx16 BotB" },
2614 + { 0x0001, 0x22f6, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 8, blk8x8k, "AMD 29lv320DT 2Mx16 TopB" },
2615 + { 0x0001, 0x22f9, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 8, blk8x8k, "AMD 29lv320DB 2Mx16 BotB" },
2616 + { 0x0001, 0x227e, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 8, blk8x8k, "AMD 29lv320MT 2Mx16 TopB" },
2617 + { 0x0001, 0x2200, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 8, blk8x8k, "AMD 29lv320MB 2Mx16 BotB" },
2618 + { 0x0020, 0x22CA, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 4, amd4112, "ST 29w320DT 2Mx16 TopB" },
2619 + { 0x0020, 0x22CB, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 4, amd2114, "ST 29w320DB 2Mx16 BotB" },
2620 + { 0x00C2, 0x00A7, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 4, amd4112, "MX29LV320T 2Mx16 TopB" },
2621 + { 0x00C2, 0x00A8, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 4, amd2114, "MX29LV320B 2Mx16 BotB" },
2622 + { 0x0004, 0x22F6, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 4, amd4112, "MBM29LV320TE 2Mx16 TopB" },
2623 + { 0x0004, 0x22F9, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 4, amd2114, "MBM29LV320BE 2Mx16 BotB" },
2624 + { 0x0098, 0x009A, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 4, amd4112, "TC58FVT321 2Mx16 TopB" },
2625 + { 0x0098, 0x009C, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 4, amd2114, "TC58FVB321 2Mx16 BotB" },
2626 + { 0x00C2, 0x22A7, 0x0400000, 2, AMD, 0x10000, 64, 0, 62, 4, amd4112, "MX29LV320T 2Mx16 TopB" },
2627 + { 0x00C2, 0x22A8, 0x0400000, 2, AMD, 0x10000, 64, 1, 63, 4, amd2114, "MX29LV320B 2Mx16 BotB" },
2628 + { 0x00BF, 0x2783, 0x0400000, 2, SST, 0x10000, 64, 0, 63, 0, NULL, "SST39VF320 2Mx16" },
2629 + { 0, 0, 0, 0, OLD, 0, 0, 0, 0, 0, NULL, NULL },
2630 +};
2631 +
2632 +#else
2633 +
2634 +extern flash_cmds_t flash_cmds[];
2635 +extern unlock_cmd_t unlock_cmd;
2636 +extern flash_desc_t flashes[];
2637 +
2638 +#endif
2639 diff -urN linux.old/arch/mips/bcm947xx/include/flashutl.h linux.dev/arch/mips/bcm947xx/include/flashutl.h
2640 --- linux.old/arch/mips/bcm947xx/include/flashutl.h 1970-01-01 01:00:00.000000000 +0100
2641 +++ linux.dev/arch/mips/bcm947xx/include/flashutl.h 2005-11-07 21:57:07.861586750 +0100
2642 @@ -0,0 +1,27 @@
2643 +/*
2644 + * BCM47XX FLASH driver interface
2645 + *
2646 + * Copyright 2005, Broadcom Corporation
2647 + * All Rights Reserved.
2648 + *
2649 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2650 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2651 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2652 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2653 + * $Id$
2654 + */
2655 +
2656 +#ifndef _flashutl_h_
2657 +#define _flashutl_h_
2658 +
2659 +
2660 +#ifndef _LANGUAGE_ASSEMBLY
2661 +
2662 +int sysFlashInit(char *flash_str);
2663 +int sysFlashRead(uint off, uchar *dst, uint bytes);
2664 +int sysFlashWrite(uint off, uchar *src, uint bytes);
2665 +void nvWrite(unsigned short *data, unsigned int len);
2666 +
2667 +#endif /* _LANGUAGE_ASSEMBLY */
2668 +
2669 +#endif /* _flashutl_h_ */
2670 diff -urN linux.old/arch/mips/bcm947xx/include/hnddma.h linux.dev/arch/mips/bcm947xx/include/hnddma.h
2671 --- linux.old/arch/mips/bcm947xx/include/hnddma.h 1970-01-01 01:00:00.000000000 +0100
2672 +++ linux.dev/arch/mips/bcm947xx/include/hnddma.h 2005-11-07 22:51:38.776726000 +0100
2673 @@ -0,0 +1,71 @@
2674 +/*
2675 + * Generic Broadcom Home Networking Division (HND) DMA engine SW interface
2676 + * This supports the following chips: BCM42xx, 44xx, 47xx .
2677 + *
2678 + * Copyright 2005, Broadcom Corporation
2679 + * All Rights Reserved.
2680 + *
2681 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2682 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2683 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2684 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2685 + * $Id$
2686 + */
2687 +
2688 +#ifndef _hnddma_h_
2689 +#define _hnddma_h_
2690 +
2691 +/* export structure */
2692 +typedef volatile struct {
2693 + /* rx error counters */
2694 + uint rxgiants; /* rx giant frames */
2695 + uint rxnobuf; /* rx out of dma descriptors */
2696 + /* tx error counters */
2697 + uint txnobuf; /* tx out of dma descriptors */
2698 +} hnddma_t;
2699 +
2700 +#ifndef di_t
2701 +#define di_t void
2702 +#endif
2703 +
2704 +#ifndef osl_t
2705 +#define osl_t void
2706 +#endif
2707 +
2708 +/* externs */
2709 +extern void * dma_attach(osl_t *osh, char *name, sb_t *sbh, void *dmaregstx, void *dmaregsrx,
2710 + uint ntxd, uint nrxd, uint rxbufsize, uint nrxpost, uint rxoffset, uint *msg_level);
2711 +extern void dma_detach(di_t *di);
2712 +extern void dma_txreset(di_t *di);
2713 +extern void dma_rxreset(di_t *di);
2714 +extern void dma_txinit(di_t *di);
2715 +extern bool dma_txenabled(di_t *di);
2716 +extern void dma_rxinit(di_t *di);
2717 +extern void dma_rxenable(di_t *di);
2718 +extern bool dma_rxenabled(di_t *di);
2719 +extern void dma_txsuspend(di_t *di);
2720 +extern void dma_txresume(di_t *di);
2721 +extern bool dma_txsuspended(di_t *di);
2722 +extern bool dma_txsuspendedidle(di_t *di);
2723 +extern bool dma_txstopped(di_t *di);
2724 +extern bool dma_rxstopped(di_t *di);
2725 +extern int dma_txfast(di_t *di, void *p, uint32 coreflags);
2726 +extern void dma_fifoloopbackenable(di_t *di);
2727 +extern void *dma_rx(di_t *di);
2728 +extern void dma_rxfill(di_t *di);
2729 +extern void dma_txreclaim(di_t *di, bool forceall);
2730 +extern void dma_rxreclaim(di_t *di);
2731 +extern uintptr dma_getvar(di_t *di, char *name);
2732 +extern void *dma_getnexttxp(di_t *di, bool forceall);
2733 +extern void *dma_peeknexttxp(di_t *di);
2734 +extern void *dma_getnextrxp(di_t *di, bool forceall);
2735 +extern void dma_txblock(di_t *di);
2736 +extern void dma_txunblock(di_t *di);
2737 +extern uint dma_txactive(di_t *di);
2738 +extern void dma_txrotate(di_t *di);
2739 +
2740 +extern void dma_rxpiomode(dma32regs_t *);
2741 +extern void dma_txpioloopback(dma32regs_t *);
2742 +
2743 +
2744 +#endif /* _hnddma_h_ */
2745 diff -urN linux.old/arch/mips/bcm947xx/include/hndmips.h linux.dev/arch/mips/bcm947xx/include/hndmips.h
2746 --- linux.old/arch/mips/bcm947xx/include/hndmips.h 1970-01-01 01:00:00.000000000 +0100
2747 +++ linux.dev/arch/mips/bcm947xx/include/hndmips.h 2005-11-07 21:57:07.861586750 +0100
2748 @@ -0,0 +1,16 @@
2749 +/*
2750 + * Alternate include file for HND sbmips.h since CFE also ships with
2751 + * a sbmips.h.
2752 + *
2753 + * Copyright 2005, Broadcom Corporation
2754 + * All Rights Reserved.
2755 + *
2756 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2757 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2758 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2759 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2760 + *
2761 + * $Id$
2762 + */
2763 +
2764 +#include "sbmips.h"
2765 diff -urN linux.old/arch/mips/bcm947xx/include/linux_osl.h linux.dev/arch/mips/bcm947xx/include/linux_osl.h
2766 --- linux.old/arch/mips/bcm947xx/include/linux_osl.h 1970-01-01 01:00:00.000000000 +0100
2767 +++ linux.dev/arch/mips/bcm947xx/include/linux_osl.h 2005-11-07 22:51:38.776726000 +0100
2768 @@ -0,0 +1,371 @@
2769 +/*
2770 + * Linux OS Independent Layer
2771 + *
2772 + * Copyright 2005, Broadcom Corporation
2773 + * All Rights Reserved.
2774 + *
2775 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
2776 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
2777 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
2778 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
2779 + *
2780 + * $Id$
2781 + */
2782 +
2783 +#ifndef _linux_osl_h_
2784 +#define _linux_osl_h_
2785 +
2786 +#include <typedefs.h>
2787 +
2788 +/* use current 2.4.x calling conventions */
2789 +#include <linuxver.h>
2790 +
2791 +/* assert and panic */
2792 +#ifdef __GNUC__
2793 +#define GCC_VERSION (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
2794 +#if GCC_VERSION > 30100
2795 +#define ASSERT(exp) do {} while (0)
2796 +#else
2797 +/* ASSERT could causes segmentation fault on GCC3.1, use empty instead*/
2798 +#define ASSERT(exp)
2799 +#endif
2800 +#endif
2801 +
2802 +/* microsecond delay */
2803 +#define OSL_DELAY(usec) osl_delay(usec)
2804 +extern void osl_delay(uint usec);
2805 +
2806 +/* PCMCIA attribute space access macros */
2807 +#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
2808 +struct pcmcia_dev {
2809 + dev_link_t link; /* PCMCIA device pointer */
2810 + dev_node_t node; /* PCMCIA node structure */
2811 + void *base; /* Mapped attribute memory window */
2812 + size_t size; /* Size of window */
2813 + void *drv; /* Driver data */
2814 +};
2815 +#endif
2816 +#define OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \
2817 + osl_pcmcia_read_attr((osh), (offset), (buf), (size))
2818 +#define OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \
2819 + osl_pcmcia_write_attr((osh), (offset), (buf), (size))
2820 +extern void osl_pcmcia_read_attr(osl_t *osh, uint offset, void *buf, int size);
2821 +extern void osl_pcmcia_write_attr(osl_t *osh, uint offset, void *buf, int size);
2822 +
2823 +/* PCI configuration space access macros */
2824 +#define OSL_PCI_READ_CONFIG(osh, offset, size) \
2825 + osl_pci_read_config((osh), (offset), (size))
2826 +#define OSL_PCI_WRITE_CONFIG(osh, offset, size, val) \
2827 + osl_pci_write_config((osh), (offset), (size), (val))
2828 +extern uint32 osl_pci_read_config(osl_t *osh, uint size, uint offset);
2829 +extern void osl_pci_write_config(osl_t *osh, uint offset, uint size, uint val);
2830 +
2831 +/* PCI device bus # and slot # */
2832 +#define OSL_PCI_BUS(osh) osl_pci_bus(osh)
2833 +#define OSL_PCI_SLOT(osh) osl_pci_slot(osh)
2834 +extern uint osl_pci_bus(osl_t *osh);
2835 +extern uint osl_pci_slot(osl_t *osh);
2836 +
2837 +/* OSL initialization */
2838 +extern osl_t *osl_attach(void *pdev);
2839 +extern void osl_detach(osl_t *osh);
2840 +
2841 +/* host/bus architecture-specific byte swap */
2842 +#define BUS_SWAP32(v) (v)
2843 +
2844 +/* general purpose memory allocation */
2845 +
2846 +#if defined(BCMDBG_MEM)
2847 +
2848 +#define MALLOC(osh, size) osl_debug_malloc((osh), (size), __LINE__, __FILE__)
2849 +#define MFREE(osh, addr, size) osl_debug_mfree((osh), (addr), (size), __LINE__, __FILE__)
2850 +#define MALLOCED(osh) osl_malloced((osh))
2851 +#define MALLOC_DUMP(osh, buf, sz) osl_debug_memdump((osh), (buf), (sz))
2852 +extern void *osl_debug_malloc(osl_t *osh, uint size, int line, char* file);
2853 +extern void osl_debug_mfree(osl_t *osh, void *addr, uint size, int line, char* file);
2854 +extern char *osl_debug_memdump(osl_t *osh, char *buf, uint sz);
2855 +
2856 +#else
2857 +
2858 +#define MALLOC(osh, size) osl_malloc((osh), (size))
2859 +#define MFREE(osh, addr, size) osl_mfree((osh), (addr), (size))
2860 +#define MALLOCED(osh) osl_malloced((osh))
2861 +
2862 +#endif /* BCMDBG_MEM */
2863 +
2864 +#define MALLOC_FAILED(osh) osl_malloc_failed((osh))
2865 +
2866 +extern void *osl_malloc(osl_t *osh, uint size);
2867 +extern void osl_mfree(osl_t *osh, void *addr, uint size);
2868 +extern uint osl_malloced(osl_t *osh);
2869 +extern uint osl_malloc_failed(osl_t *osh);
2870 +
2871 +/* allocate/free shared (dma-able) consistent memory */
2872 +#define DMA_CONSISTENT_ALIGN PAGE_SIZE
2873 +#define DMA_ALLOC_CONSISTENT(osh, size, pap) \
2874 + osl_dma_alloc_consistent((osh), (size), (pap))
2875 +#define DMA_FREE_CONSISTENT(osh, va, size, pa) \
2876 + osl_dma_free_consistent((osh), (void*)(va), (size), (pa))
2877 +extern void *osl_dma_alloc_consistent(osl_t *osh, uint size, ulong *pap);
2878 +extern void osl_dma_free_consistent(osl_t *osh, void *va, uint size, ulong pa);
2879 +
2880 +/* map/unmap direction */
2881 +#define DMA_TX 1
2882 +#define DMA_RX 2
2883 +
2884 +/* map/unmap shared (dma-able) memory */
2885 +#define DMA_MAP(osh, va, size, direction, p) \
2886 + osl_dma_map((osh), (va), (size), (direction))
2887 +#define DMA_UNMAP(osh, pa, size, direction, p) \
2888 + osl_dma_unmap((osh), (pa), (size), (direction))
2889 +extern uint osl_dma_map(osl_t *osh, void *va, uint size, int direction);
2890 +extern void osl_dma_unmap(osl_t *osh, uint pa, uint size, int direction);
2891 +
2892 +/* register access macros */
2893 +#if defined(BCMJTAG)
2894 +#include <bcmjtag.h>
2895 +#define R_REG(r) bcmjtag_read(NULL, (uint32)(r), sizeof (*(r)))
2896 +#define W_REG(r, v) bcmjtag_write(NULL, (uint32)(r), (uint32)(v), sizeof (*(r)))
2897 +#endif
2898 +
2899 +/*
2900 + * BINOSL selects the slightly slower function-call-based binary compatible osl.
2901 + * Macros expand to calls to functions defined in linux_osl.c .
2902 + */
2903 +#ifndef BINOSL
2904 +
2905 +/* string library, kernel mode */
2906 +#define printf(fmt, args...) printk(fmt, ## args)
2907 +#include <linux/kernel.h>
2908 +#include <linux/string.h>
2909 +
2910 +/* register access macros */
2911 +#if !defined(BCMJTAG)
2912 +#ifndef IL_BIGENDIAN
2913 +#define R_REG(r) ( \
2914 + sizeof(*(r)) == sizeof(uint8) ? readb((volatile uint8*)(r)) : \
2915 + sizeof(*(r)) == sizeof(uint16) ? readw((volatile uint16*)(r)) : \
2916 + readl((volatile uint32*)(r)) \
2917 +)
2918 +#define W_REG(r, v) do { \
2919 + switch (sizeof(*(r))) { \
2920 + case sizeof(uint8): writeb((uint8)(v), (volatile uint8*)(r)); break; \
2921 + case sizeof(uint16): writew((uint16)(v), (volatile uint16*)(r)); break; \
2922 + case sizeof(uint32): writel((uint32)(v), (volatile uint32*)(r)); break; \
2923 + } \
2924 +} while (0)
2925 +#else /* IL_BIGENDIAN */
2926 +#define R_REG(r) ({ \
2927 + __typeof(*(r)) __osl_v; \
2928 + switch (sizeof(*(r))) { \
2929 + case sizeof(uint8): __osl_v = readb((volatile uint8*)((uint32)r^3)); break; \
2930 + case sizeof(uint16): __osl_v = readw((volatile uint16*)((uint32)r^2)); break; \
2931 + case sizeof(uint32): __osl_v = readl((volatile uint32*)(r)); break; \
2932 + } \
2933 + __osl_v; \
2934 +})
2935 +#define W_REG(r, v) do { \
2936 + switch (sizeof(*(r))) { \
2937 + case sizeof(uint8): writeb((uint8)(v), (volatile uint8*)((uint32)r^3)); break; \
2938 + case sizeof(uint16): writew((uint16)(v), (volatile uint16*)((uint32)r^2)); break; \
2939 + case sizeof(uint32): writel((uint32)(v), (volatile uint32*)(r)); break; \
2940 + } \
2941 +} while (0)
2942 +#endif
2943 +#endif
2944 +
2945 +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
2946 +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
2947 +
2948 +/* bcopy, bcmp, and bzero */
2949 +#define bcopy(src, dst, len) memcpy((dst), (src), (len))
2950 +#define bcmp(b1, b2, len) memcmp((b1), (b2), (len))
2951 +#define bzero(b, len) memset((b), '\0', (len))
2952 +
2953 +/* uncached virtual address */
2954 +#ifdef mips
2955 +#define OSL_UNCACHED(va) KSEG1ADDR((va))
2956 +#include <asm/addrspace.h>
2957 +#else
2958 +#define OSL_UNCACHED(va) (va)
2959 +#endif
2960 +
2961 +/* get processor cycle count */
2962 +#if defined(mips)
2963 +#define OSL_GETCYCLES(x) ((x) = read_c0_count() * 2)
2964 +#elif defined(__i386__)
2965 +#define OSL_GETCYCLES(x) rdtscl((x))
2966 +#else
2967 +#define OSL_GETCYCLES(x) ((x) = 0)
2968 +#endif
2969 +
2970 +/* dereference an address that may cause a bus exception */
2971 +#ifdef mips
2972 +#if defined(MODULE) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,17))
2973 +#define BUSPROBE(val, addr) panic("get_dbe() will not fixup a bus exception when compiled into a module")
2974 +#else
2975 +#define BUSPROBE(val, addr) get_dbe((val), (addr))
2976 +#include <asm/paccess.h>
2977 +#endif
2978 +#else
2979 +#define BUSPROBE(val, addr) ({ (val) = R_REG((addr)); 0; })
2980 +#endif
2981 +
2982 +/* map/unmap physical to virtual I/O */
2983 +#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), (unsigned long)(size))
2984 +#define REG_UNMAP(va) iounmap((void *)(va))
2985 +
2986 +/* shared (dma-able) memory access macros */
2987 +#define R_SM(r) *(r)
2988 +#define W_SM(r, v) (*(r) = (v))
2989 +#define BZERO_SM(r, len) memset((r), '\0', (len))
2990 +
2991 +/* packet primitives */
2992 +#define PKTGET(osh, len, send) osl_pktget((osh), (len), (send))
2993 +#define PKTFREE(osh, skb, send) osl_pktfree((skb))
2994 +#define PKTDATA(osh, skb) (((struct sk_buff*)(skb))->data)
2995 +#define PKTLEN(osh, skb) (((struct sk_buff*)(skb))->len)
2996 +#define PKTHEADROOM(osh, skb) (PKTDATA(osh,skb)-(((struct sk_buff*)(skb))->head))
2997 +#define PKTTAILROOM(osh, skb) ((((struct sk_buff*)(skb))->end)-(((struct sk_buff*)(skb))->tail))
2998 +#define PKTNEXT(osh, skb) (((struct sk_buff*)(skb))->next)
2999 +#define PKTSETNEXT(skb, x) (((struct sk_buff*)(skb))->next = (struct sk_buff*)(x))
3000 +#define PKTSETLEN(osh, skb, len) __skb_trim((struct sk_buff*)(skb), (len))
3001 +#define PKTPUSH(osh, skb, bytes) skb_push((struct sk_buff*)(skb), (bytes))
3002 +#define PKTPULL(osh, skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes))
3003 +#define PKTDUP(osh, skb) skb_clone((struct sk_buff*)(skb), GFP_ATOMIC)
3004 +#define PKTCOOKIE(skb) ((void*)((struct sk_buff*)(skb))->csum)
3005 +#define PKTSETCOOKIE(skb, x) (((struct sk_buff*)(skb))->csum = (uint)(x))
3006 +#define PKTLINK(skb) (((struct sk_buff*)(skb))->prev)
3007 +#define PKTSETLINK(skb, x) (((struct sk_buff*)(skb))->prev = (struct sk_buff*)(x))
3008 +#define PKTPRIO(skb) (((struct sk_buff*)(skb))->priority)
3009 +#define PKTSETPRIO(skb, x) (((struct sk_buff*)(skb))->priority = (x))
3010 +extern void *osl_pktget(osl_t *osh, uint len, bool send);
3011 +extern void osl_pktfree(void *skb);
3012 +
3013 +#else /* BINOSL */
3014 +
3015 +/* string library */
3016 +#ifndef LINUX_OSL
3017 +#undef printf
3018 +#define printf(fmt, args...) osl_printf((fmt), ## args)
3019 +#undef sprintf
3020 +#define sprintf(buf, fmt, args...) osl_sprintf((buf), (fmt), ## args)
3021 +#undef strcmp
3022 +#define strcmp(s1, s2) osl_strcmp((s1), (s2))
3023 +#undef strncmp
3024 +#define strncmp(s1, s2, n) osl_strncmp((s1), (s2), (n))
3025 +#undef strlen
3026 +#define strlen(s) osl_strlen((s))
3027 +#undef strcpy
3028 +#define strcpy(d, s) osl_strcpy((d), (s))
3029 +#undef strncpy
3030 +#define strncpy(d, s, n) osl_strncpy((d), (s), (n))
3031 +#endif
3032 +extern int osl_printf(const char *format, ...);
3033 +extern int osl_sprintf(char *buf, const char *format, ...);
3034 +extern int osl_strcmp(const char *s1, const char *s2);
3035 +extern int osl_strncmp(const char *s1, const char *s2, uint n);
3036 +extern int osl_strlen(const char *s);
3037 +extern char* osl_strcpy(char *d, const char *s);
3038 +extern char* osl_strncpy(char *d, const char *s, uint n);
3039 +
3040 +/* register access macros */
3041 +#if !defined(BCMJTAG)
3042 +#define R_REG(r) ( \
3043 + sizeof(*(r)) == sizeof(uint8) ? osl_readb((volatile uint8*)(r)) : \
3044 + sizeof(*(r)) == sizeof(uint16) ? osl_readw((volatile uint16*)(r)) : \
3045 + osl_readl((volatile uint32*)(r)) \
3046 +)
3047 +#define W_REG(r, v) do { \
3048 + switch (sizeof(*(r))) { \
3049 + case sizeof(uint8): osl_writeb((uint8)(v), (volatile uint8*)(r)); break; \
3050 + case sizeof(uint16): osl_writew((uint16)(v), (volatile uint16*)(r)); break; \
3051 + case sizeof(uint32): osl_writel((uint32)(v), (volatile uint32*)(r)); break; \
3052 + } \
3053 +} while (0)
3054 +#endif
3055 +
3056 +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
3057 +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
3058 +extern uint8 osl_readb(volatile uint8 *r);
3059 +extern uint16 osl_readw(volatile uint16 *r);
3060 +extern uint32 osl_readl(volatile uint32 *r);
3061 +extern void osl_writeb(uint8 v, volatile uint8 *r);
3062 +extern void osl_writew(uint16 v, volatile uint16 *r);
3063 +extern void osl_writel(uint32 v, volatile uint32 *r);
3064 +
3065 +/* bcopy, bcmp, and bzero */
3066 +extern void bcopy(const void *src, void *dst, int len);
3067 +extern int bcmp(const void *b1, const void *b2, int len);
3068 +extern void bzero(void *b, int len);
3069 +
3070 +/* uncached virtual address */
3071 +#define OSL_UNCACHED(va) osl_uncached((va))
3072 +extern void *osl_uncached(void *va);
3073 +
3074 +/* get processor cycle count */
3075 +#define OSL_GETCYCLES(x) ((x) = osl_getcycles())
3076 +extern uint osl_getcycles(void);
3077 +
3078 +/* dereference an address that may target abort */
3079 +#define BUSPROBE(val, addr) osl_busprobe(&(val), (addr))
3080 +extern int osl_busprobe(uint32 *val, uint32 addr);
3081 +
3082 +/* map/unmap physical to virtual */
3083 +#define REG_MAP(pa, size) osl_reg_map((pa), (size))
3084 +#define REG_UNMAP(va) osl_reg_unmap((va))
3085 +extern void *osl_reg_map(uint32 pa, uint size);
3086 +extern void osl_reg_unmap(void *va);
3087 +
3088 +/* shared (dma-able) memory access macros */
3089 +#define R_SM(r) *(r)
3090 +#define W_SM(r, v) (*(r) = (v))
3091 +#define BZERO_SM(r, len) bzero((r), (len))
3092 +
3093 +/* packet primitives */
3094 +#define PKTGET(osh, len, send) osl_pktget((osh), (len), (send))
3095 +#define PKTFREE(osh, skb, send) osl_pktfree((skb))
3096 +#define PKTDATA(osh, skb) osl_pktdata((osh), (skb))
3097 +#define PKTLEN(osh, skb) osl_pktlen((osh), (skb))
3098 +#define PKTHEADROOM(osh, skb) osl_pktheadroom((osh), (skb))
3099 +#define PKTTAILROOM(osh, skb) osl_pkttailroom((osh), (skb))
3100 +#define PKTNEXT(osh, skb) osl_pktnext((osh), (skb))
3101 +#define PKTSETNEXT(skb, x) osl_pktsetnext((skb), (x))
3102 +#define PKTSETLEN(osh, skb, len) osl_pktsetlen((osh), (skb), (len))
3103 +#define PKTPUSH(osh, skb, bytes) osl_pktpush((osh), (skb), (bytes))
3104 +#define PKTPULL(osh, skb, bytes) osl_pktpull((osh), (skb), (bytes))
3105 +#define PKTDUP(osh, skb) osl_pktdup((osh), (skb))
3106 +#define PKTCOOKIE(skb) osl_pktcookie((skb))
3107 +#define PKTSETCOOKIE(skb, x) osl_pktsetcookie((skb), (x))
3108 +#define PKTLINK(skb) osl_pktlink((skb))
3109 +#define PKTSETLINK(skb, x) osl_pktsetlink((skb), (x))
3110 +#define PKTPRIO(skb) osl_pktprio((skb))
3111 +#define PKTSETPRIO(skb, x) osl_pktsetprio((skb), (x))
3112 +extern void *osl_pktget(osl_t *osh, uint len, bool send);
3113 +extern void osl_pktfree(void *skb);
3114 +extern uchar *osl_pktdata(osl_t *osh, void *skb);
3115 +extern uint osl_pktlen(osl_t *osh, void *skb);
3116 +extern uint osl_pktheadroom(osl_t *osh, void *skb);
3117 +extern uint osl_pkttailroom(osl_t *osh, void *skb);
3118 +extern void *osl_pktnext(osl_t *osh, void *skb);
3119 +extern void osl_pktsetnext(void *skb, void *x);
3120 +extern void osl_pktsetlen(osl_t *osh, void *skb, uint len);
3121 +extern uchar *osl_pktpush(osl_t *osh, void *skb, int bytes);
3122 +extern uchar *osl_pktpull(osl_t *osh, void *skb, int bytes);
3123 +extern void *osl_pktdup(osl_t *osh, void *skb);
3124 +extern void *osl_pktcookie(void *skb);
3125 +extern void osl_pktsetcookie(void *skb, void *x);
3126 +extern void *osl_pktlink(void *skb);
3127 +extern void osl_pktsetlink(void *skb, void *x);
3128 +extern uint osl_pktprio(void *skb);
3129 +extern void osl_pktsetprio(void *skb, uint x);
3130 +
3131 +#endif /* BINOSL */
3132 +
3133 +#define OSL_ERROR(bcmerror) osl_error(bcmerror)
3134 +extern int osl_error(int bcmerror);
3135 +
3136 +/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
3137 +#define PKTBUFSZ 2048
3138 +
3139 +#endif /* _linux_osl_h_ */
3140 diff -urN linux.old/arch/mips/bcm947xx/include/linuxver.h linux.dev/arch/mips/bcm947xx/include/linuxver.h
3141 --- linux.old/arch/mips/bcm947xx/include/linuxver.h 1970-01-01 01:00:00.000000000 +0100
3142 +++ linux.dev/arch/mips/bcm947xx/include/linuxver.h 2005-11-07 22:51:38.780726250 +0100
3143 @@ -0,0 +1,411 @@
3144 +/*
3145 + * Linux-specific abstractions to gain some independence from linux kernel versions.
3146 + * Pave over some 2.2 versus 2.4 versus 2.6 kernel differences.
3147 + *
3148 + * Copyright 2005, Broadcom Corporation
3149 + * All Rights Reserved.
3150 + *
3151 + * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
3152 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
3153 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
3154 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
3155 + *
3156 + * $Id$
3157 + */
3158 +
3159 +#ifndef _linuxver_h_
3160 +#define _linuxver_h_
3161 +
3162 +#include <linux/config.h>
3163 +#include <linux/version.h>
3164 +
3165 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0))
3166 +/* __NO_VERSION__ must be defined for all linkables except one in 2.2 */
3167 +#ifdef __UNDEF_NO_VERSION__
3168 +#undef __NO_VERSION__
3169 +#else
3170 +#define __NO_VERSION__
3171 +#endif
3172 +#endif
3173 +
3174 +#if defined(MODULE) && defined(MODVERSIONS)
3175 +#include <linux/modversions.h>
3176 +#endif
3177 +
3178 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
3179 +#include <linux/moduleparam.h>
3180 +#endif
3181 +
3182 +
3183 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
3184 +#define module_param(_name_, _type_, _perm_) MODULE_PARM(_name_, "i")
3185 +#define module_param_string(_name_, _string_, _size_, _perm_) MODULE_PARM(_string_, "c" __MODULE_STRING(_size_))
3186 +#endif
3187 +
3188 +/* linux/malloc.h is deprecated, use linux/slab.h instead. */
3189 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,9))
3190 +#include <linux/malloc.h>
3191 +#else
3192 +#include <linux/slab.h>
3193 +#endif
3194 +
3195 +#include <linux/types.h>
3196 +#include <linux/init.h>
3197 +#include <linux/mm.h>
3198 +#include <linux/string.h>
3199 +#include <linux/pci.h>
3200 +#include <linux/interrupt.h>
3201 +#include <linux/netdevice.h>
3202 +#include <asm/io.h>
3203 +
3204 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41))
3205 +#include <linux/workqueue.h>
3206 +#else
3207 +#include <linux/tqueue.h>
3208 +#ifndef work_struct
3209 +#define work_struct tq_struct
3210 +#endif
3211 +#ifndef INIT_WORK
3212 +#define INIT_WORK(_work, _func, _data) INIT_TQUEUE((_work), (_func), (_data))
3213 +#endif
3214 +#ifndef schedule_work
3215 +#define schedule_work(_work) schedule_task((_work))
3216 +#endif
3217 +#ifndef flush_scheduled_work
3218 +#define flush_scheduled_work() flush_scheduled_tasks()
3219 +#endif
3220 +#endif
3221 +
3222 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
3223 +/* Some distributions have their own 2.6.x compatibility layers */
3224 +#ifndef IRQ_NONE
3225 +typedef void irqreturn_t;
3226 +#define IRQ_NONE
3227 +#define IRQ_HANDLED
3228 +#define IRQ_RETVAL(x)
3229 +#endif
3230 +#else
3231 +typedef irqreturn_t (*FN_ISR) (int irq, void *dev_id, struct pt_regs *ptregs);
3232 +#endif
3233 +
3234 +#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
3235 +
3236 +#include <pcmcia/version.h>
3237 +#include <pcmcia/cs_types.h>
3238 +#include <pcmcia/cs.h>
3239 +#include <pcmcia/cistpl.h>
3240 +#include <pcmcia/cisreg.h>
3241 +#include <pcmcia/ds.h>
3242 +
3243 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,69))
3244 +/* In 2.5 (as of 2.5.69 at least) there is a cs_error exported which
3245 + * does this, but it's not in 2.4 so we do our own for now. */
3246 +static inline void
3247 +cs_error(client_handle_t handle, int func, int ret)
3248 +{
3249 + error_info_t err = { func, ret };
3250 + CardServices(ReportError, handle, &err);
3251 +}
3252 +#endif
3253 +
3254 +#endif /* CONFIG_PCMCIA */
3255 +
3256 +#ifndef __exit
3257 +#define __exit
3258 +#endif
3259 +#ifndef __devexit
3260 +#define __devexit
3261 +#endif
3262 +#ifndef __devinit
3263 +#define __devinit __init
3264 +#endif
3265 +#ifndef __devinitdata
3266 +#define __devinitdata
3267 +#endif
3268 +#ifndef __devexit_p
3269 +#define __devexit_p(x) x
3270 +#endif
3271 +
3272 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0))
3273 +
3274 +#define pci_get_drvdata(dev) (dev)->sysdata
3275 +#define pci_set_drvdata(dev, value) (dev)->sysdata=(value)
3276 +
3277 +/*
3278 + * New-style (2.4.x) PCI/hot-pluggable PCI/CardBus registration
3279 + */
3280 +
3281 +struct pci_device_id {
3282 + unsigned int vendor, device; /* Vendor and device ID or PCI_ANY_ID */
3283 + unsigned int subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */
3284 + unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */
3285 + unsigned long driver_data; /* Data private to the driver */
3286 +};
3287 +
3288 +struct pci_driver {
3289 + struct list_head node;
3290 + char *name;
3291 + const struct pci_device_id *id_table; /* NULL if wants all devices */
3292 + int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
3293 + void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
3294 + void (*suspend)(struct pci_dev *dev); /* Device suspended */
3295 + void (*resume)(struct pci_dev *dev); /* Device woken up */
3296 +};
3297 +
3298 +#define MODULE_DEVICE_TABLE(type, name)
3299 +#define PCI_ANY_ID (~0)
3300 +
3301 +/* compatpci.c */
3302 +#define pci_module_init pci_register_driver
3303 +extern int pci_register_driver(struct pci_driver *drv);
3304 +extern void pci_unregister_driver(struct pci_driver *drv);
3305 +
3306 +#endif /* PCI registration */
3307 +
3308 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,2,18))
3309 +#ifdef MODULE
3310 +#define module_init(x) int init_module(void) { return x(); }
3311 +#define module_exit(x) void cleanup_module(void) { x(); }
3312 +#else
3313 +#define module_init(x) __initcall(x);
3314 +#define module_exit(x) __exitcall(x);
3315 +#endif
3316 +#endif
3317 +
3318 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,48))
3319 +#define list_for_each(pos, head) \
3320 + for (pos = (head)->next; pos != (head); pos = pos->next)
3321 +#endif
3322 +
3323 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,13))
3324 +#define pci_resource_start(dev, bar) ((dev)->base_address[(bar)])
3325 +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,44))
3326 +#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
3327 +#endif
3328 +
3329 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,23))
3330 +#define pci_enable_device(dev) do { } while (0)
3331 +#endif
3332 +
3333 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,14))
3334 +#define net_device device
3335 +#endif
3336 +
3337 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,42))
3338 +
3339 +/*
3340 + * DMA mapping
3341 + *
3342 + * See linux/Documentation/DMA-mapping.txt
3343 + */
3344 +
3345 +#ifndef PCI_DMA_TODEVICE
3346 +#define PCI_DMA_TODEVICE 1
3347 +#define PCI_DMA_FROMDEVICE 2
3348 +#endif
3349 +
3350 +typedef u32 dma_addr_t;
3351 +
3352 +/* Pure 2^n version of get_order */
3353 +static inline int get_order(unsigned long size)
3354 +{
3355 + int order;
3356 +
3357 + size = (size-1) >> (PAGE_SHIFT-1);
3358 + order = -1;
3359 + do {
3360 + size >>= 1;
3361 + order++;
3362 + } while (size);
3363 + return order;
3364 +}
3365 +
3366 +static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
3367 + dma_addr_t *dma_handle)
3368 +{
3369 + void *ret;
3370 + int gfp = GFP_ATOMIC | GFP_DMA;
3371 +
3372 + ret = (void *)__get_free_pages(gfp, get_order(size));
3373 +
3374 + if (ret != NULL) {
3375 + memset(ret, 0, size);
3376 + *dma_handle = virt_to_bus(ret);
3377 + }
3378 + return ret;
3379 +}
3380 +static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size,
3381 + void *vaddr, dma_addr_t dma_handle)
3382 +{
3383 + free_pages((unsigned long)vaddr, get_order(size));
3384 +}
3385 +#ifdef ILSIM
3386 +extern uint pci_map_single(void *dev, void *va, uint size, int direction);
3387 +extern void pci_unmap_single(void *dev, uint pa, uint size, int direction);
3388 +#else
3389 +#define pci_map_single(cookie, address, size, dir) virt_to_bus(address)
3390 +#define pci_unmap_single(cookie, address, size, dir)
3391 +#endif
3392 +
3393 +#endif /* DMA mapping */
3394 +
3395 +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,43))
3396 +
3397 +#define dev_kfree_skb_any(a) dev_kfree_skb(a)
3398 +#define netif_down(dev) do { (dev)->start = 0; } while(0)
3399 +
3400 +/* pcmcia-cs provides its own netdevice compatibility layer */
3401 +#ifndef _COMPAT_NETDEVICE_H
3402 +
3403 +/*
3404 + * SoftNet
3405 + *
3406 + * For pre-softnet kernels we need to tell the upper layer not to
3407 + * re-enter start_xmit() while we are in there. However softnet
3408 + * guarantees not to enter while we are in there so there is no need
3409 + * to do the netif_stop_queue() dance unless the transmit queue really
3410 + * gets stuck. This should also improve performance according to tests
3411 + * done by Aman Singla.
3412 + */
3413 +
3414 +#define dev_kfree_skb_irq(a) dev_kfree_skb(a)