openwrt/target/linux/package/switch/src/switch-adm.c

   1 /*
   2  * ADMTEK Adm6996 switch configuration module
   3  *
   4  * Copyright (C) 2005 Felix Fietkau <nbd@nbd.name>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19  * 02110-1301, USA.
  20  */
  21
  22 #include <linux/config.h>
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/if.h>
  26 #include <linux/if_arp.h>
  27 #include <linux/sockios.h>
  28 #include <linux/delay.h>
  29 #include <asm/uaccess.h>
  30
  31 #include "switch-core.h"
  32 #include "gpio.h"
  33
  34 #define DRIVER_NAME "adm6996"
  35 #define DRIVER_VERSION "0.01"
  36
  37 static int eecs = 2;
  38 static int eesk = 3;
  39 static int eedi = 5;
  40 static int eerc = 6;
  41 static int force = 0;
  42
  43 MODULE_AUTHOR("Felix Fietkau <openwrt@nbd.name>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_PARM(eecs, "i");
  46 MODULE_PARM(eesk, "i");
  47 MODULE_PARM(eedi, "i");
  48 MODULE_PARM(eerc, "i");
  49 MODULE_PARM(force, "i");
  50
  51 /* Minimum timing constants */
  52 #define EECK_EDGE_TIME  3   /* 3us - max(adm 2.5us, 93c 1us) */
  53 #define EEDI_SETUP_TIME 1   /* 1us - max(adm 10ns, 93c 400ns) */
  54 #define EECS_SETUP_TIME 1   /* 1us - max(adm no, 93c 200ns) */
  55
  56 /* Handy macros for writing fixed length values */
  57 #define adm_write8(cs, b) { __u8 val = (__u8) (b); adm_write(cs, &val, sizeof(val)*8); }
  58 #define adm_write16(cs, w) { __u16 val = hton16(w); adm_write(cs, (__u8 *)&val, sizeof(val)*8); }
  59 #define adm_write32(cs, i) { uint32 val = hton32(i); adm_write(cs, (__u8 *)&val, sizeof(val)*8); }
  60
  61 #define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
  62
  63 extern char *nvram_get(char *name);
  64
  65
  66 static void adm_write(int cs, char *buf, unsigned int bits)
  67 {
  68         int i, len = (bits + 7) / 8;
  69         __u8 mask;
  70
  71         gpioout(eecs, (cs ? eecs : 0));
  72         udelay(EECK_EDGE_TIME);
  73
  74         /* Byte assemble from MSB to LSB */
  75         for (i = 0; i < len; i++) {
  76                 /* Bit bang from MSB to LSB */
  77                 for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
  78                         /* Clock low */
  79                         gpioout(eesk, 0);
  80                         udelay(EECK_EDGE_TIME);
  81
  82                         /* Output on rising edge */
  83                         gpioout(eedi, ((mask & buf[i]) ? eedi : 0));
  84                         udelay(EEDI_SETUP_TIME);
  85
  86                         /* Clock high */
  87                         gpioout(eesk, eesk);
  88                         udelay(EECK_EDGE_TIME);
  89                 }
  90         }
  91
  92         /* Clock low */
  93         gpioout(eesk, 0);
  94         udelay(EECK_EDGE_TIME);
  95
  96         if (cs)
  97                 gpioout(eecs, 0);
  98 }
  99
 100
 101 static void adm_read(int cs, char *buf, unsigned int bits)
 102 {
 103         int i, len = (bits + 7) / 8;
 104         __u8 mask;
 105
 106         gpioout(eecs, (cs ? eecs : 0));
 107         udelay(EECK_EDGE_TIME);
 108
 109         /* Byte assemble from MSB to LSB */
 110         for (i = 0; i < len; i++) {
 111                 __u8 byte;
 112
 113                 /* Bit bang from MSB to LSB */
 114                 for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
 115                         __u8 gp;
 116
 117                         /* Clock low */
 118                         gpioout(eesk, 0);
 119                         udelay(EECK_EDGE_TIME);
 120
 121                         /* Input on rising edge */
 122                         gp = gpioin();
 123                         if (gp & eedi)
 124                                 byte |= mask;
 125
 126                         /* Clock high */
 127                         gpioout(eesk, eesk);
 128                         udelay(EECK_EDGE_TIME);
 129                 }
 130
 131                 *buf++ = byte;
 132         }
 133
 134         /* Clock low */
 135         gpioout(eesk, 0);
 136         udelay(EECK_EDGE_TIME);
 137
 138         if (cs)
 139                 gpioout(eecs, 0);
 140 }
 141
 142
 143 /* Enable outputs with specified value to the chip */
 144 static void adm_enout(__u8 pins, __u8 val)
 145 {
 146         /* Prepare GPIO output value */
 147         gpioout(pins, val);
 148
 149         /* Enable GPIO outputs */
 150         gpioouten(pins, pins);
 151         udelay(EECK_EDGE_TIME);
 152 }
 153
 154
 155 /* Disable outputs to the chip */
 156 static void adm_disout(__u8 pins)
 157 {
 158         /* Disable GPIO outputs */
 159         gpioouten(pins, 0);
 160         udelay(EECK_EDGE_TIME);
 161 }
 162
 163
 164 /* Advance clock(s) */
 165 static void adm_adclk(int clocks)
 166 {
 167         int i;
 168         for (i = 0; i < clocks; i++) {
 169                 /* Clock high */
 170                 gpioout(eesk, eesk);
 171                 udelay(EECK_EDGE_TIME);
 172
 173                 /* Clock low */
 174                 gpioout(eesk, 0);
 175                 udelay(EECK_EDGE_TIME);
 176         }
 177 }
 178
 179 static __u32 adm_rreg(__u8 table, __u8 addr)
 180 {
 181         /* cmd: 01 10 T DD R RRRRRR */
 182         __u8 bits[6] = {
 183                 0xFF, 0xFF, 0xFF, 0xFF,
 184                 (0x06 << 4) | ((table & 0x01) << 3 | (addr&64)>>6),
 185                 ((addr&62)<<2)
 186         };
 187
 188         __u8 rbits[4];
 189
 190         /* Enable GPIO outputs with all pins to 0 */
 191         adm_enout((__u8)(eecs | eesk | eedi), 0);
 192
 193         adm_write(0, bits, 46);
 194         adm_disout((__u8)(eedi));
 195         adm_adclk(2);
 196         adm_read (0, rbits, 32);
 197
 198         /* Extra clock(s) required per datasheet */
 199         adm_adclk(2);
 200
 201         /* Disable GPIO outputs */
 202         adm_disout((__u8)(eecs | eesk));
 203
 204         if (!table) /* EEPROM has 16-bit registers, but pumps out two registers in one request */
 205                 return (addr & 0x01 ?  (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
 206         else
 207                 return (rbits[0]<<24) | (rbits[1]<<16) | (rbits[2]<<8) | rbits[3];
 208 }
 209
 210
 211
 212 /* Write chip configuration register */
 213 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
 214 void
 215 adm_wreg(__u8 addr, __u16 val)
 216 {
 217         /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
 218         __u8 bits[4] = {
 219                 (0x05 << 5) | (addr >> 3),
 220                 (addr << 5) | (__u8)(val >> 11),
 221                 (__u8)(val >> 3),
 222                 (__u8)(val << 5)
 223         };
 224
 225         /* Enable GPIO outputs with all pins to 0 */
 226         adm_enout((__u8)(eecs | eesk | eedi), 0);
 227
 228         /* Write cmd. Total 27 bits */
 229         adm_write(1, bits, 27);
 230
 231         /* Extra clock(s) required per datasheet */
 232         adm_adclk(2);
 233
 234         /* Disable GPIO outputs */
 235         adm_disout((__u8)(eecs | eesk | eedi));
 236 }
 237
 238
 239 /* Port configuration registers */
 240 static int port_conf[] = { 0x01, 0x03, 0x05, 0x07, 0x08, 0x09 };
 241
 242 /* Bits in VLAN port mapping */
 243 static int vlan_ports[] = { 1 << 0, 1 << 2, 1 << 4, 1 << 6, 1 << 7, 1 << 8 };
 244
 245 static int handle_vlan_port_read(void *driver, char *buf, int nr)
 246 {
 247         int ports, i, c, len = 0;
 248
 249         if ((nr < 0) || (nr > 15))
 250                 return 0;
 251
 252         /* Get VLAN port map */
 253         ports = adm_rreg(0, 0x13 + nr);
 254
 255         for (i = 0; i <= 5; i++) {
 256                 if (ports & vlan_ports[i]) {
 257                         c = adm_rreg(0, port_conf[i]);
 258                         len += sprintf(buf + len, (c & (1 << 4) ? "%dt\t" : (i == 5 ? "%du\t" : "%d\t")), i);
 259                 }
 260         }
 261         len += sprintf(buf + len, "\n");
 262
 263         return len;
 264 }
 265
 266 static int handle_vlan_port_write(void *driver, char *buf, int nr)
 267 {
 268         int i, cfg, ports;
 269         switch_driver *d = (switch_driver *) driver;
 270         switch_vlan_config *c = switch_parse_vlan(d, buf);
 271
 272         if (c == NULL)
 273                 return -1;
 274
 275         ports = adm_rreg(0, 0x13 + nr);
 276         for (i = 0; i < d->ports; i++) {
 277                 if (c->port & (1 << i)) {
 278                         ports |= vlan_ports[i];
 279
 280                         cfg = adm_rreg(0, port_conf[i]);
 281
 282                         /* Tagging */
 283                         if (c->untag & (1 << i))
 284                                 cfg &= ~(1 << 4);
 285                         else
 286                                 cfg |= (1 << 4);
 287
 288                         if ((c->untag | c->pvid) & (1 << i)) {
 289                                 cfg = (cfg & ~(0xf << 10)) | (nr << 10);
 290                         }
 291
 292                         adm_wreg(port_conf[i], (__u16) cfg);
 293                 } else {
 294                         ports &= ~(vlan_ports[i]);
 295                 }
 296         }
 297         adm_wreg(0x13 + nr, (__u16) ports);
 298
 299         return 0;
 300 }
 301
 302 static int handle_port_enable_read(void *driver, char *buf, int nr)
 303 {
 304         return sprintf(buf, "%d\n", ((adm_rreg(0, port_conf[nr]) & (1 << 5)) ? 0 : 1));
 305 }
 306
 307 static int handle_port_enable_write(void *driver, char *buf, int nr)
 308 {
 309         int reg = adm_rreg(0, port_conf[nr]);
 310
 311         if (buf[0] == '0')
 312                 reg |= (1 << 5);
 313         else if (buf[0] == '1')
 314                 reg &= ~(1 << 5);
 315         else return -1;
 316
 317         adm_wreg(port_conf[nr], (__u16) reg);
 318         return 0;
 319 }
 320
 321 static int handle_port_media_read(void *driver, char *buf, int nr)
 322 {
 323         int len;
 324         int media = 0;
 325         int reg = adm_rreg(0, port_conf[nr]);
 326
 327         if (reg & (1 << 1))
 328                 media |= SWITCH_MEDIA_AUTO;
 329         if (reg & (1 << 2))
 330                 media |= SWITCH_MEDIA_100;
 331         if (reg & (1 << 3))
 332                 media |= SWITCH_MEDIA_FD;
 333
 334         len = switch_print_media(buf, media);
 335         return len + sprintf(buf + len, "\n");
 336 }
 337
 338 static int handle_port_media_write(void *driver, char *buf, int nr)
 339 {
 340         int media = switch_parse_media(buf);
 341         int reg = adm_rreg(0, port_conf[nr]);
 342
 343         if (media < 0)
 344                 return -1;
 345
 346         reg &= ~((1 << 1) | (1 << 2) | (1 << 3));
 347         if (media & SWITCH_MEDIA_AUTO)
 348                 reg |= 1 << 1;
 349         if (media & SWITCH_MEDIA_100)
 350                 reg |= 1 << 2;
 351         if (media & SWITCH_MEDIA_FD)
 352                 reg |= 1 << 3;
 353
 354         adm_wreg(port_conf[nr], reg);
 355
 356         return 0;
 357 }
 358
 359 static int handle_vlan_enable_read(void *driver, char *buf, int nr)
 360 {
 361         return sprintf(buf, "%d\n", ((adm_rreg(0, 0x11) & (1 << 5)) ? 1 : 0));
 362 }
 363
 364 static int handle_vlan_enable_write(void *driver, char *buf, int nr)
 365 {
 366         int reg = adm_rreg(0, 0x11);
 367
 368         if (buf[0] == '1')
 369                 reg |= (1 << 5);
 370         else if (buf[0] == '0')
 371                 reg &= ~(1 << 5);
 372         else return -1;
 373
 374         adm_wreg(0x11, (__u16) reg);
 375         return 0;
 376 }
 377
 378 static int handle_reset(void *driver, char *buf, int nr)
 379 {
 380         int i;
 381
 382         /*
 383          * Reset sequence: RC high->low(100ms)->high(30ms)
 384          *
 385          * WAR: Certain boards don't have the correct power on
 386          * reset logic therefore we must explicitly perform the
 387          * sequence in software.
 388          */
 389         /* Keep RC high for at least 20ms */
 390         adm_enout(eerc, eerc);
 391         for (i = 0; i < 20; i ++)
 392                 udelay(1000);
 393         /* Keep RC low for at least 100ms */
 394         adm_enout(eerc, 0);
 395         for (i = 0; i < 100; i++)
 396                 udelay(1000);
 397         /* Set default configuration */
 398         adm_enout((__u8)(eesk | eedi), eesk);
 399         /* Keep RC high for at least 30ms */
 400         adm_enout(eerc, eerc);
 401         for (i = 0; i < 30; i++)
 402                 udelay(1000);
 403         /* Leave RC high and disable GPIO outputs */
 404         adm_disout((__u8)(eecs | eesk | eedi));
 405
 406         /* set up initial configuration for ports */
 407         for (i = 0; i <= 5; i++) {
 408                 int cfg = 0x8000 | /* Auto MDIX */
 409                         (((i == 5) ? 1 : 0) << 4) | /* Tagging */
 410                         0xf; /* full duplex, 100Mbps, auto neg, flow ctrl */
 411                 adm_wreg(port_conf[i], cfg);
 412         }
 413
 414         /* vlan mode select register (0x11): vlan on, mac clone */
 415         adm_wreg(0x11, 0xff30);
 416
 417         return 0;
 418 }
 419
 420 static int handle_registers(void *driver, char *buf, int nr)
 421 {
 422         int i, len = 0;
 423
 424         for (i = 0; i <= 0x33; i++) {
 425                 len += sprintf(buf + len, "0x%02x: 0x%04x\n", i, adm_rreg(0, i));
 426         }
 427
 428         return len;
 429 }
 430
 431 static int handle_counters(void *driver, char *buf, int nr)
 432 {
 433         int i, len = 0;
 434
 435         for (i = 0; i <= 0x3c; i++) {
 436                 len += sprintf(buf + len, "0x%02x: 0x%08x\n", i, adm_rreg(1, i));
 437         }
 438
 439         return len;
 440 }
 441
 442 static int detect_adm()
 443 {
 444         int ret = 0;
 445
 446 #if defined(BCMGPIO2) || defined(BCMGPIO)
 447         int boardflags = atoi(nvram_get("boardflags"));
 448
 449         if ((boardflags & 0x80) || force)
 450                 ret = 1;
 451         else
 452                 printk("BFL_ENETADM not set in boardflags. Use force=1 to ignore.\n");
 453 #else
 454         ret = 1;
 455 #endif
 456
 457         return ret;
 458 }
 459
 460 static int __init adm_init()
 461 {
 462         switch_config cfg[] = {
 463                 {"registers", handle_registers, NULL},
 464                 {"counters", handle_counters, NULL},
 465                 {"reset", NULL, handle_reset},
 466                 {"enable_vlan", handle_vlan_enable_read, handle_vlan_enable_write},
 467                 {NULL, NULL, NULL}
 468         };
 469         switch_config port[] = {
 470                 {"enable", handle_port_enable_read, handle_port_enable_write},
 471                 {"media", handle_port_media_read, handle_port_media_write},
 472                 {NULL, NULL, NULL}
 473         };
 474         switch_config vlan[] = {
 475                 {"ports", handle_vlan_port_read, handle_vlan_port_write},
 476                 {NULL, NULL, NULL}
 477         };
 478         switch_driver driver = {
 479                 name: DRIVER_NAME,
 480                 version: DRIVER_VERSION,
 481                 interface: "eth0",
 482                 ports: 6,
 483                 cpuport: 5,
 484                 vlans: 16,
 485                 driver_handlers: cfg,
 486                 port_handlers: port,
 487                 vlan_handlers: vlan,
 488         };
 489
 490         eecs = (1 << eecs);
 491         eesk = (1 << eesk);
 492         eedi = (1 << eedi);
 493
 494         if (!detect_adm())
 495                 return -ENODEV;
 496
 497         return switch_register_driver(&driver);
 498 }
 499
 500 static void __exit adm_exit()
 501 {
 502         switch_unregister_driver(DRIVER_NAME);
 503 }
 504
 505
 506 module_init(adm_init);
 507 module_exit(adm_exit);