uboot-lantiq: update to v2013.10
[openwrt/svn-archive/archive.git] / package / boot / uboot-lantiq / patches / 0020-MIPS-lantiq-add-NAND-SPL-support.patch
1 From e17398316e82d8b28217232b4fd6030c65138e74 Mon Sep 17 00:00:00 2001
2 From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 Date: Mon, 12 Aug 2013 01:18:00 +0200
4 Subject: MIPS: lantiq: add NAND SPL support
5
6 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
7
8 diff --git a/arch/mips/cpu/mips32/lantiq-common/spl.c b/arch/mips/cpu/mips32/lantiq-common/spl.c
9 index 489a82b..3d9d4d4 100644
10 --- a/arch/mips/cpu/mips32/lantiq-common/spl.c
11 +++ b/arch/mips/cpu/mips32/lantiq-common/spl.c
12 @@ -8,6 +8,7 @@
13 #include <image.h>
14 #include <version.h>
15 #include <spi_flash.h>
16 +#include <nand.h>
17 #include <linux/compiler.h>
18 #include <lzma/LzmaDec.h>
19 #include <linux/lzo.h>
20 @@ -63,6 +64,18 @@
21 #define spl_boot_nor_flash 0
22 #endif
23
24 +#if defined(CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH) && defined(CONFIG_SYS_BOOT_NANDSPL)
25 +#define spl_boot_nand_flash 1
26 +#else
27 +#define spl_boot_nand_flash 0
28 +#ifndef CONFIG_SYS_NAND_U_BOOT_OFFS
29 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
30 +#endif
31 +#ifndef CONFIG_SYS_NAND_PAGE_SIZE
32 +#define CONFIG_SYS_NAND_PAGE_SIZE 0
33 +#endif
34 +#endif
35 +
36 #define spl_sync() __asm__ __volatile__("sync");
37
38 struct spl_image {
39 @@ -337,6 +350,58 @@ static int spl_load_nor_flash(struct spl_image *spl)
40 return ret;
41 }
42
43 +static int spl_load_nand_flash(struct spl_image *spl)
44 +{
45 + image_header_t *hdr;
46 + int ret;
47 + unsigned long loadaddr;
48 +
49 + /*
50 + * Image format:
51 + *
52 + * - 12 byte non-volatile bootstrap header
53 + * - SPL binary
54 + * - 12 byte non-volatile bootstrap header
55 + * - padding bytes up to CONFIG_SYS_NAND_U_BOOT_OFFS
56 + * - 64 byte U-Boot mkimage header
57 + * - U-Boot binary
58 + */
59 + spl->data_addr = CONFIG_SYS_NAND_U_BOOT_OFFS;
60 +
61 + spl_puts("SPL: initializing NAND flash\n");
62 + nand_init();
63 +
64 + spl_debug("SPL: reading image header at page offset %lx\n",
65 + spl->data_addr);
66 +
67 + hdr = (image_header_t *) CONFIG_LOADADDR;
68 + ret = nand_spl_load_image(spl->data_addr,
69 + CONFIG_SYS_NAND_PAGE_SIZE, hdr);
70 + if (ret)
71 + return ret;
72 +
73 + spl_debug("SPL: checking image header at address %p\n", hdr);
74 +
75 + ret = spl_parse_image(hdr, spl);
76 + if (ret)
77 + return ret;
78 +
79 + if (spl_is_compressed(spl))
80 + loadaddr = CONFIG_LOADADDR;
81 + else
82 + loadaddr = spl->entry_addr;
83 +
84 + spl_puts("SPL: loading U-Boot to RAM\n");
85 +
86 + ret = nand_spl_load_image(spl->data_addr, spl->data_size,
87 + (void *) loadaddr);
88 +
89 + if (spl_is_compressed(spl))
90 + ret = spl_uncompress(spl, loadaddr);
91 +
92 + return ret;
93 +}
94 +
95 static int spl_load(struct spl_image *spl)
96 {
97 int ret;
98 @@ -345,6 +410,8 @@ static int spl_load(struct spl_image *spl)
99 ret = spl_load_spi_flash(spl);
100 else if (spl_boot_nor_flash)
101 ret = spl_load_nor_flash(spl);
102 + else if (spl_boot_nand_flash)
103 + ret = spl_load_nand_flash(spl);
104 else
105 ret = 1;
106
107 diff --git a/arch/mips/include/asm/lantiq/config.h b/arch/mips/include/asm/lantiq/config.h
108 index feac30d..483cc94 100644
109 --- a/arch/mips/include/asm/lantiq/config.h
110 +++ b/arch/mips/include/asm/lantiq/config.h
111 @@ -40,6 +40,26 @@
112 #define CONFIG_SPI_SPL_SIMPLE
113 #endif
114
115 +/*
116 + * NAND flash SPL
117 + * BOOT CFG 06 only (address cycle based probing, 2KB or 512B page size)
118 + */
119 +#if defined(CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH) && defined(CONFIG_SYS_BOOT_NANDSPL)
120 +#define CONFIG_SPL
121 +#define CONFIG_SPL_NAND_SUPPORT
122 +#define CONFIG_SPL_NAND_DRIVERS
123 +#define CONFIG_SPL_NAND_SIMPLE
124 +#define CONFIG_SPL_NAND_ECC
125 +
126 +/* use software ECC until driver supports HW ECC */
127 +#define CONFIG_SPL_NAND_SOFTECC
128 +#define CONFIG_SYS_NAND_ECCSIZE 256
129 +#define CONFIG_SYS_NAND_ECCBYTES 3
130 +#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
131 + 48, 49, 50, 51, 52, 53, 54, 55, \
132 + 56, 57, 58, 59, 60, 61, 62, 63}
133 +#endif
134 +
135 #if defined(CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH) && defined(CONFIG_SYS_BOOT_NORSPL)
136 #define CONFIG_SPL
137 #endif
138 @@ -148,6 +168,21 @@
139 #define CONFIG_ENV_LOAD_UBOOT_SF
140 #endif
141
142 +#if defined(CONFIG_LTQ_SUPPORT_NAND_FLASH)
143 +#define CONFIG_ENV_WRITE_UBOOT_NAND \
144 + "write-uboot-nand=" \
145 + "nand erase 0 $filesize && " \
146 + "nand write $fileaddr 0 $filesize\0"
147 +
148 +#define CONFIG_ENV_LOAD_UBOOT_NAND \
149 + "load-uboot-nandspl=tftpboot u-boot.ltq.nandspl\0" \
150 + "load-uboot-nandspl-lzo=tftpboot u-boot.ltq.lzo.nandspl\0" \
151 + "load-uboot-nandspl-lzma=tftpboot u-boot.ltq.lzma.nandspl\0"
152 +#else
153 +#define CONFIG_ENV_WRITE_UBOOT_NAND
154 +#define CONFIG_ENV_LOAD_UBOOT_NAND
155 +#endif
156 +
157 #define CONFIG_ENV_LANTIQ_DEFAULTS \
158 CONFIG_ENV_CONSOLEDEV \
159 CONFIG_ENV_ADDCONSOLE \
160 @@ -159,6 +194,8 @@
161 CONFIG_ENV_LOAD_UBOOT_NOR \
162 CONFIG_ENV_SF_PROBE \
163 CONFIG_ENV_WRITE_UBOOT_SF \
164 - CONFIG_ENV_LOAD_UBOOT_SF
165 + CONFIG_ENV_LOAD_UBOOT_SF \
166 + CONFIG_ENV_WRITE_UBOOT_NAND \
167 + CONFIG_ENV_LOAD_UBOOT_NAND
168
169 #endif /* __LANTIQ_CONFIG_H__ */
170 --
171 1.8.3.2
172